Commit graph

25,525 commits

Author SHA1 Message Date
Daniel DeGrasse
3386a43a51 disk_access: reference count initialization calls for disks
Reference count initialization calls for disks. This changes the
behavior of the disk_access_init() function, such that disks will no
longer be initialized again if the first disk access init call
succeeds.

Disk access is reference counted in preparation for supporting disk
de-initialization, where a balanced number of disk de-initialization
calls with disk initialization calls will de-initialize the disk.

Also, remove code in disk drivers that was already checking against
duplicate disk_access_init() calls.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-06-07 18:16:01 +01:00
Reto Schneider
3ceed632f9 drivers: hwinfo: Prevent conflicts
By sorting the lines alphabetically, conflicts can be reduced.

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
2024-06-07 18:08:04 +01:00
Tahsin Mutlugun
f037b95549 drivers: i2c: Add MAX32690 I2C driver
Add I2C driver for Analog Devices MAX32690 MCU. Supports target mode.

Co-Authored-By: Sadik Ozer <sadik.ozer@analog.com>
Co-Authored-By: Mert Vatansever <mert.vatansever@analog.com>
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2024-06-07 13:01:50 +02:00
Francois Ramu
f55391745b drivers: ethernet: stm32 eth hal driver align PTP Config Status
Align the name of the ETH PTP Config Status values
depending on the stm32HAL serie
to be the HAL_ETH_PTP_NOT_CONFIGURATED/HAL_ETH_PTP_CONFIGURATED
or HAL_ETH_PTP_NOT_CONFIGURED/HAL_ETH_PTP_CONFIGURED

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-06-07 13:00:44 +02:00
Vinayak Kariappa Chettimada
0e7c25fee4 drivers: flash: flash_shell: Fix unused variables
Fix unused variable compilation warnings.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2024-06-07 12:59:07 +02:00
Anke Xiao
37e8c47650 drivers: clock_control: add a macro for mke17z9 to wrap flexbus clock
The flexbus clock-related macro is not defined in mke17z9 clock.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-06-07 09:55:56 +02:00
Stanislav Poboril
d124eec3c9 drivers: ethernet: phy: Add Realtek RTL8211F PHY driver
Add driver for Realtek RTL8211F 10/100/1000M ethernet PHY.
This driver implements vendor specific behaviour like
detecting link state change by GPIO interrupt, which is not
present in the generic MII driver.

Fixes: #66348

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2024-06-06 20:08:27 -04:00
Stanislav Poboril
cbb5c5b444 drivers: nxp_enet: Support RGMII mode for ENET_1G
- Added nxp,enet1g compatible to distinguish between ENET (nxp,enet)
and ENET_1G (nxp,enet1g) peripherals within the same driver.
- Added config ETH_NXP_ENET_1G to enable 1G mode of operation on ENET_1G.
- Support RGMII mode of connection between MDIO and PHY to be
able to work with ENET_1G peripheral and support 1000M speed.
- Removed performing of PHY reset before configuring link - it is
not desirable for RTL8211F PHY connected to ENET_1G on RT1170.
Reset of other PHYs can be performed by PHY driver itself if required.

Fixes: #66348

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2024-06-06 20:08:27 -04:00
Stanislav Poboril
6b0a4b0c85 drivers: clock_control: mcux_ccm_rev2: Add ENET_1G clock
Add ENET_1G clock value to the RT11XX CCM version.
Implemented enabling ENET_1G clock and getting its frequency.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2024-06-06 20:08:27 -04:00
Daniel DeGrasse
3ce3ed38ba drivers: video: ov7670: introduce driver for ov7670 camera
Introduce driver for ov7670 camera, supporting QCIF,QVGA,CIF, and VGA
resolution in YUV and RGB mode.

Support was verified on the FRDM-MCXN947, using the SmartDMA camera
engine, which is enabled in the following PR:
https://github.com/zephyrproject-rtos/zephyr/pull/72827

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-06-06 20:07:57 -04:00
Anas Nashif
5df1df2e7a Revert "drivers/console/xtensa_sim_console: force \r\n byte sequence"
This reverts commit 99aa65c725.

With this change, various simulators fail with no output with this
change.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-06-06 20:06:26 -04:00
Peter van der Perk
e017006be4 drivers: input: sbus remote controller support
Add support SBUS RC controller connected through UART

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2024-06-06 15:56:38 -05:00
Francois Ramu
f6a9e0aef2 drivers: flash: stm32 qspi driver in Dual Flash Mode when MemoryMapped
Configure the quad-spi in DualFlash Mode when enabling the MemoryMapped
then reading is possible with memcopy.
DUAL flash mode is possible on stm32 series with QUADSPI_CR_DFM

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-06-06 15:22:06 -05:00
Marcin Niestroj
f726905969 drivers: nsos: handle connect() blocking call
Use poll() to wait for connect attempt to complete or timeout. That way
connect() does not block Native Simulator on host syscall.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-06-06 15:20:15 -05:00
Marcin Niestroj
66c966f0bd drivers: nsos: handle setsockopt(SO_SNDTIMEO)
Handle SO_SNDTIMEO similar to how SO_RCVTIMEO is handled.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-06-06 15:20:15 -05:00
Marcin Niestroj
a150458d35 drivers: nsos: handle sendmsg() blocking call
Use poll(), similar to sendto() and accept() APIs.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-06-06 15:20:15 -05:00
Marcin Niestroj
b5e16b1380 drivers: nsos: handle sendto() blocking call
Use poll(), similar to accept() and recvfrom() APIs.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-06-06 15:20:15 -05:00
Marcin Niestroj
f45d3c81cc drivers: nsos: handle multiple blocking APIs on single socket
So far only a single blocking API could be handled simultaneously, due to
epoll_ctl(..., EPOLL_CTL_ADD, ...) returning -EEXIST when same file
descriptor was added twice.

Follow 'man epoll' advice about using dup() syscall to create a duplicate
file descriptor, which can be used with different events masks. Use such
duplicate for each blocking API except ioctl() (for handling Zephyr poll()
syscall).

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-06-06 15:20:15 -05:00
Marcin Niestroj
59a2d84f45 drivers: nsos: introduce nsos_poll_if_blocking() helper function
Introduce nsos_poll_if_blocking(), which replaces common code in:
 * nsos_accept_with_poll()
 * nsos_recvfrom_with_poll()

This will allow to introduce similar behavior for other blocking APIs in
subsequent commits.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-06-06 15:20:15 -05:00
Henrik Brix Andersen
f9c630f7c4 drivers: clock control: mcux: syscon: add FlexCAN clock support
Add support for FlexCAN0 and FlexCAN1 clocks present on the MCXN94x.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-06-06 15:46:57 +01:00
Tomasz Moń
e2afcafca5 drivers: udc_dwc2: Abort wait when PHY is not clocked
On nRF54H20DK the USB PHY is powered from VBUS. When the USB cable is
not connected, the PHY is not powered and the PHY clock disappears.

Because the GOUTNAKEFF and INEPNAKEFF can only ever be set when PHY
clock is active, the waits for these bits do timeout if cable is
disconnected. Workaround the issue by aborting the wait if vendor quirk
indicates that PHY clock has abruptly vanished.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2024-06-06 07:53:17 -04:00
Tomáš Juřena
5ac6335505 drivers: pinctrl: esp32: Use BIT macro when writing pin value
GPIO registers w1ts and w1tc expects bitfield of pins to set/clean.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2024-06-06 07:52:55 -04:00
Zhengwei Wang
96ff0f1e04 drivers: timer: Optimized the ambiq stimer driver
The original driver has two defects: 1. When setting the next timeout
value the original implementation simply sets a delta value equal to
ticks * CYC_PER_TICK. This operation is reckless and may incorrectly
"reset" the fractional tick, causing clock skew. 2. The original
implementation doesn't handle the counter overflow situation. When the
counter overflows from 0xffffffff to 0x0, the uptimer counter becomes
incorrect. We have fixed above issue by rewriting most of the functions in
this driver and verified it by running all tests under
tests/kernel/timer folder.

Signed-off-by: Zhengwei Wang <zwang@ambiq.com>
2024-06-06 07:52:32 -04:00
Declan Snyder
a42ada8426 drivers: nxp_enet: Disable hw accel with IPV6
As far as I can tell it appears that the hardware
does not support acceleration of ICMPV6 checksums.
For now, the easiest way to fix the runtime failure of
IPV6 is just to disable the hardware acceleration if
IPV6 is expected to be used.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-06-06 07:51:16 -04:00
Tom Burdick
d95caa51a4 sys: Add a lockfree mpsc and spsc queues
Moves the rtio_ prefixed lockfree queues to sys alongside existing
mpsc/spsc pbuf, ringbuf, and similar queue-like data structures.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2024-06-06 00:42:29 -07:00
Francois Ramu
bde663f484 drivers: gpio: stm32 gpio driver supporting the stm32H7RS
Introduce the stm32h7RS serie to the gpio driver,
based on the stm32h7
The SBS controller is used to configure the EXTI line among
the different GPIO port.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-06-06 00:41:43 -07:00
Francois Ramu
c0750e9867 drivers: pinctrl: stm32 pinctrl driver supporting the stm32H7RS
Introduce the stm32h7RS serie to the pin control driver,
New GPIO port M, N, O, P
Then add the complete list and from A to P (16 port
coded on 5 bits)

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-06-06 00:41:43 -07:00
Francois Ramu
e6ebb044ac drivers: clock: stm32 clock driver supporting the stm32H7RS
Introduce the stm32h7RS serie to the clock_controller,
based on the stm32h7 clock driver
Datasheet DS14359 rev 1 gives CPU max freq of 500MHz

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-06-06 00:41:43 -07:00
Tim Lin
76ced4a82d drivers: pinctrl: ITE: Add a property configure pin current strength
Add the property of drive-strength to drive a high or low current
selection. If this property is not configured, it is the default
setting. According to the SPEC, the default drive current selection
varies from different pins.
Define the high level 0b: 8mA
           low  level 1b: 4mA or 2mA

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-06-06 00:41:35 -07:00
Peter van der Perk
af52f1b290 clock: mcux_ccm: add qtmr clock
Add defines for QTMR peripheral

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2024-06-06 09:41:22 +02:00
Peter van der Perk
9addbe77fc drivers: pwm: pwm_mcux_qtmr: Add QTMR driver.
PWM driver for QTMR peripheral

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2024-06-06 09:41:22 +02:00
Henrik Brix Andersen
633065ec3b drivers: can: mcux: flexcan: calculate and set proper TDCO
Calculate and set a proper Transceiver Delay Compensation Offset (TDCO)
based on FlexCAN FD timing.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-06-06 00:40:45 -07:00
Ryan Erickson
2eef28a624 drivers: change Laird references to Ezurio
Laird is now Ezurio.
Update web links.

Signed-off-by: Ryan Erickson <ryan.erickson@ezurio.com>
2024-06-05 17:37:54 -05:00
Abderrahmane Jarmouni
efc209b47f drivers: gpio: stm32: support wkup pins configuration
Introduce a custom STM32_GPIO_WKUP GPIO flag.
Use the newly introduced stm32_pwr_wkup_pin_cfg_gpio() public
function to configure GPIO pins, that have the STM32_GPIO_WKUP
flag in DT, as sources for STM32 PWR wake-up pins, on the condition
that there is a wake-up pin that corresponds to each of them.
These GPIO pins can then be used to power on the system after Poweroff
like a reset pin.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-06-05 17:35:55 -05:00
Henrik Brix Andersen
68096cedae drivers: can: rename struct can_driver_config fields
Rename the "bus_speed" and "bus_speed_data" fields of struct
can_driver_config to "bitrate" and "bitrate_data" to match the
corresponding devicetree properties and the terminology used in the rest of
the CAN subsystem API.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-06-05 14:43:00 +01:00
Henrik Brix Andersen
695e704b5d dts: bindings: can: rename bus-speed/bus-speed-data properties
Deprecate the CAN controller bus-speed/bus-speed-data properties and rename
them to bitrate/bitrate-data to match the terminology used in other CAN
devicetree properties and the CAN subsystem API.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-06-05 14:43:00 +01:00
Nikodem Kastelik
fc0718ed46 drivers: spi: nrf: add support for spim12x instances
SPIM12x instances can perform DMA only from memory region
that is cacheable by default.
SPIM12x instances pins are configured via CTRLSEL mechanism,
which prevents the GPIO registers from ensuring correct bus
state when peripheral does not drive the bus lines.
External configuration of SPIM12x ENABLE register fixes this issue.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-06-05 14:42:50 +01:00
Nikodem Kastelik
7080f0f83f drivers: spi: nrf: fix async cs deactivation
Chip Select signal must be deactivated only after transaction
is finalized. In async case this means it cannot be done from
`transceive` call context, as this context is left as soon as
transfer is initialized.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-06-05 14:42:50 +01:00
Nikodem Kastelik
41ad1f3ddb drivers: pinctrl: nrf: use CLOCKPIN for slow SPIM MOSI
Fast SPIM instances must not have CLOCKPIN setting applied to MOSI.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-06-05 14:42:50 +01:00
Ayush Singh
02d71a135c drivers: cc13xx_cc26xx: pwm: Fix building blinky_pwm
- Add channel, flags to pwm-cells
- Replace __ASSERT_UNREACHABLE with CODE_UNREACHABLE

Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
2024-06-05 04:24:38 -07:00
Declan Snyder
90986e7e22 drivers: mcux_lptmr_timer: Fix compat string error
Fix error due to compatible string changing in DT and
forgetting to update this driver with the change.

Also make the counter symbol hidden.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-06-05 04:24:30 -07:00
Kai Vehmanen
a4fdd915d5 drivers: dma: intel_adsp_hda: change L1 exit defaults
DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT should be set by default
for both Intel ACE15 and ACE20 platforms.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-06-05 01:38:54 -07:00
Daniel Kampert
246e614ac3 drivers: rtc: rtc_mc146818: Patch incorrect field comparisons
Minutes and hour values are incorrectly compared with MAX_SEC.

Compare minutes and hour to MAX_MIN and MAX_HOUR respectively.

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2024-06-05 01:38:33 -07:00
Krzysztof Chruściński
d07b13dbc2 drivers: serial: nrfx_uarte: Allow use of legacy shim on RISCV cores
Legacy shim takes less flash so it should be a first choice on cores
with less code memory (like RISCV cores on nrf54h20). Adding new
instances support to the legacy shim.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-06-05 01:37:57 -07:00
Sven Depoorter
dda604c96f drivers: display: ssd16xx: performance improvement
The driver writes the scan entry mode to the display controller on each
set_window call. Multiple calls to set_window can be needed to update
a single frame buffer in the controller.

There's a performance improvement by only setting the scan mode when
the orientation is changed (set_orientation, see previous commit)
and when the profile has changed.
For the latter the scan_mode is lost on the controller
due to a software reset.

Signed-off-by: Sven Depoorter <svndepoorter@gmail.com>
2024-06-04 19:13:18 -04:00
Sven Depoorter
e01f422b02 drivers: display: ssd16xx: implement display_set_orientation API
I chose this approach instead of software rotation because I need it for
an ultra low power project.
Rotation in steps of 0, 90, 180, 270 degrees is done by changing
the data entry modes.
This commit removes the orientation-flipped property as it is redundant.

I made the assumption that the current driver implementation is right
about controller X/Y versus display width/height. The display controller X
parameter matches with the display height (dts) and display controller Y
parameter matches with the display width (dts). It looks like display
manufacturers choose to have it like this because a wider screen probably
makes more sense.

Tested on the reel_board with a 250x122 display (ssd1673 controller)
and a custom PCB with a 200x200 display (ssd1681 controller).
Also tested all orientations with various width/height dts overrides.

Signed-off-by: Sven Depoorter <svndepoorter@gmail.com>
2024-06-04 19:13:18 -04:00
Yassine El Aissaoui
5c308e0344 bluetooth: hci_nxp: move vendor specific setup to its dedicated place
Some vendor specific setup was done inside
the open() HCI function, those should be
inside setup() function instead.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
2024-06-04 19:10:22 -04:00
Dominik Ermel
459517badc drivers/flash/spi_nor: Fix DPD exit
Incorrectly placed preprocessor conditions caused exit_dpd
when there has been no instance of a device with
dpd_wakeup_sequence parameter.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
2024-06-04 16:28:59 -05:00
Chris Friedt
0fa97326c7 posix: create kconfig options for pse51, pse52, pse53
Create Kconfig "shortcuts" for PSE51, PSE52, and PSE53.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2024-06-04 16:27:12 -05:00
Chris Friedt
2bc722a97e posix: deprecate POSIX_FNMATCH GETOPT GETENTROPY
The functions fnmatch(), getopt(), getentropy()
and others are grouped into the standard Option Group
POSIX_C_LIB_EXT.

The getentropy() function is currently in-draft for
Issue 8 as of 2021.

https://www.opengroup.org/austin/docs/austin_1110.pdf

Not surprisingly, the POSIX_C_LIB_EXT Option Group
also includes the highly debated strnlen() function.

Moving that function will be deferred until later.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2024-06-04 16:27:12 -05:00