Commit graph

25,525 commits

Author SHA1 Message Date
Francois Ramu
103f3b04f3 drivers: flash: stm32 qspi driver sends the reset cmd
Use the define to send the reset cmd at quad-flash init :
SPI_NOR_CMD_RESET_EN followed by SPI_NOR_CMD_RESET_MEM
when the st,stm32-qspi-nor has the <reset-cmd> property set.
Reports the jedecID correctly.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-08-20 14:52:14 -04:00
Fabrice DJIATSA
fe82353b82 drivers: display: use zephyr reset api for diyplay
Replace direct HAL api by zephyr reset api framework for display
peripheral block reset.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2024-08-20 14:50:57 -04:00
Henrik Brix Andersen
e60da1bd64 drivers: can: fake: install default core clock delegate at driver init
Install the default delegate for reporting the CAN core clock frequency at
driver instance initialization. This allows using the default clock
configuration when not using ztest.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-08-20 10:34:07 +02:00
Pisit Sawangvonganan
1bcae0ea9f style: drivers: comply with MISRA C:2012 Rule 15.6
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-08-20 10:33:51 +02:00
Dino Li
b9d8e9a634 it8xxx2/espi: disable IBF interrupt by calling interrupt controller API
Disable input buffer full interrupt for 60h/64h and 62h/66 ports by
calling interrupt controller API. The API has barrier mechanism to
ensure that a thread's requirement to disable peripheral interrupt
takes effect before enabling CPU interrupt. Therefore, the disabling
operation does not occur in ISR and results in interrupt 0 symptom.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2024-08-20 10:33:19 +02:00
Zhengwei Wang
4a7adb3d9d drivers: spi: pm: Add power management support for Ambiq Apollo3 SoCs SPI
Add power management support for Apollo3/Apollo3P SPI, and
automatically enables device runtime power management

Signed-off-by: Zhengwei Wang <zwang@ambiq.com>
2024-08-20 10:32:52 +02:00
Zhengwei Wang
2cbf3b9365 drivers: i2c: pm: Add power management support for Ambiq Apollo3 SoCs I2C
Add power management support for Apollo3/Apollo3P I2C, and
automatically enables device runtime power management

Signed-off-by: Zhengwei Wang <zwang@ambiq.com>
2024-08-20 10:32:52 +02:00
Zhengwei Wang
03a1fe6cd7 drivers: serial: pm: Add power management support for Apollo3 SoCs UART
Add power management support for Apollo3/Apollo3P UART, and
automatically enables device runtime power management

Signed-off-by: Zhengwei Wang <zwang@ambiq.com>
2024-08-20 10:32:52 +02:00
Ha Duong Quang
0135e7433b drivers: nxp_s32_netc_psi_vsi: update to RTD 2.0.0
Config to enable VLAN promiscuous and untagged.

Config to enable SI message interrupt.

Fix the build warning.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2024-08-20 10:32:32 +02:00
Ha Duong Quang
3bff3168f5 drivers: spi_nxp_s32: update to RTD 2.0.0
Update to use rtd function to upadte Keep CS asserted
after the next transfer.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2024-08-20 10:32:32 +02:00
Ha Duong Quang
b000ac7cf6 drivers: can_nxp_s32_canxl: Update to RTD 2.0.0
Create the set FD mode function because the old
RTD function is updated to static.

Fix the build warning by update the type of buffidx
and u32SysStatus arguments in the callback function
to uint32_t.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2024-08-20 10:32:32 +02:00
Ha Duong Quang
dcc4b9c5ec drivers: uart_nxp_s32_linflexed: update to RTD 2.0.0
Update user_data pointer to 'const void (*)' type

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2024-08-20 10:32:32 +02:00
Daniel Kampert
e5d4b66b93 drivers: rtc: Wrong alarm mask in rtc_alarm_get_time
Fixing 3 issues:

1. The mask can be wrong if the alarm register is
set to a MAX value because the alarm bit is the
highest in the alarm register. The mask is now
generated by checking the AE_x bits in the time
registers.

2. Fixing possible NULL pointer exception in
alarm_set_time API. timeptr can be set to NULL
with mask 0 in the alarm_set_time function.
The regs variable for the I2C communication
is written with the correct value from timeptr
only when the right bit in the mask is set.

3. rv8263c8_alarm_set_time() now resets the
alarm status.

4. Interrupts are now enabled by using
rv8263c8_alarm_set_time() rather than when
setting an alarm callback.

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2024-08-20 10:32:06 +02:00
Thao Luong
4cebe5354f drivers: adc: initialize to add ADC driver
Add minimal ADC driver code for EK-RA8M1 board

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2024-08-20 10:31:43 +02:00
Benedikt Schmidt
d7fa28bf72 drivers: gpio: improve logging of PCAL64XXA
Improve logging of the driver for the port expander PCAL64XXA.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-08-20 10:31:27 +02:00
Ioannis Damigos
782967a1e3 gpio_smartbond: Fix port_set_masked_raw
Writing directly to Px_DATA_REG modifies pins which are not
indicated by mask, causing gpio_basic_api test to fail.

Use Px_SET_DATA_REG and Px_RESET_DATA_REG to modify only
pins indicated by mask.

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-08-19 17:23:18 -04:00
Ioannis Damigos
82d17f1f2c gpio_smartbond: Remove pdc entry only if it exists
Remove pdc entry only if index exists when CONFIG_PM
is set.

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-08-19 17:23:18 -04:00
Ioannis Damigos
df86860319 gpio_smartbond: Set pin to input when it is configured as GPIO_DISCONNECTED
Set pin to input with no resistors selected when it is configured as
GPIO_DISCONNECTED.

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-08-19 17:23:18 -04:00
Ioannis Damigos
bacd6c31d6 entropy_smartbond: Clear pending interrupts after disabling TRNG
Clear pending interrupts after disabling TRNG to avoid
smartbond_trng_isr getting called with TRNG disabled

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-08-19 17:23:18 -04:00
Farah Fliss
ad254b06c8 drivers: input: gt911: Add support for multitouch events
The gt911 can recognize up to 5 touch points at a time.
Add code to support these multi-touch events.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-08-19 15:25:51 -04:00
Farah Fliss
bd658642e1 drivers: input: gt911: Fix coding style
Coding style was incorrect. Fix it.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
2024-08-19 15:25:51 -04:00
Farah Fliss
70664a0320 drivers: input: gt911: Run clang-format
Ran clang-format on the gt911 driver file  before
making any changes.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
2024-08-19 15:25:51 -04:00
Fredrik Gihl
9eaf488907 drivers: sensor: tmp114: Add support for OVERSAMPLING attr
Tmp114 has an average function, according to the datasheet this is
default disabled. Add attribute to enable this feature.

Signed-off-by: Fredrik Gihl <fgihl@hotmail.com>
2024-08-19 15:18:25 -04:00
Sadik Ozer
d42301bc8c drivers: spi: Fix twister build issue
Update spi_bitbang_transceive_async function parameter to it match
with correct one that declared in struct

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-19 15:18:09 -04:00
Sadik Ozer
ff311dcb41 drivers: mpi_dbi: Fix wrong bit index for 3wire mode
BIT(8) will generate mask for 9th bit. Index starts from 0.

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-19 15:18:09 -04:00
Jakub Topic
f395519104 drivers: rtc: rv3028: preserve CLKOUT when enabling callbacks
This commit addresses an issue where enabling the alarm or update
callbacks unexpectedly disabled the RTC's programmable clock output
during runtime.

The interrupt configuration has been moved to the driver's init
function.

Signed-off-by: Jakub Topic <jakub.topic@anitra.cz>
2024-08-19 15:17:22 -04:00
Laurentiu Mihalcea
6b689d0207 firmware: scmi: add support for pinctrl protocol
This includes helper function for pin configuration
and a DT binding for the pinctrl DT node.

There's two important notes to be made regarding this
protocol:

* pinctrl drivers have no subsytem API to implement as opposed
to clock control drivers. Because of this (and the fact that
`pinctrl_configure_pins()` doesn't require a `struct device`
handle) the pinctrl driver consists only of a helper function,
which implements the `PINCTRL_CONFIGURE_PINS` command.
Additionally, the `scmi_protocol` structure is defined inside
the pinctrl helpers source file to avoid redundant code
(otherwise, each SCMI-based pinctrl driver would have to define
it its source file).

* each vendor may have their own set of pin propeties and DT
representations for them. Because of this, there can't be a
generic, SCMI-based pinctrl driver. As such, each vendor who
wants to use the SCMI support for pinctrl operations will have
to implement their pinctrl driver (which, to put it simply,
revolves around implemeting `pinctrl_configure_pins()`) and
make use of the pin configuration function introduced in this
commit. Moreover, this means that each vendor will have control
over the way their pin properties are encoded in the
`scmi_pinctrl_settings` structure.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Laurentiu Mihalcea
350e36a47a firmware: scmi: add support for clock management protocol
This includes:
	1) Source containing helper functions, each
	implementing a command from the clock management
	protocol.

	2) A clock controller driver making use of said
	helper functions and implementing the clock
	subsystem API.

	3) A DT binding for clock protocol node.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Laurentiu Mihalcea
413c77cf4e firmware: introduce SCMI core support
Introduce core support for ARM's SCMI (System Control and
Management Interface). This includes:

* shared memory (SHMEM) driver. This consists of a suite
of functions used to interact with the shared memory area.

* shared memory and doorbell-based transport layer driver.
Data is passed between platform and agent via shared
memory. Signaling is done using polling (PRE_KERNEL) and
doorbells (POST_KERNEL). This makes use of Zephyr MBOX API
(for signaling purposes) and the SHMEM driver (for polling
and data transfer).

* core driver - acts as glue between transport and protocol
layers. Provides synchronized access to transport layer
channels and channel assignment/initialization.

* infrastructure for creating SCMI protocols

This is based on ARM's SCMI Platform Design Document: DEN0056E.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Balsundar Ponnusamy
3ab212c1db drivers: dma: add dma driver for designware axi DMA controller
Adding dma driver source for designware axi dma controller

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2024-08-19 10:02:53 -04:00
Morihisa Momona
9afc79d16a wifi: airoc: join/leave of multicast address
Add the support of join and leave of multicast address group.

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Morihisa Momona
ba3d49f38f wifi: airoc: FIX interface up (in softap)
When creating softap, interface is not recognized as up.

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Morihisa Momona
f95c878493 wifi: airoc: FIX Security modes of SoftAP
Updated security modes verification in ap_enable.
SoftAP supports following modes:
 - No security (WHD\_SECURITY\_OPEN)
 - WPA2-PSK security (WHD_SECURITY_WPA2_AES_PSK)
 - WPA3-SAE security (WHD_SECURITY_WPA3_SAE)

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Morihisa Momona
6b21699f50 wifi: airoc: FIX connection to AP with open security
STA fails to connect AP, of which security is open.

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Fin Maaß
f775ab4975 drivers: watchdog: litex: add litex watchdog
this adds a driver for the litex watchdog.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-08-19 10:02:01 -04:00
Mike Banducci
5a8e60b12e soc: stm32: Add support for the stm32h755
Add support for the stm32h755 which is a close relative of
the stm32h745 with additional cryptography and hashing
peripherals.

Signed-off-by: Mike Banducci <michael.banducci@sandc.com>
2024-08-19 10:01:39 -04:00
Krystof Sadlik
928d025201 drivers: sensor: fxls8974: Added driver for this accelerometer
Added driver for the fxls8974 accelerometer which is present on the
mimxrt1040_evk board.

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-08-19 10:00:34 -04:00
Chun-Chieh Li
86c991ed03 drivers: usb: udc: add NuMaker series USBD controller driver
Add UDC driver for Nuvoton NuMaker series USBD controller

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2024-08-19 10:00:07 -04:00
Quy Tran
370bd31d2a dts: bindings: clock: Change clock control binding for Renesas RA
Background of this modification is to make clock control
driver code provided by Renesas vendor to support for Renesas MCU
on Zephyr.

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2024-08-19 09:59:27 -04:00
Duy Phuong Hoang. Nguyen
7060672c37 drivers: serial: Initial support for SCI UART
First commit to support serial driver running on r_sci_uart for Renesas
RA devices.

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-19 09:59:27 -04:00
Duy Phuong Hoang. Nguyen
922ee61b8d drivers: gpio: Update gpio driver for Renesas RA series
Background of this modification is to make gpio driver code
provided by Renesas vendor to be an official support for Renesas
MCU on Zephyr

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-19 09:59:27 -04:00
Duy Phuong Hoang. Nguyen
ffad404a6a drivers: pinctrl: Update pinctrl driver name for Renesas RA series
Update pinctrl driver which used for Renesas RA series with
PFS secure register

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2024-08-19 09:59:27 -04:00
Maxime Vincent
af5aabf245 soc: arm: nxp: add lpc55x26 support
Add basic support for the LPC55x26 SoCs

Signed-off-by: Maxime Vincent <maxime@veemax.be>
2024-08-19 09:57:28 -04:00
Luc BEAUFILS
ad3e941ad3 drivers: add SSD1327 display controller driver
Implements the driver for the OLED SSD1327 controller.
This driver is based on the ssd1306 driver due to their similarities.
Only the SPI control bus is supported.

Signed-off-by: Luc BEAUFILS <luc.beaufils@savoirfairelinux.com>
2024-08-17 08:56:24 -04:00
Miguel Gazquez
c8c526313a drivers: display: st7789v: add support for BGR565
Add support for BGR565 pixel format in the st7789v driver.

Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
2024-08-17 08:56:04 -04:00
Miguel Gazquez
8d74553053 drivers: mipi_dbi: add driver for st,stm32-fmc
Add support for using the stm32 fmc to interact with a display
controller, using Intel 8080 protocol with a 16 bits parallel bus.

Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
2024-08-17 08:56:04 -04:00
Raffael Rostagno
847832d8f7 sdhc: esp32: Register writing macros cleanup
Macros to write specific peripheral registers were removed as a
compile flag was added to hal_espressif requesting struct bitfields
to have strict volatile access (thus 32-bit access), allowing for
the cleanup.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-17 08:55:37 -04:00
Raffael Rostagno
1857197422 sdhc: esp32: Clock control setting from DTS
Enable SDIO clock using clock control subsystem instead of
low level functions.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-17 08:55:37 -04:00
0e3d9cc2cc drivers: mipi_dbi: lower ROM usage by switching reset time to k_timeout_t
Calling k_msleep() leads to a int64_t division, causing udivdi3 and
similar to be linked in.

Keep the outer API the same, but switch to k_timeout_t before passing
to the inner API. This saves 1916 B of ROM.

Signed-off-by: Michael Hope <mlhx@google.com>
2024-08-17 08:55:28 -04:00
Tom Burdick
caa0c0a467 rtio: Split the rx and tx buffer unions
Transmit/write buffers are expected to be constant values given to the
operation to transmit but not mutate. Seperate the OP_TX and OP_RX
operation description unions.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2024-08-17 08:55:01 -04:00