Fixed an issue where `display_read()` in the SDL driver was not working.
In the current implementation, use texture to represent screen images.
To read this, draw it once on another surface and then read it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add SDL_DISPLAY_USE_HARDWARE_ACCELEREATOR to be able to switch
enable/disable hardware accelerator.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The current implementation implicitly assumes that if the device is
configured to have the capability of acting as a CSL endpoint then in
case a delayed reception with matching ID finishes with a timeout no
action is needed. This assumption is correct when RxOnWhenIdle mode is
disabled because the transition to sleep is done automatically by the
driver below. However, it's wrong when RxOnWhenIdle is enabled. This
commit fixes that case by adding a call to event handler that notifies
the higher layer about the event and allows it to transition to RxOff if
needed.
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Before, only one sensor device was supported. It
was possible to set a trigger on a second sensor
device, but the filtering of the channel data
would cause no channels from the new sensor
device to be read.
Also in trigger handler log of sampled data, print
the sensor name and channe name (instead of channel
number).
Signed-off-by: Mike J. Chen <mjchen@google.com>
New shim takes more flash and is causing some tests to overflow the
ROM memory. Switching to the legacy shim as default until it is fixed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Remove the CAN_FILTER_FDF flag for filtering on classic CAN/CAN FD frames
as it is not supported natively by any known CAN controller.
Applications can still filter on classic CAN/CAN FD frames in their receive
callback functions as needed.
Fixes: #64554
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for reconfiguring the period of an active PWM channel with
the SCTimer driver. Due to the design of the SCTimer IP, the period can
only be reconfigured when one channel is in use. Otherwise, only the
duty cycle of each channel can be updated.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The clock divider value is not being applied as the address of the
register to which it is being written is incorrect. A check of all RA MCU
datasheets confirms that, in all cases, the SCKDIVCR register is at an
offset of 0x20 (and not 0x21).
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
When adjusting the prescale to increase the I2C SCL low period,
the high period must also be subtracted to maintain a consistent
frequency.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add new shim which is based on nrfx driver.
Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add adaptation layer which allows to provide interrupt driven
API for drivers which exposes only asynchronous API.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Change the synchronization of RMC and GGA NMEA messages from a
timeout to matching their UTC timestamps.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Remove gpio_clock_names and gpio_mcux_lpc_config->clock_ip_name from
drivers/gpio/gpio_mcux_lpc.c.
The drivers/gpio/gpio_mcux_lpc.c file did not compile with xt-clang
RI-2021.8-win32, as the gpio_clock_names was initialised with a
reference to a static const array. The clock_ip_name member was
initialised from this variable, but it isn't used anywhere else.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
When the I2C is in the target mode and encounters the bus error, the
driver has to reset the bus to recover the I2C hardware. However, when
the hardware is disabled, the interrupt enable bits are also cleared
automatically by design. As a result, we need to enable the interrupts
after resetting the I2C hardware.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Add driver for NXP nx20p3483 power path controller that can be used
to control and protect sink and source path of USB-C connector.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add support for ppc shell command with subcommands that can print
the status of PPC (dead battery, sinking, sourcing, vbus detected),
dump registers and request the PPC to exit dead battery mode.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds an API to the Power Path Controllers (PPC) that
may be used with USB-C subsystem to control the current paths,
enabling and disabling sourcing and sinking VBUS and protect against
shorts, overvoltage and overcurrent.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
According to the clic specification
(https://github.com/riscv/riscv-fast-interrupt), the mnxti register has
be written, in order to clear the pending bit for non-vectored
interrupts. For vectored interrupts, this is automatically done.
From the spec:
"If the pending interrupt is edge-triggered, hardware will automatically
clear the corresponding pending bit when the CSR instruction that
accesses xnxti includes a write."
I added a kconfig `RISCV_SOC_HAS_CUSTOM_IRQ_HANDLING` to allow custom
irq handling. If enabled, `__soc_handle_all_irqs` has to be implemented.
For clic, non-vectored mode, I added a `__soc_handle_all_irqs`, that
handles the pending interrupts according to the pseudo code in the spec.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The mechanism for hardware vectoring has changed in the clic spec
(https://github.com/riscv/riscv-fast-interrupt) in 2019. Before
vectoring was enabled via `mode` bits in `mtvec`. Support for this was
added in fc480c9382.
With more current clic implementations, this does not work anymore.
Changing the `mode` bits is reserved. Vectoring can be enabled
individually in the `shv` bit of `clicintattr[i]`.
Since the old mechanism is still used, I added a new Kconfig for it.
If this Kconfig is not set, we use the `shv` bit for harware vectoring.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The trig field of clicintattr is indeed in bits 2:1. However, the mask
`CLIC_INTATTR_TRIG_Msk` is only applied directly to the bitfield
`INTATTR.b.trg`. Therefore it doesn't have to be shifted additionally.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
Add support of voltage control to Renesas PFC driver. Voltage register
mappings have been added to r8a77951 and r8a77961 SoCs.
Allow 'power-source' property for 'renesas,rcar-pfc' node. This property
will be used for configuring IO voltage on appropriate pin. For now it
is possible to have only two voltages: 1.8 and 3.3.
Note: it is possible to change voltage only for SD/MMC pins on r8a77951
and r8a77961 SoCs.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Modify the sequence of pinctrl setting. Default setting as input mode
prevents leakage during changes to extended setting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When device runtime pm is enabled on console device, do not suspend
device synchronously on each char transmission, but rather use asynchronous
suspension request.
This will save useless and costly suspension/resumption procedure, which
can involve uart device clock suspension but also pin configuration
to sleep state (which itself involves gpio clock activation ...).
On STM32, using asynch device suspension allows to divide by 3 the
transmission time of a character chain.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This change marks each instance of the 'i2c_driver_api' as 'static const'.
The rationale is that 'i2c_driver_api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The place where TF-M places its non-secure api header files has changed
Therefore changing it for for all applications that use it.
Signed-off-by: Markus Swarowsky <markus.swarowsky@nordicsemi.no>
This change renames the RX message buffer from g_hciRxMsg to rxmsg,
as it does not follow the Zephyr coding style.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This change relocates the tx/rx message buffer from the .bss section
to the .noinit section. This adjustment is aimed at reducing boot time by
lowering the size of the .bss section, without impacting the operational
functionality of the buffer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add driver for NXP DMIC peripheral. This peripheral is present on the
iMX RT5xx and iMX RT6xx parts, as well as some LPC SOCs. The following
features are supported:
- up to 2 simultaneous channels of L/R PCM data (4 channels are not
supported due to limitations of the DMA engine)
- individual configuration of gain and filter parameters for each DMIC
channel input
The driver has been tested with up to 4 PCM data streams (2 L/R channels),
as well as the MEMS microphones present on the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add definition for DMIC clock source to LPC SYSCON clock control driver.
This constant allows drivers to get the DMIC bit clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
