Commit graph

23353 commits

Author SHA1 Message Date
Flavio Ceolin
e80ea1e129 drivers: power_domain/gpio: Init priority option
Add a Kconfig option to customize initialization priority of
gpio power domain.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-01-24 18:20:17 -05:00
Flavio Ceolin
9506720bd8 drivers: power_domain/gpio_monitor: Init priority option
Add a Kconfig option to customize initialization priority of
gpio monitor power domain.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-01-24 18:20:17 -05:00
Pisit Sawangvonganan
e7875de3f9 drivers: sdhc: set 'sdhc_driver_api' as 'static const'
This change marks each instance of the 'api' as 'static const'.
The rationale is that 'api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-01-24 21:25:06 +00:00
Tim Lin
8317f9ea4f ITE: drivers/gpio: Add keyboard-controller property
When set, this GPIO controller has pins associated with the
keyboard controller. In this case the reg_gpcr property is
overloaded and used to write the keyboard GCTRL register

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-01-24 21:48:12 +01:00
Talha Can Havadar
4ce0555d90 drivers: bmp581: Add BMP581 driver
This commit adds source and header files required for bmp581 I2C driver.
I have used bmp581_user.h to add more usage related definitions
but bmp581.h to add hardware related definitions.

Signed-off-by: Talha Can Havadar <havadartalha@gmail.com>
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
2024-01-24 09:32:34 -05:00
Marco Widmer
32b4388ba8 drivers: dma: stm32: do not clear busy flag in cyclic mode
The STM32 DMA driver supports cyclic mode by setting source_reload_en
and dest_reload_en. This causes the dma_callback to be called twice per
buffer run-through, at half-time and when wrapping back to the start of
the buffer.

However, the current implementation only calls dma_callback twice. When
wrapping the first time, it sets stream->busy to false and ignores
subsequent interrupts.

With this change, the busy flag is only cleared in non-cyclic mode.

Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
2024-01-24 14:56:24 +01:00
Guillaume Gautier
14839e80d5 drivers: adc: stm32: add support for two sampling time common channels
For series that have two sampling time common channels, only one was used.
This commit add the support for the second one. The first two different
acquisition time values are used for the sequence and all further values
must match either of them, otherwise generating an error.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-24 12:44:59 +00:00
Cong Nguyen Huu
7e5c260708 drivers: nxp_s32_canxl: remove support CAN FD mode for non-RX_FIFO
This is driver limitation after removing CAN_FILTER_FDF flag #65108.
CANXL driver need to know CAN_FILTER_FDF for configuring Rx filter
so that it receives CAN classic or CAN FD frames when using non RX_FIFO.
So update driver that just supports CAN classic for non RX_FIFO.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
2024-01-24 12:28:00 +00:00
Andriy Gelman
12bc02031e drivers: can_mcp251xfd: Fix setting data phase parameters
Commit eeec09eb9a unintentionally modified
can_calc_timing_data() to be called with the nominal phase parameters
instead of the data phase parameters.

Before the change, the parameters were properly initialized in the macro
MCP251XFD_SET_TIMING_MACRO(inst, _data).
After the commit, can_calc_timing_data() gets called with the parameters
pointing to dev_cfg->common.sample_point instead of
dev_cfg->commom.sample_point_data.

This PR creates a separate function mcp251xfd_set_timing_data()
which calls can_calc_timing_data with the correct data parameters.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2024-01-24 10:45:00 +01:00
Alberto Escolar Piedras
6447b1c4fd drivers/serial/uart_nrfx_uarte2: Fix for simulation
Just like for the old driver, for simulation, we cannot
get the UART regiter address for the pinctrl config structure
from DT, as that cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.

Also, do improve the condition for the busy wait during the poll_out,
for simulation, so we only busy wait if we will loop/the
Tx was busy.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-24 10:43:50 +01:00
Caspar Friedrich
8a2a44f9e9 drivers: adc: tla2021: Raise default initialization priority
The TLA2021 driver depends on it's i2c controller and therefore needs
to be initialized later. ADC_INIT_PRIORITY by default equals
KERNEL_INIT_PRIORITY_DEVICE which should be used by independent devices.
Using this by default causing projects to fail where this driver is
enabled implicitly through board configuration and the priority is not
explicitly set.

Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
2024-01-24 08:22:33 +01:00
Andriy Gelman
b302308e5f drivers: eth_sam_gmac: Use CONFIG_PTP_CLOCK_INIT_PRIORITY to init ptp
Use dedicated Kconfig symbol to set init priority.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2024-01-23 17:51:01 -05:00
Armando Visconti
72b3c3ea3a drivers: i2c: rv32m1: Fix build error
This fixes following build error when rv32m1_vega_zero_riscy
board gets compiled:

    implicit declaration of function 'INST_DT_CLOCK_IP_NAME'

Fixes #68012

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2024-01-23 18:14:16 +00:00
Laurentiu Mihalcea
6abc5921e1 drivers: dma: Introduce driver for NXP's eDMA IP
This commit introduces a driver for NXP's eDMA IP.

The main reasons for introducing a new driver are the following:

	1) The HAL EDMA wrappers don't support well different
	eDMA versions (e.g: i.MX93 and i.MX8QM). As such, a new
	revision had to be introduced, thus requiring a new Zephyr
	driver.

	2) The eDMA versions found on i.MX93, i.MX8QM, and i.MX8QXP
	don't use the DMAMUX IP (instead, channel MUX-ing is performed
	through an eDMA register in the case of i.MX93).

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-01-23 10:54:21 -05:00
Bjarki Arge Andreasen
b6c1bf8225 drivers: flash: sam: Use interrupt to sync
Use interrupt to wait for flash controller to finish
its command and become ready.

Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
2024-01-23 15:22:26 +00:00
Bjarki Arge Andreasen
efa4727296 drivers: flash: sam: Add logging
Add log messages to help diagnose and understand flash
driver behavior.

Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
2024-01-23 15:22:26 +00:00
Bjarki Arge Andreasen
ed854f008a flash: sam: Rewrite driver to dyncamically adapt to pages
This commit updates the driver to use the flash layout pages,
rewriting it to utilize the flash_page_layout.c driver to
avoid duplicate code.

Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
2024-01-23 15:22:26 +00:00
Michael R Rosen
193ad777f4 driver: adc: stm32: combine shared and separate irqs
Several STM32 variants include both shared IRQs for some ADCs and
separate IRQs for others (for example, STM32G473 has 5 ADCs, ADC1 and
ADC2 share one IRQ while ADC3, ADC4 and ADC5 each have unique
IRQs). The STM32 ADC driver however previously only supported either
separate IRQ lines for each operational ADC in the devicetree or a
single shared IRQ for all operational ADCs in the devicetree which
prevented all ADCs from being usable at the same time when the variant
contained a mix of both shared and separate ADC IRQ lines (only either
all the shared or all the separate and one of the shared might be used
at most for one application).

To allow for all ADCs in an STM32 variant to be usable in a single
application, generate an ISR and initialization function for each
unique IRQn as defined in the devicetree and give the task of
initialization to the first ADC which connects to that particular
IRQ. Each ISR function will generate code to call the ISR for each ADC
associated with that IRQn as was previously done for
CONFIG_ADC_STM32_SHARED_IRQS, allowing an ISR to be shared for the
ADCs sharing an IRQ while simultaneously providing separate ISRs for
each IRQ. Thus, the only information required to have ADCs either
share an ISR or not is provided by the devicetree.

Signed-off-by: Michael R Rosen <mrrosen@alumni.cmu.edu>
2024-01-23 15:21:55 +00:00
Benedikt Schmidt
2141bb4561 drivers: spi: fix unreliable SPI busy flag for some STM32 devices
Extend the workaround for the unreliable SPI busy flag
to all F7 and L4 devices, which are affected by the same
erratum.

Fixes  #67739

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-01-23 09:46:57 -05:00
Fabio Baltieri
1dd2307b3f input: gpio_qdec: add optical encoder support
Change the gpio_qdec driver to support optical encoders.

Add a property to use for defining an arbitrary number of GPIOs for the
sensing devices (typically infrared LEDs, but could also be the
biasing for the phototransistor), and one for adding a delay between
turning those on and reading the pin status.

The infrared LEDs typically consume a non negligible amount of power, so
there's also a new idle-poll-time-us property that enables two possible
modes of operation:

- if idle-poll-time-us is zero (default) the LEDs are enabled all the
  time and the driver enters polling mode using the GPIO interrupt as
  with mechanical encoders. This is usable for mains powered devices and
  has the lowest overhead on the CPU.

- if idle-poll-time-us is non zero, then the driver polls the encoder
  all the time, turning on the LEDs just before reading the state and
  shutting them off immediately after, but when the encoder is idle it
  switches the polling rate to idle-poll-time-us to save power, and only
  polls at sample-time-us when some movement is detected.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-01-23 09:45:57 -05:00
Fabio Baltieri
91ee5c4db2 input: gpio_qdec: rename gpio to ab_gpio
Rename gpio to ab_gpio, this is in preparation for adding another gpio
pointer.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-01-23 09:45:57 -05:00
Anas Nashif
6df6935b67 intel_adsp: ace: do not use external kconfigs in code
use CONFIG_SOC_INTEL_ACE15_MTPM instead of CONFIG_ACE_VERSION_1_5.

CONFIG_ACE_VERSION_1_5 leaked from SOF.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-01-22 17:02:47 -05:00
Pisit Sawangvonganan
78faf5eb8e drivers: gnss: quectel_lcx6g: fix compilation error when CONFIG_PM_DEVICE=y
Fixes a compilation error in quectel_lcx6g driver when CONFIG_PM_DEVICE=y.
Corrects the function call in quectel_lcx6g_suspend from
'modem_chat_run_script_run' to 'modem_chat_run_script'.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-01-22 14:08:58 +00:00
Henrik Brix Andersen
4340724fd0 drivers: can: use common accessor for getting maximum supported bitrate
Use a common accessor for getting the maximum supported bitrate of a CAN
controller.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-22 13:09:09 +01:00
Henrik Brix Andersen
766ce3c1e2 drivers: can: fake: add common configuration and data structures
Add common configuration and data structures to the fake CAN driver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-22 13:09:09 +01:00
Henrik Brix Andersen
fb639ab81b drivers: can: loopback: add common configuration structure
Add the common configuration structure to the CAN loopback driver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-22 13:09:09 +01:00
Tomas Galbicka
a689228eb8 drivers: mbox: fix nxp mbox data read channel
This commit repairs reading of data from other
channels than 0.

Refactors irq handler outside of DT define.

Trigger registered callback only when proper flag is set.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2024-01-22 09:48:09 +00:00
Ian Morris
5fd3f658ff drivers: clock_control: clock_control_ra.c: protect register fix
Protection for clock control and power mode registers was not being
re-enabled.

Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
2024-01-22 09:47:43 +00:00
Henrik Brix Andersen
3436c93387 drivers: can: remove run-time RTR filtering, add build-time RTR filter
A growing number of CAN controllers do not have support for individual RX
hardware filters based on the Remote Transmission Request (RTR) bit. This
leads to various work-arounds on the driver level mixing hardware and
software filtering.

As the use of RTR frames is discouraged by CAN in Automation (CiA) - and
not even supported by newer standards, e.g. CAN FD - this often leads to
unnecessary overhead, added complexity, and worst-case to non-portable
behavior between various CAN controller drivers.

Instead, move to a simpler approach where the ability to accept/reject RTR
frames is globally configured via Kconfig. By default, all incoming RTR
frames are rejected at the driver level, a setting which can be supported
in hardware by most in-tree CAN controllers drivers.

Legacy applications or protocol implementations, where RTR reception is
required, can now select CONFIG_CAN_ACCEPT_RTR to accept incoming RTR
frames matching added CAN filters. These applications or protocols will
need to distinguish between RTR and data frames in their respective CAN RX
frame handling routines.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-21 11:00:31 +01:00
Ryan McClelland
83c298cd32 drivers: spi: dw: define max-xfer-size
The max size was determined by looking at the ARCH of the cpu. This really
comes from the ip configuration when generated. Add `max-xfer-size`
property to the devicetree.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2024-01-20 13:11:42 +01:00
Ryan McClelland
ff99687862 drivers: spi: dw: fix hw cs and slave return rx len
Only toggle the hw cs if the cs is not set as a gpio. SPI trancieve
should also return the rx len when in slave configuration.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2024-01-20 13:11:42 +01:00
Ryan McClelland
909da582c5 drivers: spi: dw: cleanup instantiation macro
This cleans up the instantiation macro. DBG_COUNTER was also removed
as that appears to be unnecessary. This also allows for if it is a
serial target to be configured from the devicetree.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2024-01-20 13:11:42 +01:00
Ryan McClelland
2ee2b6ac08 drivers: spi: dw: remove HAS_SPI_DW Kconfig
The HAS_SPI_DW Kconfig is rather unncessary. If the synopsys designware
spi is to be included. It should come from the devicetree.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2024-01-20 13:11:42 +01:00
Daniel DeGrasse
429188723e drivers: sdhc: sdhc_spi: wait for card response until cmd timeout
In sdhc_spi_response_get, the logic for slow cards previously only
retried reads 16 times. Instead of using this approach, read from the
card every 10 ms until the command timeout is reached or it responds.
This way, the command timeout will be respected for cards that do not
respond.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-01-20 12:44:02 +01:00
Martin Kiepfer
5a3f53551f drivers: display: gc9a01a: Add support for SPI display controller gc9a01a
Adding driver for GC9A01A 240x240 based LCD displays.
Should be working with GC9C01 as well (untested).

Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
2024-01-20 12:40:15 +01:00
Parthiban Nallathambi
db429004fd drivers: modem: gsm fix rssi range
rssi 31 will be -51dBm or greater, where -51 is valid. Fix the
range by allowing until -51.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2024-01-19 15:15:03 +00:00
Tanmay Kathpalia
aeb25e3da1 drivers: sdhc: Cadence SDHC driver bug fixes and other improvements
* Internal Clock not getting stable during initialization
* SD clock was not enabled
* Removed duplicate file.
* Removed write to readonly registers
* Moved function pointer structure from data section to RO section
* Wrong macro names
* Refactoring of lower layer header file.

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@intel.com>
2024-01-19 15:14:17 +00:00
Gerard Marull-Paretas
0c5a2b1fe4 soc: riscv: microchip_miv: miv: move MIV_UART_0_LINECFG to driver
Instead of soc.h, since it's not used by anything else.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
a63591c5cb drivers: timer: litex: add missing include
<soc.h> is needed to access IO R/W functions like litex_read8.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
ed166915bb drivers: spi: rv32m1_lpspi: add missing include
Add <soc.h>, for INST_DT_CLOCK_IP_NAME.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
893a338f05 drivers: serial: opentitan: remove redundant include
<soc.h> is not needed.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
5e17b89804 drivers: serial: liteuart: add missing include
soc.h was missing to access custom IO read/write functions, e.g.
litex_read8.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
183dd20424 drivers: serial: neorv32: add missing include
<soc.h> is needed for some NEORV32_SYSINFO_* definition.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
7e3b3dd258 drivers: pinctrl: sifive: use DT ngpios property
Instead of hardcoded definitions from soc.h.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
3381fb4b3d drivers: intc: plic: remove redundant include
<soc.h> is not needed.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
436a9f2211 drivers: intc: nuclei_eclic: remove unnecessary include
soc.h is empty for this platform.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
1a0c13d4ae drivers: i2c: mchp_mss: remove redundant include
<soc.h> is not needed.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
0e9084ff9c drivers: i2c: litex: add missing include
soc.h was missing for some IO r/w functions, e.g. litex_write8.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
9e8bd2f976 drivers: gpio: sifive: remove unnecessary check
The API already asserts for invalid pin based on DT `ngpios` property.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
0363b74b38 drivers: gpio: mchp_mss: remove redundant include
<soc.h> is not needed.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00