Commit graph

23353 commits

Author SHA1 Message Date
Navinkumar Balabakthan
a8490c3c3e drivers: interrupt_controller: changes in shared irq
Updated the shared IRQ handler function in the shared interrupt controller
drivers to include support for the 'irq_number' parameter. When a single
driver manages multiple shared IRQs, it becomes challenging to determine
which IRQ line is invoking the handler. Therefore, I've introduced an
option to share the IRQ number to address this issue.

Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
2024-01-31 13:47:39 -06:00
Anas Nashif
a1e03d079a console: winstream: define as a proper console
eb2e5de01c made this a console driver but without adding the needed
hooks. This adds the hooks to support the console interface.

Fixes #65987
Fixes #66264

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-01-31 19:19:19 +01:00
Anas Nashif
8b80a2fd04 drivers: dma: andes: remove soc.h inclusion
Not needed or present soc.h

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-01-31 18:22:10 +01:00
Jeff Welder
59a87038df drivers: veml7700: Add white channel
Add the white light channel to the
veml7700 sensor to allow for correction
of light sources with strong infrared
content.

Signed-off-by: Jeff Welder <Jeff.Welder@ellenbytech.com>
2024-01-31 10:44:33 -06:00
Dino Li
a059da947c soc/it8xxx2: add support for raising EC bus to 24MHz
This change was made to reduce read/write EC registers latency.
Without enabling CONFIG_SOC_IT8XXX2_EC_BUS_24MHZ:
- Read EC register 64 times takes 80us latency.
- Write EC register 64 times takes 60us latency.
With enabling CONFIG_SOC_IT8XXX2_EC_BUS_24MHZ:
- Read EC register 64 times takes 40us latency.
- Write EC register 64 times takes 30us latency.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2024-01-31 16:43:46 +00:00
Daniel DeGrasse
3dbbb73319 drivers: display: ili9xxx: convert to MIPI DBI API
Convert ili9xxx display drivers to use MIPI DBI API. Due to the fact
this change requires a new devicetree structure for the display driver
to build, required devicetree changes are also included in this commit
for all boards and shields defining an instance of an ili9xxx display.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-01-31 16:01:45 +00:00
Daniel DeGrasse
571de47e16 drivers: mipi_dbi: add SPI based MIPI DBI mode C driver
SPI controllers can easily implement MIPI DBI mode C, with the help of
GPIO pins for the reset and command/data signals. Introduce a MIPI DBI
compliant SPI driver, which emulates MIPI DBI mode C (SPI 3 and 4 wire).

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-01-31 16:01:45 +00:00
Daniel DeGrasse
3ab6572856 drivers: mipi_dbi: introduce MIPI DBI driver class
Introduce MIPI DBI driver class. MIPI DBI devices encompass several
interface types. All interfaces have a data/command, reset, chip select,
and tearing effect signal

Beyond this, MIPI DBI operates in 3 modes:

Mode A- 16/8 data pins, one clock pin, one read/write pin. Similar to
Motorola type 6800 bus

Mode B- 16/8 data pins, one read/write pin. Similar to Intel 8080 bus

Mode C- 1 data output pin, 1 data input pin, one clock pin.
Implementable using SPI peripheral, or MIPI-DBI specific controller.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-01-31 16:01:45 +00:00
Armando Visconti
4828340b92 drivers/sensor: add support to LIS2DE12 accelerometer
The LIS2DE12 is an ultra-low-power high- performance three-axis
linear accelerometer belonging to the “femto” family with digital
I2C/SPI serial interface standard output.

This driver is based on stmemsc HAL i/f v2.3

https://www.st.com/en/datasheet/lis2de12.pdf

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2024-01-31 15:39:45 +01:00
Armando Visconti
dadac5d0ce drivers/sensor: stmemsc: add new sets of i2c/spi APIs
Add APIs to:

    1. read/write sensor regs on i2c/spi bus enabling adrress
       auto-increment in a stmemsc specific way.
    2. read/write sensor custom APIs.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2024-01-31 15:39:45 +01:00
Kevin Wang
c181dcced4 drivers: spi: Support dma mode for atcspi200
1. Support the dma mode for andes_atcspi200
   and use board adp_xc7k_ae350 for testing.
2. Refine the function mechanism.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2024-01-31 15:03:28 +01:00
Kevin Wang
a02011bac6 drivers: spi: Refine some coding style for andes_atcspi200
1. Remove the redundant code.
2. Use sys_set_bits and sys_clear_bits instead of customized MACRO.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2024-01-31 15:03:28 +01:00
Najumon B.A
34a2fbfba1 drivers: pci: update prt retrieve based on pnp id
update prt retrieve based on acpi pnp id instead of acpi device
path/name

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-01-31 15:03:06 +01:00
Naga Sureshkumar Relli
4d6a8bc65a drivers: spi: Add support for Polarfire SOC SPI
Add driver for the Microchip Polarfire SOC MSS SPI controller.
The interrupts of the MSS SPI are routed through PLIC(Platform level
interrupt controller).

Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).

Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
2024-01-31 06:36:21 -05:00
Mykola Kvach
739ec3072b drivers: serial: add missed binding for xen dom0 consoleio driver
Add missed binding and appropriate changes for Xen Dom0/Dom0less
UART driver.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2024-01-30 18:52:13 -05:00
Jordan Yates
ef21569ac9 wifi: conn_mgr connectivity bindings
Bind WiFi network devices to the generic WiFi connectivity backend if
the appropriate option is set.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2024-01-30 18:51:46 -05:00
Magdalena Pastula
5a32e6e21c drivers: hwinfo: update to be aligned to nRF54L15
Update hwinfo driver to be aligned to nRF54L15.

Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
2024-01-30 21:00:44 +00:00
Witold Lukasik
6d3009ff2b drivers: cache: add Nordic cache driver
Add Nordic driver for cache.

Signed-off-by: Witold Lukasik <witold.lukasik@nordicsemi.no>
2024-01-30 21:00:44 +00:00
Magdalena Pastula
b605c4219b drivers: timer: add GRTC driver
Add Nordic driver for GRTC.

Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
2024-01-30 21:00:44 +00:00
Witold Lukasik
ae78cf017d drivers: timer: move SYSTEM_CLOCK_WAIT to Kconfig.nrf_xrtc
SYSTEM_CLOCK_WAIT will be a common part for a next
version of Nordic timer.

Signed-off-by: Witold Lukasik <witold.lukasik@nordicsemi.no>
2024-01-30 21:00:44 +00:00
Magdalena Pastula
9b3b34f16e drivers: serial: align to nRF54L15
Align UARTE driver config to nRF54L15.

Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
2024-01-30 21:00:44 +00:00
Andriy Gelman
c7dab3df08 drivers: can: Add xmc4xxx CAN support
Adds CAN drivers for XMC4xxx SoCs.

XMC4xxx has multiple CAN nodes. The nodes share a common clock and
a message object pool.

The CAN nodes do not have a loopback mode. Instead there is an
internal bus which can be used to exchange messages between
nodes on the SoC. For this reason tests/samples which rely on the
loopback feature have been disabled.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2024-01-30 19:06:06 +01:00
Navinkumar Balabakthan
966c4c37ab drivers: flash: Added cdns Nand Driver
Added Cadence NAND driver to support reading, erasing and writing data.

Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
2024-01-30 18:01:31 +01:00
Guillaume Gautier
624139ad9a drivers: clock_control: stm32wba: remove disabling of backup access
Disabling Backup access prevents Suspend to RAM to work.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-30 18:01:00 +01:00
Guillaume Gautier
b097e3198f drivers: clock: wba: add get status function
Add a function to get the clock status on STM32WBA

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-30 18:01:00 +01:00
Wei-Tai Lee
ab97a44096 drivers: i2c: andes: Remove the inclusion of soc.h
Remove the inclusion of empty file which will cause
twister-build error.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-01-30 17:56:07 +01:00
Gerard Marull-Paretas
5ef7404c7c drivers: spi: ifx_cat1: drop non-existing DT properties
It looks like driver references quite a few non-existing properties in
devicetree (see dts/bindings/spi/infineon,cat1-spi.yml). This mistake
was hidden because of DT_INST_PROP_OR(), which expands to the default if
the property is not present. However, after
260fc89643, the issue became visible
because sme DT_INST_PROP_OR() were changed to DT_INST_PROP().

Note that only fields not initialized to 0 (or false) have been kept.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-30 17:44:18 +01:00
Guillaume Gautier
62f1105550 drivers: adc: stm32: do not disable adc after measurement
Do not disable the ADC after the end of the measurement to avoid systematic
enabling which is time-consuming in case the configuration is unchanged.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-30 14:13:28 +00:00
Emil Lindqvist
548fb97142 cache: stm32: add new cache API to display and i2s
Use sys_cache API to handle cache flush/invalidate.

Signed-off-by: Emil Lindqvist <emil@lindq.gr>
2024-01-30 14:12:57 +00:00
Laczen JMS
50597b2e52 flash: correct userspace flash_handlers
fixes #68248

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2024-01-30 08:30:32 -05:00
Pisit Sawangvonganan
defab59dc4 drivers: can: mcp251xfd: reducing number of *reg pointer dereferences
Reducing the number of times the code dereferences the pointer *reg,
which points to SRAM. By using a local variable tmp for operations before
assigning it to *reg.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-01-30 08:29:52 -05:00
Guillaume Gautier
ffb581a552 drivers: counter: stm32 rtc: add basic pm support
Add basic PM support for STM32 RTC counter.
It is useful for Suspend to RAM support to reenable the RTC register clock
after wakeup from Standby.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-30 10:49:22 +01:00
Armin Brauns
6a41a7abba drivers: mcp23xxx: explain more common causes for spurious interrupts
Interrupt handling in this chip is broken beyond repair, anyone unfortunate
enough to have to use it will probably come across this error and wonder
what's up.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2024-01-30 08:46:39 +01:00
Roman Studenikin
260fc89643 drivers: use DT_INST_PROP over DT_INST_PROP_OR if possible
It might happens that DT(_INST)_PROP_OR is used with boolean properties.
For instance:

	.single_wire = DT_INST_PROP_OR(index, single_wire, false),	\
	.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false),	\

This is not required as boolean properties are generated with false
value when not present, so the _OR macro extension is superflous
and the above code can be replaced by:

	.single_wire = DT_INST_PROP(index, single_wire),		\
	.tx_rx_swap = DT_INST_PROP(index, tx_rx_swap),			\

Signed-off-by: Roman Studenikin <srv@meta.com>
2024-01-30 00:26:58 +00:00
Sumit Batra
67474db716 drivers: sensor: qdec_s32k: fix double promotion warning
Fixing this "revealed" bug which got introduced when
a PR added the -Wdouble-promotion flag to GCC builds

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2024-01-29 20:24:52 +00:00
Francois Ramu
7795558ad5 drivers: flash: stm32 flash base address from the DTS node
For the flash driver, the base address is the MCU internal flash
address (usually 0x8000000). This PR gets the that address
from the device tree node "st,stm32-nv-flash"
instead of relying on the CONFIG_FLASH_BASE_ADDRESS
which might differ when building for another flash memory.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-01-29 14:12:47 -06:00
Benedikt Schmidt
5a2359332f drivers: gpio: fix build of BD8LB600FS on intel_adl_crb
Fix the build of the gpio driver BD8LB600FS on the
board intel_adl_crb.
Fixes #68219.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-01-29 10:26:08 -06:00
Tomasz Moń
76e12a33d9 drivers: i2s_nrfx: Generate master clock if pin is connected
The driver uses pinctrl to configure pins instead of nrfx I2S API.
Check whether MCK pin was actually connected by pinctrl instead of
comparing nrfx_cfg.mck_pin that is always NRF_I2S_PIN_NOT_CONNECTED.

This makes it possible for nRF I2S to provide master clock even when
operating in I2S Slave mode.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2024-01-29 14:03:20 +01:00
Marc Desvaux
c7cc58ca77 drivers: usb_dc_stm32: Fix OUT transfer issue
The driver cannot handle OUT transactions for an endpoint with an
MPS smaller than 64 bytes. To solve the issue, we will not use one
fixed value, EP_MPS, but instead use the actual MPS of an endpoint,
ep_state->ep_mps.

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2024-01-29 11:07:22 +00:00
Bjarki Arge Andreasen
98d95851c6 drivers: gnss: lcx7g: Add Kconfigs for configurable buffers
Added Kconfigs to define the size of:
- UART backend receive buffer
- UART backend transmit buffer
- Satellites array size

and increased the UART RX buffer size a default to 256 as 128
is just on the edge of to small at a baudrate of 115200.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2024-01-29 10:58:58 +00:00
Bjarki Arge Andreasen
41240f9fb1 drivers: gnss: lcx7g: Close pipe on suspend
The pipe should be closed when suspended, both to save ressources
and to flush it. Without flushing the pipe, the driver may fail
to either resume or suspend the GNSS as the chat module starts
processing old data, which can contain acks to commands, breaking
the scripts.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2024-01-29 10:58:58 +00:00
Bjarki Arge Andreasen
59b9a86f30 drivers: gnss: lcx7g: Refactor power management
The implementation of power management did not account for
being on a power domain when initializing, and handling being
powered on and off at runtime.

The GNSS requires time to start up, which it always does when
powered on, before accepting commands. It also requires time
after resuming and suspending before accepting commands.

This commit implements this timeout, and improves logging to
make the power management more transparent, and removes some
redundant parenthesis for better readability.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2024-01-29 10:58:58 +00:00
Bjarki Arge Andreasen
a9ffd91294 drivers: gnss: lcx6g: Remove left over from testing
The k_msleep() removed with this has no utility.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2024-01-29 10:58:58 +00:00
Aymeric Aillet
ff4b9ebd65 drivers: clock: rcar: harmonize r8a7795 and r8a779f0 drivers
Based on edit done at r8a779f0 driver creation
(f5634a1a0e6f607809a7e4b8d1933a85b5eb7642)
following comments on #56043.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:33:09 +01:00
Aymeric Aillet
d2e79866ad drivers: clock: rcar: r8a7795 driver cleanup
Remove old unused defines from header
Use clang-format to apply coding guideline to r8a7795 driver

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:33:09 +01:00
Aymeric Aillet
48dc603f0c drivers: serial: Rename renesas ra driver
Need this rename to be able to target this driver
in the "Renesas RA" maintainer area.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:32:46 +01:00
Aymeric Aillet
9db09d8dc0 drivers: pinctrl: Rename renesas ra driver
Need this rename to be able to target this driver
in the "Renesas RA" maintainer area.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:32:46 +01:00
Aymeric Aillet
1cd2ce1cc7 drivers: intc: Rename renesas ra driver
Need this rename to be able to target this driver
in the "Renesas RA" maintainer area.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:32:46 +01:00
Aymeric Aillet
fd04892322 drivers: gpio: Rename renesas ra driver
Need this rename to be able to target this driver
in the "Renesas RA" maintainer area.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:32:46 +01:00
Aymeric Aillet
fe02e32f86 drivers: clock: Rename renesas ra driver
Need this rename to be able to target this driver
in the "Renesas RA" maintainer area.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:32:46 +01:00