Do not schedule isochronous data on current frame. While doing so can
work at Full-Speed, it is pretty much impossible to do it quickly enough
at High-Speed.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Move the lock out from the `plic_irq_enable_set_state()` function
to cover the entire configuration process, so the whole of
enable/disable is atomic.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Fixing a bug where during the bus_init routine, when a slave is
initialized, the target hardware can get an interrupt, and this can occur
before the target_config structure is assigned; the generic IRQ handler
attempts to use this structure to grab callback function pointers, but
with no target config it attempts to access the structure member from a
null pointer. Fix works by adding ternary operation during IRQ that first
checks if target_config is null or not.
Signed-off-by: Matthew Mulloy Steinborn <mulloystmatthew@meta.com>
TMP variant without combine channel feature is used in some NXP SoCs.
Build error occurs for such socs because of accessing unavailable
struct member in hal.
Fix it by adding #if directive to check the feature presence.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Before unmapping a memory page, the cache is flushed. If the given memory
page is not mapped, this operation ends with a cpu exception on the
ptl platform. Add check if tlb translation is active before flushing.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The existing hwinfo driver for STM32 is incompatible with STM32WB0 series.
Prevent compiling the driver if the target's series is STM32WB0.
This fixes the build failure on the drivers.hwinfo.api test.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Adds a basic driver for the STM32WB0 flash controller (read/erase/write).
Extended operations are not supported by this driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Adds a driver for the STM32WB0 series GPIO interrupt controller.
This driver implements the STM32 GPIO INTC API, along with an extension
function used to check if a specific line is available on current board.
This also extends the GPIO INTC API to support level-sensitive interrupts,
as this feature is available on STM32WB0.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Common counter driver based on timer for MAX32xxx MCUs
To use as wakeup source wakeup-source parameter shall be
defined as below
&lptimer0 {
status = "okay";
clock-source = <ADI_MAX32_PRPH_CLK_SRC_ERTCO>;
wakeup-source;
counter {
status = "okay";
};
};
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
There is a regression caused by #76177, which
causes build to fail due to missing includes and others.
This wraps it with proper checks and fixes wifi scan call.
This also remove unused variable present in the same driver.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
- enabled combined interrupt configuration for stm32u0x serie.
- since stm32u0 serie doesn't support SMBUS we need to avoid
use SMBHEN and SMBDEN bits register.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
There are numbers of drivers for different PCA(L) series chip. They
share similiar register layout and control logic. This driver intends
to unify these drivers for PCA(L)xxxx series i2c gpio expanders.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Implement an option manual reset of the PCAL64XXA to allow the external
implementation of a retention of the port expander state.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Extract method which applies the initial state in the driver
for the port expander PCAL64XXA.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
On some i.MX SoCs, such as i.MX95, the System Manager is running on a
Cortex-M core to manage the hardware resources and provide services for
SCMI requests.
So add the SCMI-based pinctrl driver to support these i.MX SoCs.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The MU init should be very early for some platforms. For examples,
i.MX95 is using MU for ARM SCMI. It should be initialzied early
for next power, pinctrl, clock etc. management.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
GRTC needs to use direct clock source path instead of system clock path
to support ELV mode for nRF54L targets.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Add support the ccc deftgts. This also includes a function to check if
there is a secondary controller on the bus, and will transmit deftgts
after initialization or a hotjoin event.
This also adds dynamic_addr to the config_target in order to retrieve
the currently configured dynamic address to be used with deftgts.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Adds a new DTS prop for i3c devices as support for the CCC SETAASA
requires prior knowledge of the target if it supports it according
to i3c spec v1.1.1 section 5.19.3.23.
This will be used as an optimization for bus initialization.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This supports the minimum of what is required to allow the AES hardware
to be used (memory to peripheral, peripheral to memory).
In addition, to pass some of the existing unit tests, it also supports
memory to memory operators.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Move the transfer process codes to work context becuase
it lock the mutex, move bus reset process codes too
because it calls some common udc apis (they may add
mutex lock in future).
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Add condition for KConfig Renesas FSP hal module
Move the DUAL_BANK_MODE from SOC to flash driver KCONFIG
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Only read the compensation parameters from the chip on first power up,
as they are static on the device.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Support the BME680 being on a power domain, which may not be powered at
boot. For example, Nordic Thingy53.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Due to the introduction of `shell_xxx_impl` wrapper functions in
PR #75340 and rename to `shell_fprintf_xxx` in PR #77192 we can minimize
caller overhead by eliminating direct `color` parameter passing.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Blanking On/Off calls should not return 0 when there is no panel
controller to forward them to, instead they should return ENOSYS to
signal to the application that they were not actually executed.
"device_is_ready" does check for null, but also for
"dev->state->initialized == false", so we need to isolate the
"dev == NULL" case.
Signed-off-by: Abderrahmane Jarmouni <git@jarmouni.me>
