`gpio_xec_pin_interrupt_config` returned early when the computed IDET
configuration matched the current CR1 IDET field. On some reset paths
the GPIO control register can retain the same IDET value while the
interrupt aggregator state is reset/reconfigured. In that case, the
early return prevents re-enabling the aggregator and interrupts remain
disabled.
Remove the IDET equality early-return so the driver always updates the
level/edge bookkeeping and programs the interrupt aggregator enable
state.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Currently, scmi_send_message()'s logic is split across two functions,
each of which handling either polling or interrupt-based reply waiting.
Since the two functions are pretty much similar, merge them together in
a single scmi_send_message() function, which is able to handle both wait
startegies.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
So far, the SCMI core has been in charge of enabling/disabling the "poll
for message reply" logic by directly using functions from MBOX/SHMEM.
This behavior should be abstracted away by a simple transport layer
send_message() function, with the SCMI core not having to know (or care)
about which kind of transport is being used.
To fix this problem, move the polling logic to the transport layer. Now,
based on the value of the "use_polling" parameter propagated from the SCMI
core, SHMEM will set/clear the interrupt-related bit from the flags
portion of the SHMEM area.
Note that now we only alter the state of the SHMEM flags with the MBOX
interrupts being enabled at all times. This should be enough to signal
the SCMI platform that the agent is not interested in receiving interrupts
whenever polling is enabled.
This commit is part of #102904.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add a new parameter to SHMEM's write_message() functon, which is meant to
allow it to perform the required configuration whenever the SCMI stack
(via the SCMI transport layer) wishes to poll for the reply.
For now, don't implement any logic related to this. Thus, no functional
change.
This commit is part of #102904.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add a new parameter to the transport layer's send_message() function,
which is meant to allow it to perform the required configuration whenever
the SCMI stack user (via the SCMI core layer) wishes to poll for the
reply.
For now, don't implement any logic related to this. Thus, no functional
change.
This commit is part of #102904.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
stepper-ctrl is used as suffix for motion control drivers
stepper-driver is used as suffix for stepper drivers in mfd devices
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
Verify the return value of gpio_pin_configure_dt() when configuring
the codec reset GPIO.
Previously, failures during GPIO configuration were ignored, which
could leave the codec in an undefined state while the initialization
sequence continued.
Propagate the error to the caller to ensure proper failure handling.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Add initial support for Analog Devices ADE7978 isolated energy
metering IC for polyphase shunt meters.
The driver implements the Zephyr sensor API and provides:
- SPI communication (read/write 8/16/32-bit registers)
- Phase A RMS current measurement (SENSOR_CHAN_CURRENT)
- Phase A RMS voltage measurement (SENSOR_CHAN_VOLTAGE)
- Device Tree bindings
This is an initial minimal working implementation. Future enhancements
will include:
- Multi-phase support (Phase B, C, Neutral)
- Active and reactive power measurement
- Interrupt support
- Calibration API
Signed-off-by: Filip Stojanovic <filipembedded@gmail.com>
For the F9P, we can use the UBX_KEY_UART1_PROTO_OUT_NMEA rather than
individually disabling all the messages.
For the m8, the NMEA output is already disabled when the CFG-PRT is done
from the u_blox_iface_init.
But this is not necessarily done in case the expected baudrate is already
set.
Let's keep the individual NMEA disabling for M8.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
Be consistent and use that.
Only select the U_BLOX_PROTOCOL, the MODEM_UBX comes from the indirection.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
The common interface can now be used by both drivers, use it.
select GNSS_U_BLOX to have access to the GNSS_U_BLOX_SATELLITES_COUNT
and the GNSS_U_BLOX_RESET_ON_INIT.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
GNSS_U_BLOX should be selected by u-blox receiver to have access to the
common configuration, which for now is only the number of satellites to
store and the reset on init functionality.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
No point in doing the baudrate configuration dance if the receiver is
already in the desired baudrate.
Only do the baudrate_configuration if trying to get the version failed.
Introduce a private msg_get() API which can take the timeout/retry_count
because the previously existing u_blox_iface_msg_get() hardcodes the
timeout to 3s with some retries which would be very wasteful to use if
the receiver is not in the expected baudrate as we would timeout.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
Used to configure the baudrate with the more modern UBX-CFG-VALSET
if supported, and falling back on UBX-CFG-PRT otherwise.
Adding the UART1 related configuration keys.
Just using the baudrate one, relying on the other default parameters.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
This gnss_u_blox_iface will be used by the gnss_u_blox_f9p.c and
gnss_u_blox_m8.c drivers.
Those two drivers currently define their own APIs which are
extremely similar.
The struct u_blox_iface_config is taken from the m8 flavor, as it allows
for baudrate configuration (while the f9 flavor requires the UART and the
receiver configuration to be the same).
The struct u_blox_iface_data is taken from the f9 flavor, which uses one
lock for logically separated resources (req_buf_lock and lock).
The init is done according to the m8 logic, which reconfigures the
baudrate of the receiver.
This is done with the UBX-CFG-PRT message, but the F9 could do that with
the more modern valset configuration mechanism.
This will be added in the following commit.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
In a few series managed by the common driver, the LSEDRV field is not in
RCC_BDCR but a different register.
Use proper register name when obtaining the shift to ensure a non-zero
driving capability can be used on these series.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Enabling the IEEE802154 CSL endpoint to support MCXW72 as a SEED role.
prj-ot-host.conf and sample.yaml corrected for compilation purpose.
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
CSL receiver is managed as follows:
- Started in mcxw_tx() when CSL period is configured
- Synchronized in set_csl_sample_time() for RX slots
- Stopped after PHY operations in SAP handlers
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
Several NXP drivers require clock control subsystem name definition in
Devicetree. It prevents usage of clock control without subsystem such
as fixed-clock. fixed-clock can be used for early SoC enablement when
complete clock controller is not available or not required.
Allow optional usage of clock control without subsystem by using 0 as
subsystem name if the name is not defined in devicetree. Add the option
for port, i2c, spi and serial drivers.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Change default boot time of nRF91 Sip running Serial Modem
application.
If reset-line is toggled, we need to wait for the boot. Otherwise,
the init script starts too soon.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Some modems enter a power-up sequence if reset line is held active,
so we need a way to alter the GPIO behavior.
Define a "zephyr,mdm-reset-behavior" enum in device tree to allow
choosing one, or all of the supported behaviors
* hold_on_suspend
* toggle_on_resume
* toggle_on_recovery
By default, all of the behaviors are enabled, so it matches the
previous implementation.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
The micsr_* helpers use a two-step MISELECT+MIREG sequence that is not
atomic. If an interrupt fires between writing MISELECT and accessing
MIREG, the handler could modify MISELECT, causing the MIREG operation
to target the wrong indirect register.
Wrap the MISELECT+MIREG sequence in each micsr_* helper with
irq_lock/irq_unlock to prevent preemption during the two-step access.
This ensures all callers are automatically protected without needing
to add locking at each call site.
Move the micsr_* helpers from csr.h into a new icsr.h header to avoid
pulling zephyr/irq.h into csr.h, which causes circular dependencies
on some SoCs. Code that needs indirect CSR access now explicitly
includes icsr.h.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Add support for the STM32WL integrated sub-GHz radio to the native
SX126x driver. The STM32WL has an SX126x-compatible radio core but
uses internal peripherals instead of external GPIOs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Extract common HAL functions shared between different SX126x
implementations into sx126x_hal_common.c, this prepares the driver for
supporting additional platforms like the STM32WL integrated radio.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add a watchdog timer driver for all Bouffalo Lab SoC families.
Tested on Sipeed M0Sense (BL702) with tests/drivers/watchdog/wdt_basic_api.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Extract five helpers from i2c_bflb_transfer to reduce cognitive
complexity from ~45 to ~15:
- i2c_bflb_check_msgs: validate message lengths and 10-bit addressing
- i2c_bflb_wait_idle: busy-wait for bus idle
- i2c_bflb_wait_completion: wait for transfer end with error checks
- i2c_bflb_do_read: read path with scatter into msg buffers
- i2c_bflb_do_write: write path with 0-length probe workaround
Also check return values of i2c_bflb_read/i2c_bflb_write that were
previously ignored, and fix num_msgs <= 0 to == 0 (uint8_t).
Signed-off-by: William Markezana <william.markezana@gmail.com>
Fix uninitialized k_timepoint_t in read/write paths that caused
undefined timeout behavior. Add early NAK/error detection in the
transfer loops to fail fast instead of spinning until timeout.
Remove unnecessary __no_optimization attributes.
Tested on Sipeed M0Sense (BL702) with I2C peripherals across
PDS sleep/wake cycles.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Add a hardware info driver for the Bouffalo Lab BL70x SoC family
that reads the unique device ID from the on-chip efuse.
Tested on Sipeed M0Sense (BL702).
Signed-off-by: William Markezana <william.markezana@gmail.com>
Add support for configuring the voltage rail used for the nWKRQ
pin. Previously, the driver hard-coded this to VIO, open-drain.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Switch to use k_usleep() instead of k_busy_wait() in tcan4x5x_reset()
function, waiting for the reset to complete.
Initially, the tcan4x5x_reset() function was only ever called during driver
initialization, where busy waiting for 1000 microseconds was not an issue,
but since adding device power management support, this function can now
also be called during device resume.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This PR adds support for W6100 spi ethernet controller.
This driver is tested on the w6100-evb-pico
https://docs.wiznet.io/Product/Chip/Ethernet/W6100
Signed-off-by: Sayed Naser Moravej <seyednasermoravej@gmail.com>
HSLV now handled by stm32_iocell driver and board device tree.
LL_PWR_EnableXSPIM2 called already in SoC initialization:
soc/st/stm32/stm32h7rsx/soc.c
Signed-off-by: Adam BERLINGER <adam.berlinger@st.com>
The GPIO ISR needs both a pointer to the device object and its data block
(because the callback linked list is stored in the data block). Sicne the
device object has a built-in pointer to the data block, using that as the
ISR's argument allows obtaining all we need "for free" whereas the current
approach wastes 4 bytes of RAM per GPIO port instance.
Note that once compiled, the reworked ISR is effectively identical to the
old one (only the offset of one `ldr Rt, [Rn, #off]` changes).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Changes added to make g1 driver to be used across multiple
SoC's and also avoids use of multiple SOC symbols in the
source file for selecting between the similar but differently
named macros and reg definitions across multiple DFP's.
Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
