Commit graph

65 commits

Author SHA1 Message Date
Aaron Ye d84874309e drivers: spi: create Ambiq SPI BLEIF driver
Some Ambiq Apollox Blue SOC (e.g. Apollo3 Blue) uses internal designed
BLEIF module which is different from the general IOM module for SPI
transceiver. The called HAL API will also be independent. This driver is
implemented for the BLEIF module usage scenarios.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2024-05-27 03:27:43 -07:00
Nerijus Bendžiūnas b394664dd9 spi: shell: add simple SPI shell
Inspired by I2C shell. Useful during
SPI device driver development or for debugging.

Usage example (read JEDEC ID):

```
uart:~$ spi conf spi4 1000000 oh
uart:~$ spi transceive 9f 00 00 00
TX:
00000000: 9f 00 00 00                                 |....             |
RX:
00000000: 00 ef 40 19                                 |....             |
```

Signed-off-by: Nerijus Bendžiūnas <nerijus.bendziunas@astrolightspace.com>
2024-04-18 08:08:02 -07:00
Pieter De Gendt fcc729f240 drivers: spi: Support NXP i.MX ECSPI
Add a driver implementation for NXP's Enhanced Configurable SPI.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-04-02 21:03:47 -04:00
Mikhail Siomin 8dbfdd6f9f drivers: mcux: flexio: Added MCUX FlexIO SPI driver
Added SPI driver using FlexIO.

Signed-off-by: Mikhail Siomin <victorovich.01@mail.ru>
2024-03-12 14:00:45 +01:00
Martin Åberg e13d4a14df drivers/spi: Add support for GRLIB SPIMCTRL
This adds support for the GRLIB SPIMCTRL SPI controller used in LEON and
NOEL-V systems. SPIMCTRL can operate in two different modes: In the
default mode it allows memory-mapped read access to the flash data. When
set in the user mode, it can be used to generate SPI bus transactions.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2024-02-01 14:06:38 +01:00
Naga Sureshkumar Relli 4d6a8bc65a drivers: spi: Add support for Polarfire SOC SPI
Add driver for the Microchip Polarfire SOC MSS SPI controller.
The interrupts of the MSS SPI are routed through PLIC(Platform level
interrupt controller).

Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).

Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
2024-01-31 06:36:21 -05:00
Jun Lin a897b8a09c drivers: spi: npcx: add driver for the SPI peripheral
This commit adds the driver support for the NPCX SPI peripheral.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2024-01-11 10:04:21 +01:00
Ye Weize 2a86016aff drivers: spi: Add Intel SEDI driver
Add a new SPI shim driver for Intel SoCs. Builds upon the SEDI bare
metal SPI driver in the hal-intel module.

Co-Authored-By: Kong Li <li.kong@intel.com>
Signed-off-by: Ye Weize <weize.ye@intel.com>
2023-10-20 14:55:49 +02:00
Sreeram Tatapudi fd04f8cc81 drivers: spi: Initial version of the Infineon CAT1 SPI driver
Initial version of Infineon CAT1 SPI Driver supporting synchronous
and asynchronous data transfer API

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2023-09-12 10:55:01 +02:00
Mateusz Sierszulski 8db11e6a0a drivers: spi: Add Ambiq MSPI driver
This commit adds MSPI driver for Apollo4 SoCs.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-09-08 14:44:12 +02:00
Steve Boylan 85cbc7a96e drivers: spi: spi_pico_pio: Add basic support for SPI via PIO
Add fundamental feature support for RP2040 PIO SPI peripherals.
This commit implements synchronous transfer with 8-bit MSB
format.  Using PIO allows any GPIO pins to be assigned the roles
of CS, CLK, MOSI, and MISO.

Optional features not implemented yet:

  - Interrupt based transfer
  - DMA transfer
  - Slave mode
  - Varying word size
  - 3-wire SPI support
  - LSB-first

Updated in response to review comments.
Further updates from second round of review.
Rename spi_pico_pio.c source to match zephyr/MAINTAINERS.yml
Remove unnecessary initialization code.
Resolve merge conflicts

Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
2023-09-01 16:36:41 +02:00
Mateusz Sierszulski 2b74109f20 drivers: spi: Add Ambiq SPI driver
This commits adds SPI master driver for Apollo4 SoCs.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-08-25 10:31:58 +02:00
cyliang tw 5148c98e83 drivers: spi: support for Nuvoton numaker series
Add Nuvoton numaker series spi controller, including
full and half duplex support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-08-09 08:24:38 +00:00
Andrzej Głąbek 7974ff2665 drivers: spi_nrfx_*: Add support for optional WAKE line
Add option to use (by defining the `wake-gpios` devicetree properties)
an additional signal line between SPI master and SPI slave that allows
the latter to stay in low-power state and wake up only when a transfer
is to occur.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-01 11:07:21 +02:00
Andrzej Głąbek fa609e5844 drivers: spi: nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00
Mulin Chao f34fff91bc driver: flash: npcx: introduce npcx flash driver
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-07-20 16:22:47 +02:00
Daniel Leung 26ecaba4af drivers: syscalls: use zephyr_syscall_header
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-17 07:57:45 -04:00
Shawn Nematbakhsh 5002ea4c42 drivers: spi: Add OpenTitan SPI driver
Add driver for OpenTitan SPI host.

Tested and verified single SPI full duplex on opentitan_earlgrey in
Verilator.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2023-05-10 16:48:46 +09:00
Ben Lauret 9cdc5d38b2 drivers: spi: Add driver for smartbond
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.

Co-authored-by: Stan Geitel <stan@geitel.nl>

Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
2023-04-20 10:32:40 +02:00
Scott Worley 5c00a83b99 drivers: spi: Microchip XEC QMSPI-LDMA fix spi buffer usage
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2023-04-11 16:57:56 +02:00
Tom Burdick d9d24b4d65 spi: Add RTIO support to SPI
Provides a macro and submit API for SPI drivers to support RTIO.

A copy function enables compatibility with the existing blocking API
and very easily the existing async API as well.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-04-03 09:51:02 +02:00
Ramesh Babu B 3d44508c38 drivers: spi: Add Intel SPI penwell driver
Added support for intel pch penwell spi driver.

Signed-off-by: Ramesh Babu B <ramesh.babu.b@intel.com>
2023-03-21 13:39:33 +01:00
Andriy Gelman 33d1792e3d drivers: spi: Add xmc4xxx driver
Adds spi driver for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-03-03 17:20:17 +01:00
Dat Nguyen Duy 6d866b62bf drivers: spi: introduce SPI driver for NXP S32
This introduces SPI driver for NXP S32 platform

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-24 09:37:24 +01:00
Jay Vasanth ae9de20222 drivers: spi: Added MEC172x full duplex qmspi driver
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-14 14:09:51 -05:00
Kevin Wang c01dcacb6f drivers: spi: add Andes atcspi200 driver
Support the Andes atcspi200 spi driver

Signed-off-by: Kevin Wang <yunkai@andestech.com>
2022-09-07 15:34:47 +02:00
Tom Burdick 4c20403629 spi: callback API for asynchronous transcieve
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.

The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.

The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-08-26 09:29:48 -04:00
TOKITA Hiroshi da32e26a3d drivers: spi: Add basic support for PL022
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.

Optional functions are not currently implemented yet.

- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.

Hardware limitation:

- LSB-first format is not supported by hardware.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
Naga Sureshkumar Relli 248047323e drivers: spi: Add support for Polarfire SOC QSPI
This patch adds driver for the Microchip Polarfire SOC MSS QSPI
controller.
The interrupts of the MSS QSPI are routed through PLIC(Platform level
interrupt controller).

Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).

Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
2022-06-13 12:11:28 +02:00
HaiLong Yang 9d2425c186 drivers: spi: introduce gd32 spi driver
Add a simple gd32 spi driver.

Signed-off-by: HaiLong Yang <cameledyang@pm.me>
2022-03-29 10:21:15 -05:00
Jay Vasanth fd43c725d2 drivers: spi: Add MEC172x QMSPI-LDMA driver
Add driver for MEC172x QMSPI with local DMA(LDMA). The driver
support SPI asynchronous operation.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-12-08 08:43:05 -05:00
Marc Reilly 54b6d26242 drivers: spi: add spi-bitbang driver
This adds an spi master mode driver via bitbanged gpio. Only syncronous
transfers are implemented. Clock signal timing is accomplished via busy
waits, the gpios are manipulated via the standard gpio interface; these
two factors limit the frequency at which it can operate - but here
a simple and generic implementation was chosen over performance.

The driver supports the various clock polarity and phase
configurations, and can also work with word sizes which are non
multiples of 8bits, currently up to 16 bits.

A sample program is also added demonstrating basic use of the driver
with 9bit data words.

Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
2021-12-06 07:29:45 -05:00
Jun Lin 5d72417df4 drivers: spi: npcx: add SPI support to access the SPI flash
The FIU/UMA module in the NPCX chip provides an dedicated SPI interface
to access the SPI flash. This commit adds the driver support for it.
With this commit, the application can call the flash APIs
(via spi_nor.c) to access the internal flash of NPCX EC chips.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I32bbf09f6e014b728ff8e4692e48151ae759e188
2021-11-01 21:48:20 -04:00
Yuriy Vynnychek 87018c50cc drivers: spi: introduce new Telink B91 SPI driver
SPI driver basic support for Telink B91 SoC.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-19 17:18:23 -04:00
Gerson Fernando Budke d999531f7f drivers: spi: Add cypress PSoC-6 scb spi driver
Add Cypress PSoC-6 SCB[spi] driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-05-05 16:01:28 +02:00
Martí Bolívar 63471ba93b drivers: spi: add dummy driver for vnd,spi
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-02-23 10:34:19 -05:00
Glauber Maroto Ferreira 74922049ba drivers: spi: esp32: add basic SPI master support
Include SPI master support for blocking and asynchronous calls.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-02-22 08:17:04 -05:00
Simon Glass a1d8e55cad emul: spi: Add support for SPI emulators
Add an emulation controller which routes SPI traffic to an attached
emulator. Only one emulator is supported per bus at present, since
chip-selction functionality is not present.

This allows drivers for SPI peripherals to be tested on systems that
don't have that peripheral attached, with the emulator handling the SPI
traffic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-05 15:33:00 -04:00
Henrik Brix Andersen d5514752d0 drivers: spi: add driver for the Xilinx AXI Quad SPI IP
Add SPI driver for the Xilinx AXI Quad SPI IP. Despite the name, this IP
block supports both single, dual, and quad line widths.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-26 12:32:27 +02:00
Christian Taedcke 6da94af847 drivers: spi: Add Gecko SPI driver
This commit adds SPI driver and its bindings using the USART peripheral
for Silicon Labs EFM32 and EFR32 MCUs.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-01-10 07:14:35 -06:00
Maureen Helm a63676761b drivers: spi: Add mcux flexcomm driver
Adds a shim layer around the mcux lpc flexcomm driver to adapt it to the
zephyr spi interface. It leverages heavily from the existing mcux dspi
shim driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-12-10 08:48:56 -06:00
Karsten Koenig ee2dd7322f drivers: spi: rv32m1: Add driver for RV32M1 LPSPI
Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC.
Based heavily on the existing mcux LPSPI driver.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2019-11-04 14:11:18 -06:00
Scott Worley c8b1eb79a1 drivers : spi : mec1501 : XEC SPI driver
SPI driver for MEC1501 QMSPI supporting synchronous only.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-10-23 19:18:32 -07:00
Olof Kindgren d09614ab59 drivers: spi: Add simple_spi driver
Add support for the OpenCores simple_spi controller

Signed-off-by: Olof Kindgren <olof.kindgren@gmail.com>
2019-10-22 15:54:03 -05:00
Daniel Craviee 256c5c4e17 drivers: spi: Add LiteX SPI driver
This commit adds LiteX SPI drivers and its bindings.

Signed-off-by: Daniel Craviee <dcraviee@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-10-21 08:40:09 -05:00
Charles E. Youse 34ffdd0aab drivers/spi/spi_intel.c: remove Quark SPI support
This was only used on Quark SoCs. It is no longer used, can no
longer be tested, and it's reliant upon the deprecated legacy PCI
subsystem. Remove it to prevent bitrot.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-08 22:09:10 -04:00
Brett Witherspoon f2eea2ef85 drivers: add CC13xx / CC26xx SPI driver
Add driver for the SPI peripheral on the TI CC13xx / CC26xx series SoCs.

Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-27 09:21:19 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Nathaniel Graff 9e2ef8db6d drivers/spi: SPI driver for SiFive Freedom
A driver for the sifive,spi0 SPI device on SiFive Freedom platforms

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-02-06 09:00:00 -06:00
qianfan Zhao 6e4963b978 drivers: add spi support for atmel sam series soc
This driver is based on spi_sam0

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-10 11:29:49 -05:00