This include is only required if typeof() macro is used, which
is not the case for the serial / uart driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add simple clock control node in devicetree for beetle to handle
relationship between drivers (uart, timers, gpio) and clock controller
device.
Signed-off-by: Kumar Gala <galak@kernel.org>
The TI SimpleLink SDK got updated to version '4.40.04.04' in 'hal_ti'.
This introduced renames of some functions in HAL and has to be reflected
in Zephyr drivers which make use of them.
This renames 'PRCMPowerDomainStatus' to 'PRCMPowerDomainsAllOn' in all
affected 'cc13xx_cc26xx' drivers.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This peripheral combines a hardware-based USB CDC ACM serial interface
and a JTAG interface.
It is present in the ESP32-C3.
Signed-off-by: Martin Jäger <martin@libre.solar>
The uart_pipe driver is not dependent on any console driver,
however a serial driver is required.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch is to enhance the uart ns16550 driver to get clock frequency
from clock manager or devicetree if clock_frequency is defined.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
As we work to phase out devicetree 'label properties, convert
driver to just use dev->name instead of DT_INST_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Change the Kconfig prompt for the Xilinx Zynq-7000/ZynqMP PS UART driver to
indicate whichs SoCs it supports.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Fix wrong control register address used in uart_altera_jtag_init
function which caused memory corruption.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
mcuboot may use a uart as logger. After application boot from mcuboot,
uart remains in some unknown state. It could leads to some unpredictable
uart behaviour. This commit fixes the issue by resetting of uart state
at the beginning of uart init.
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.
This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The driver supported getting register shift from Devicetree, from a
custom definition in SoC headers (fragile) or, it took a default value.
This change simplifies things by making reg-shift property required in
all instances.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This driver carefully saved the errno value from the failing call and
then didn't use it in the ERROR report, using the potentially invalid
current errno value (which may have been set by the close call).
Signed-off-by: Keith Packard <keithp@keithp.com>
<soc.h> was included because some CMSIS helpers (__DMB/__ISB) were
needed. In ARM SoCs, inclusion of CMSIS headers depends mainly on how
HALs decide to do it, being usually an inefficient and fragile include
chain. Note that on ARM64 we're in a better position, as those are
defined in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new selectable Kconfig option to decide wether the device driver
is a MMIO device or not. Previous to this patch, the decision was maded
based on the existence of a definition in <soc.h>. The design was
fragile, as code compiled anyway if the definition was not present.
All platforms/boards that had the definition in <soc.h> select the
Kconfig option in their respective defconfig files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As per XMCLib documentation we need to check that data has been received
before reading the buffers.
Fixes test_uart_poll_in test in tests/drivers/uart/uart_basic_api.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Casting to uint16_t* can cause an unaligned usage fault when c is not
aligned to 2 bytes and can unintentionally overwrite data when c has a 1
byte memory size. Also there's no need to cast to uint16_t* because
returned words are 8-bit characaters as setup in the configuration.
Fixes the following usage fault error in tests/drivers/uart/uart_basic_api:
START - test_uart_poll_in
Please send characters to serial console
E: ***** USAGE FAULT *****
E: Unaligned memory access
E: r0/a1: 0x00000000 r1/a2: 0x2000078f r2/a3: 0x0c00453c
E: r3/a4: 0x00000000 r12/ip: 0x00000000 r14/lr: 0x0c003de5
E: xpsr: 0x41000000
E: Faulting instruction address (r15/pc): 0x0c003de4
E: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
E: Current thread: 0x20000118 (unknown)
E: Halting system
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
This commit aligns UARTE shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This add UART_NS16550_VARIANT_16550 configuration inside the choice
of UART_NS16550_VARIANT_NS16750 and UART_NS16550_VARIANT_NS16950.
The configuration is enabled by default to make NS16550 device to get
correct FIFO size configuration (16 bytes).
fixes#45783
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Current poll_in function implementation blocks when there is
no data available. The Zephyr documentation for poll_in
expects the function to return -1 when no data is available.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Xilinx AXI UART Lite v2.0[1] has the following clause for both RX and TX
FIFO respectively:
When a read request is issued to an empty FIFO, a bus error (SLVERR) is
generated and the result is undefined.
When a write request is issued while the FIFO is full, a bus
error (SLVERR) is generated and the data is not written into the FIFO.
To protect this, we have:
xlnx_uartlite_read_status(dev) & STAT_REG_RX_FIFO_VALID_DATA, and
xlnx_uartlite_read_status(dev) & STAT_REG_TX_FIFO_FULL
but these are not enough for multi-threaded apps. Consider two threads
calling poll_out(), it is always possible for a thread to be swapped out
right after reading the status register, the other thread fill the TX FIFO,
and the original thread is swapped back to write more data to the FIFO
because previously read status doesn't indicate the FIFO is full.
To close this race condition, this commit uses a spinlock for each FIFO.
This ensures that only one thread accesses the FIFO even for SMP cases.
This closes#45302.
[1] https://docs.xilinx.com/v/u/en-US/pg142-axi-uartlite
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in uart driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Based on: #45053.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
Previously, the uart_stm32 driver was extended in #44487 to support
swapping the tx and rx pins of supported STM32 UART peripherals.
However, the original change applied this configuration during the
call to the uart_stm32_configure() function. This has now been added to
the uart_stm32_init() function to ensure this behavior on startup for
ports like the virtual com port.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Pretend that the serial test driver supports the interrupt and async
API's, as these can be required for various drivers. Also select
`SERIAL_HAS_DRIVER` so that the serial library will be included.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Depending on `!SERIAL_SUPPORT_INTERRUPT` to enable the driver does not
make any sense, as this is a symbol selected by drivers to signify that
they support interrupts. Simply not selecting this symbol is enough to
convey the desired intention.
This fixes Kconfig problems when the driver is compiled together with
a dummy serial driver which does select `SERIAL_SUPPORT_INTERRUPT`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
