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drivers: serial: Add USART support for GD32V

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Modifying configuration to enable with gd32vf103

- Add usart definition to devicetree.
- Define USART_STAT as alias of USART_STAT0 if not defined it.
- Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This commit is contained in:
TOKITA Hiroshi 2021-12-04 23:56:48 +00:00 • committed by Carles Cufí
commit 7e80c74f95
7 changed files with 81 additions and 1 deletions
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14
boards/riscv/longan_nano/longan_nano-pinctrl.dtsi Normal file
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@ -0,0 +1,14 @@
/*
* Copyright (c) 2021, TOKITA Hiroshi
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/gd32vf103c(b-8)xx-pinctrl.h>
&pinctrl {
usart0_default: usart0_default {
group1 {
pinmux = <USART0_TX_PA9_NORMP>, <USART0_RX_PA10_NORMP>;
};
};
};

10
boards/riscv/longan_nano/longan_nano.dts
View file

@ -6,13 +6,23 @@
/dts-v1/;
#include <gigadevice/gd32vf103Xb.dtsi>
#include "longan_nano-pinctrl.dtsi"
/ {
model = "Sipeed Longan Nano";
compatible = "sipeed,longan_nano";
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
};
&usart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
};

8
boards/riscv/longan_nano/longan_nano_defconfig
View file

@ -11,3 +11,11 @@ CONFIG_GD32_HXTAL_8MHZ=y
# enable machine timer
CONFIG_RISCV_MACHINE_TIMER=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

10
boards/riscv/longan_nano/longan_nano_lite.dts
View file

@ -6,13 +6,23 @@
/dts-v1/;
#include <gigadevice/gd32vf103X8.dtsi>
#include "longan_nano-pinctrl.dtsi"
/ {
model = "Sipeed Longan Nano Lite";
compatible = "sipeed,longan_nano_lite";
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
};
&usart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
};

8
boards/riscv/longan_nano/longan_nano_lite_defconfig
View file

@ -11,3 +11,11 @@ CONFIG_GD32_HXTAL_8MHZ=y
# enable machine timer
CONFIG_RISCV_MACHINE_TIMER=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

2
drivers/serial/Kconfig.gd32
View file

@ -7,7 +7,7 @@ DT_COMPAT_GIGADEVICE_GD32_USART := gd,gd32-usart
config USART_GD32
bool "GD32 serial driver"
default $(dt_compat_enabled,$(DT_COMPAT_GIGADEVICE_GD32_USART))
depends on SOC_FAMILY_GD32
depends on (SOC_FAMILY_GD32 || SOC_SERIES_GD32VF103)
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
select USE_GD32_USART

30
dts/riscv/gigadevice/gd32vf103.dtsi
View file

@ -65,6 +65,36 @@
};
};
usart0: serial@40013800 {
compatible = "gd,gd32-usart";
reg = <0x40013800 0x400>;
interrupts = <56 0>;
interrupt-parent = <&eclic>;
rcu-periph-clock = <0x60e>;
status = "disabled";
label = "UART_0";
};
usart1: serial@40004400 {
compatible = "gd,gd32-usart";
reg = <0x40004400 0x400>;
interrupts = <57 0>;
interrupt-parent = <&eclic>;
rcu-periph-clock = <0x711>;
status = "disabled";
label = "UART_1";
};
usart2: serial@40004800 {
compatible = "gd,gd32-usart";
reg = <0x40004800 0x400>;
interrupts = <58 0>;
interrupt-parent = <&eclic>;
rcu-periph-clock = <0x712>;
status = "disabled";
label = "UART_2";
};
afio: afio@40010000 {
compatible = "gd,gd32-afio";
reg = <0x40010000 0x400>;