Commit graph

1871 commits

Author SHA1 Message Date
Piotr Binkowski
5774228819 drivers: serial: sam0: fix baudrate assignment to config_cache in init
Fix baudrate field assignment in config_cache in uart_sam0_init

Signed-off-by: Piotr Binkowski <p.binkowski@cthings.co>
2022-06-15 16:57:57 -05:00
Keith Packard
0970cda906 drivers: Report correct errno in uart_native_posix driver
This driver carefully saved the errno value from the failing call and
then didn't use it in the ERROR report, using the potentially invalid
current errno value (which may have been set by the close call).

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-06-14 01:50:36 +09:00
Luca Fancellu
d62645200b driver: pl011: use new device model to map MMIO
Use the new device model introduced by device_mmio.h to map
pl011 MMIO space.

Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
2022-06-07 11:54:13 +02:00
Marcin Niestroj
8d66185249 drivers: serial: uart_nrfx_uarte: fix !LEGACY_INCLUDE_PATH
Add missing zephyr/ prefix to fix CONFIG_LEGACY_INCLUDE_PATH=n build.

Fixes: f6a880a2f9 ("drivers: serial: uart_nrfx_uarte: utilize EasyDMA
  property from dts")

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-06-06 12:07:22 +02:00
Jonathan Hahn
a34c7d680b drivers: serial: removes unused TIMEOUT constant
The TIMEOUT constant is unused since
da210ba0ba,
so removed it.

Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
2022-06-06 12:07:01 +02:00
Gerard Marull-Paretas
7de5f47e1a drivers: serial: pl011: improve include list
<soc.h> was included because some CMSIS helpers (__DMB/__ISB) were
needed. In ARM SoCs, inclusion of CMSIS headers depends mainly on how
HALs decide to do it, being usually an inefficient and fragile include
chain. Note that on ARM64 we're in a better position, as those are
defined in-tree.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-05 14:48:40 +02:00
Gerard Marull-Paretas
4cafd8df7e drivers: serial: ns16550: remove redundant soc.h include
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.

This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-05 14:48:40 +02:00
Gerard Marull-Paretas
92f488497f drivers: serial: ns16550: use MMIO device depending on Kconfig option
Add a new selectable Kconfig option to decide wether the device driver
is a MMIO device or not. Previous to this patch, the decision was maded
based on the existence of a definition in <soc.h>. The design was
fragile, as code compiled anyway if the definition was not present.

All platforms/boards that had the definition in <soc.h> select the
Kconfig option in their respective defconfig files.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-05 14:48:40 +02:00
Andriy Gelman
0fc92370fa drivers: uart_xmc4xxx: Remove unnecessary cast
The compiler will perform an implicit cast from unsigned char to uint16_t.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-06-05 14:29:26 +02:00
Andriy Gelman
aa91500aee drivers: uart_xmc4xxx: Check that receive buffers have data in poll_in
As per XMCLib documentation we need to check that data has been received
before reading the buffers.

Fixes test_uart_poll_in test in tests/drivers/uart/uart_basic_api.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-06-05 14:29:26 +02:00
Andriy Gelman
4c2ff6dc2f drivers: uart_xmc4xxx: Don't recast to uint16_t* when returning value
Casting to uint16_t* can cause an unaligned usage fault when c is not
aligned to 2 bytes and can unintentionally overwrite data when c has a 1
byte memory size. Also there's no need to cast to uint16_t* because
returned words are 8-bit characaters as setup in the configuration.

Fixes the following usage fault error in tests/drivers/uart/uart_basic_api:
START - test_uart_poll_in
Please send characters to serial console
E: ***** USAGE FAULT *****
E:   Unaligned memory access
E: r0/a1:  0x00000000  r1/a2:  0x2000078f  r2/a3:  0x0c00453c
E: r3/a4:  0x00000000 r12/ip:  0x00000000 r14/lr:  0x0c003de5
E:  xpsr:  0x41000000
E: Faulting instruction address (r15/pc): 0x0c003de4
E: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
E: Current thread: 0x20000118 (unknown)
E: Halting system

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-06-05 14:29:26 +02:00
Adam Wojasinski
f6a880a2f9 drivers: serial: uart_nrfx_uarte: utilize EasyDMA property from dts
This commit aligns UARTE shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.

When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2022-06-05 14:27:29 +02:00
Fabio Baltieri
e24314f10f include: add more missing zephyr/ prefixes
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-05-27 15:20:27 -07:00
Dino Li
5a1c084447 driver/serial: ns16550: set NS16550 as default variant
This add UART_NS16550_VARIANT_16550 configuration inside the choice
of UART_NS16550_VARIANT_NS16750 and UART_NS16550_VARIANT_NS16950.
The configuration is enabled by default to make NS16550 device to get
correct FIFO size configuration (16 bytes).

fixes #45783

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-05-27 11:55:31 -07:00
Mahesh Mahadevan
70dbf7e695 drivers: uart_imx: Fix the poll_in function
Current poll_in function implementation blocks when there is
no data available. The Zephyr documentation for poll_in
expects the function to return -1 when no data is available.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-05-23 15:00:14 -05:00
Nazar Palamar
d940d23c10 modules: hal_infineon: added initial Kconfig and CMakeLists.txt
- added initial Kconfig
- added initial CMakeLists.txt (root, core-lib,  mtb-pal-cat1)
- updated module, driver and soc to use CONFIG_USE_INFINEON_xx
  defines from modules/hal_infineon/Kconfig

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-05-13 21:34:59 +02:00
Jonathan Hahn
05cc2e1ac3 drivers: serial: add pin inversion to stm32 u(s)art
Additional properties are added to stm32 u(s)art to allow
for signal inversion.

Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
2022-05-13 08:45:55 -05:00
Yasushi SHOJI
f14e9e408b serial: xilinx: uartlite: Fix bus fault
Xilinx AXI UART Lite v2.0[1] has the following clause for both RX and TX
FIFO respectively:

    When a read request is issued to an empty FIFO, a bus error (SLVERR) is
    generated and the result is undefined.

    When a write request is issued while the FIFO is full, a bus
    error (SLVERR) is generated and the data is not written into the FIFO.

To protect this, we have:

    xlnx_uartlite_read_status(dev) & STAT_REG_RX_FIFO_VALID_DATA, and
    xlnx_uartlite_read_status(dev) & STAT_REG_TX_FIFO_FULL

but these are not enough for multi-threaded apps.  Consider two threads
calling poll_out(), it is always possible for a thread to be swapped out
right after reading the status register, the other thread fill the TX FIFO,
and the original thread is swapped back to write more data to the FIFO
because previously read status doesn't indicate the FIFO is full.

To close this race condition, this commit uses a spinlock for each FIFO.
This ensures that only one thread accesses the FIFO even for SMP cases.

This closes #45302.

[1] https://docs.xilinx.com/v/u/en-US/pg142-axi-uartlite

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2022-05-12 19:05:15 -04:00
Daniel DeGrasse
c4a7985064 drivers: uart_imx: add pin control support
Add pin control support to uart_imx serial driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-12 16:57:17 -05:00
Daniel DeGrasse
694637a83c drivers: uart_mcux_iuart: add pin control support
Add pin control support to mcux_iuart driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-12 16:57:17 -05:00
Mulin Chao
8efc935288 drivers: uart: add pinctrl driver support
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in uart driver.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-05-12 14:24:03 -05:00
Artur Lipowski
bb8575962d stm32: Allow UARTs to use alternate clocks.
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Based on: #45053.

Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
2022-05-11 14:58:37 -05:00
Peter Maxwell Warasila
3c09c21fda drivers: serial: uart_stm32: tx/rx swap in init()
Previously, the uart_stm32 driver was extended in #44487 to support
swapping the tx and rx pins of supported STM32 UART peripherals.
However, the original change applied this configuration during the
call to the uart_stm32_configure() function. This has now been added to
the uart_stm32_init() function to ensure this behavior on startup for
ports like the virtual com port.

Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
2022-05-11 14:45:34 -05:00
Daniel DeGrasse
7e89ce9f19 drivers: serial: enable pin control for lpc11u6x serial driver
Enable pin control api for lpc11u6x serial driver, and remove pinmux api
usage.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Esteban Valverde
797b6784bb drivers: serial: modify ns16550 to use extended FIFO
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Jordan Yates
a9087936ac serial: test: update selected symbols
Pretend that the serial test driver supports the interrupt and async
API's, as these can be required for various drivers. Also select
`SERIAL_HAS_DRIVER` so that the serial library will be included.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-05-10 10:44:04 +02:00
Jordan Yates
7a86ee50fd serial: litex: remove irrational dependency
Depending on `!SERIAL_SUPPORT_INTERRUPT` to enable the driver does not
make any sense, as this is a symbol selected by drivers to signify that
they support interrupts. Simply not selecting this symbol is enough to
convey the desired intention.

This fixes Kconfig problems when the driver is compiled together with
a dummy serial driver which does select `SERIAL_SUPPORT_INTERRUPT`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-05-10 10:44:04 +02:00
Georgij Cernysiov
64c804ad3b drivers: uart_stm32: fix device is ready for tx dma in async init
Fixes TX DMA device is ready check in async initialization function.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-09 11:55:20 -05:00
Gerard Marull-Paretas
fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Tim Lin
07d9a4292d ITE: drivers/serial: Use pinctrl instead of pinmux driver
Use pinctrl instead of pinmux driver.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-05-06 11:32:40 +02:00
Michal Sieron
081e201219 serial: uart_liteuart: Add and use register names
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.

I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `UART_EX_TX`.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
2022-05-06 11:31:54 +02:00
Henrik Brix Andersen
738e9f57f9 drivers: serial: rv32m1: lpuart: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 LPUART serial driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Michal Sieron
34a4b2b916 serial: uart_liteuart: Use LiteX HAL
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
2022-04-29 16:11:53 +02:00
Carlo Caione
69b28bfd07 pm: policy: Consider substates for state lock functions
Extend the current pm_policy_state_lock_*() functions to support
substates.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-04-28 16:32:23 +02:00
Huifeng Zhang
bd55003f70 driver: uart_pl011: refine creating device instance code
Old code only create one pl011 device instance though there are two or
more pl011 device defined in devicetree. This patch can fix this issue.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2022-04-26 14:20:57 -05:00
Daniel DeGrasse
557a0c766c drivers: lpuart: enable loopback mode
NXP LPUART IP supports loopback mode, where TX is internally connected
to RX input. Allow setting loopback mode up via the "nxp,loopback" dts
property.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-22 09:44:19 +02:00
Daniel DeGrasse
fdc247fed3 drivers: mcux_lpuart: make async api use common LPUART ISR
LPUART driver should use shared ISR for all possible use cases,
including ASYNC API, so that multiple features requiring ISR can be
enabled simultaneously.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-22 09:44:19 +02:00
Glauber Maroto Ferreira
7064e31101 esp32: drivers: uart: remove uart_num
When using pin states, uart_num is no
longer required.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Glauber Maroto Ferreira
a9aef448ab drivers: serial: esp32: use pinctrl API
and removes references/usage of old pinmux properties.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Vaishnav Achath
ace77c71e9 drivers: CC1XX/CC26XX based boards: transition to pinctrl driver
This commit has the necessary changes to update the consumers
of pinmux driver(SPI, I2C, UART) and update the board specific
files to use the pinctrl interface.

Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
2022-04-18 18:19:46 -04:00
Bartosz Bilas
e4950bc729 drivers: serial: xen: remove superfluous default n for boolean
bool symbols implicitly default to n so
there is no need to redundant those values.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-04-15 10:32:24 -07:00
Nickolas Lapp
f1b0b458b0 uart_mcux_lpuart: Enable Asynchronous UART API.
This PR enables the Ansynchronous UART API for using the MCUX drivers.
It is tested on the RT1062EVKB.

Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
2022-04-14 15:21:58 -05:00
Khor Swee Aun
0431d10b10 drivers/serial: Extend Altera Jtag Uart driver support
Extend Altera Jtag Uart driver support without Altera HAL driver
by default. uart_altera_jtag_hal.c renamed to uart_altera_jtag.c and
new config, CONFIG_UART_ALTERA_JTAG_HAL is introduced to allow driver
to use Altera HAL driver when needed.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2022-04-07 06:58:16 -04:00
Jordan Yates
ad25e77698 serial: uart_nrfx_uarte: async compilation warning
Only compile in async related code when at least one UARTE instance has
enabled async mode. This fixes an "unused function" warning when
`CONFIG_UART_ASYNC_API` is enabled but no UARTE instances has async
enabled. This is possible when the async API is being used for an RTT
UART driver.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-04-07 11:53:29 +02:00
Daniel DeGrasse
58008b3085 drivers: serial: Add pinctrl support to usart flexcomm driver
Add pinctrl support to LPC USART flexcomm driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Shawn Nematbakhsh
c74526919d soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.

This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-04-05 12:00:03 +02:00
Alexander Mihajlovic
4ff4991e16 drivers: uart_stm32: Add support for tx/rx swap
Add a new boolean devicetree property `tx-rx-swap` to the
st,stm32-usart binding, used to control TX/RX swap during
device initialization.

Signed-off-by: Alexander Mihajlovic <a@abxy.se>
2022-04-04 13:44:23 -07:00
Andrzej Głąbek
586e26e8fc soc: nrf: Use data from DTS to populate HAS_HW_NRF_* Kconfig options
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00
Andrzej Głąbek
cd00a3a3c9 scripts: kconfigfunctions: Redefine dt_nodelabel_has_compat()
The function in its current form is confusing because unlike other
similarly named functions (dt_nodelabel_has_prop(), dt_node_has_prop())
or devicetree macros (DT_NODE_HAS_COMPAT(), DT_NODE_HAS_PROP()), this
function takes into account the status of the checked node and returns
"y" only when the node is enabled.
This commit redefines dt_nodelabel_has_compat() so that it no longer
checks the node status, and for cases where the previous functionality
is needed, a new function named dt_nodelabel_enabled_with_compat()
is introduced as a replacement.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00
Krzysztof Chruscinski
0b4e5b6d8b drivers: serial: nrf_uarte: Fix NO_OPTIMIZATION compilation
When NO_OPTIMIZATIONS is set and asynchronous API is used but
HW counting is not enabled then linking fails because of lack of
nrfx_timer code. When optimization is enabled, linker is smart
enough to figure out that nrfx_timer is not used.

Converting decision function from static inline function to macro
which is handled correctly with optimization off.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-04-01 16:03:56 +02:00