Commit graph zephyr/arch/x86/core
Author SHA1 Message Date
Andrew Boie
1459bed346 x86: fix pte corruption when setting large regions
We need a copy of the flags field for ever PTE we are
updating, we can't just keep OR-ing in the address
field.

Fixes issues seen when setting flags for memory regions
larger than a page.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-03 22:34:25 -05:00
Andrew Boie
6c8825fc96 x86: mitigate L1 Terminal Fault vulnerability
During speculative execution, non-present pages are treated
as valid, which may expose their contents through side
channels.

Any non-present PTE will now have its address bits zeroed,
such that any speculative reads to them will go to the NULL
page.

The expected hit on performance is so minor that this is
enabled at all times.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-01 15:22:41 -08:00
Andrew Boie
10040f603d x86: enable Extended IBRS
This is a CPU mitigation feature for Spectre V2 attacks

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-01 12:35:04 -08:00
Andrew Boie
e27ce67d25 x86: fix SSBD feature bit
The CPUID level 7 bit for SSBD is 31, not 26.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-01 12:35:04 -08:00
Andrew Boie
d3c89fea4f kernel: move CONFIG_RETPOLINE definition
Retpolines were never completely implemented, even on x86.
Move this particular Kconfig to only concern itself with
the assembly code, and don't default it on ever since we
prefer SSBD instead.

We can restore the common kernel-wide CONFIG_RETPOLINE once
we have an end-to-end implementation.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-01 12:35:04 -08:00
Andrew Boie
ad2d7ca081 x86: fix page directory out of bounds
PAE page tables (the only kind we support) have 512
entries per page directory, not 1024.

Fixes: #13838

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-28 15:03:06 -08:00
Andrew Boie
4ce652e4b2 userspace: remove APP_SHARED_MEM Kconfig
This is an integral part of userspace and cannot be used
on its own. Fold into the main userspace configuration.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-23 07:43:55 -05:00
Andrew Boie
5f4683db34 x86: fix ROM permissions
Only the text area now has execute permissions,
instead of both text and rodata.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-15 13:10:18 -08:00
Andrew Boie
65da531aed x86: fix exception stack pointer reporting
If the faulting context is in user mode, then we are
not on the same stack due to HW-level stack switching
on privilege elevation, and the faulting ESP is on
the stack itself.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-15 09:48:37 -05:00
Andrew Boie
21337019b0 x86: get oops reason code more robustly
The code did not consider privilege level stack switches.
We have the original stack pointer in the NANO_ESF,
just use that.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-15 09:48:37 -05:00
Andrew Boie
747dcbc8f2 x86: improve stack overflow detection
We now have a dedicated function to test whether
a memory region is withing the boundary of the
faulting context's stack buffer.

We use this to determine whether a page or double fault
was due to ESP being outside the bounds of the stack,
as well as when unwinding stack frames to print debug
output.

Fixes two issues:
- Stack overflows in user mode being incorrectly reported
  as just page fault exceptions
- Exceptions that occur when unwinding corrupted stacks

The type of fault which triggered the stack overflow
logic (double or page fault) is now always shown.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-15 09:48:37 -05:00
Andrew Boie
62d866385e x86: fix crash in _arch_buffer_validate
The code wasn't checking if the memory address to check
corresponded to a non-present page directory pointer
table entry.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-14 12:46:36 -05:00
Andrew Boie
2cfeba8507 x86: implement interrupt stack trampoline
Upon hard/soft irq or exception entry/exit, handle transitions
off or onto the trampoline stack, which is the only stack that
can be used on the kernel side when the shadow page table
is active. We swap page tables when on this stack.

Adjustments to page tables are now as follows:

- Any adjustments for stack memory access now are always done
  to the user page tables

- Any adjustments for memory domains are now always done to
  the user page tables

- With KPTI, resetting a page now clears the present bit

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-14 12:46:36 -05:00
Andrew Boie
f093285345 x86: modify MMU APIs for multiple page tables
Current set of APIs and macros assumed that only one set
of page tables would ever be in use.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-14 12:46:36 -05:00
Andrew Boie
d2886ab8bc x86: clear EFLAGS on double fault
In the event of a double fault, we do a HW task switch to
a special _df_tss hardware task which resets the stack
pointer to the interrupt stack and otherwise restores
the main hardware task to a runnable state so that
_df_handler_bottom() can run.

However, we need to make sure that _df_handler_bottom()
runs with interrupts locked, otherwise another IRQ could
corrupt the interrupt stack resulting in undefined
behavior.

We have very little stack space to work with in this
context, just zero it. It's a fatal error for the thread
in any event.

Fixes: #7291

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-13 10:58:42 -08:00
Piotr Zięcik
9cc63e07e4 power: Fix naming of Kconfig options controlling deep sleep states
This commit changes the names of SYS_POWER_DEEP_SLEEP* Kconfig
options in order to match SYS_POWER_LOW_POWER_STATE* naming
scheme.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-02-12 07:46:32 -05:00
Andrew Boie
f087cd0774 x86: fix app_smem MMU permissions
At boot, user threads were being granted access to the entire
app shared memory section. This is incorrect; user threads should
have no access until they are added to a memory domain, which
may contain partitions defined within it.

Change from MMU_ENTRY_USER (which grants permission at boot)
to MMU_ENTRY_RUNTIME_USER (which indicates that the pages may
be granted to user mode at runtime, but not at boot).

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-08 14:02:31 -08:00
Andy Ross
aa6e21c24c kernel: Split _Swap() API into irqlock and spinlock variants
We want a _Swap() variant that can atomically release/restore a
spinlock state in addition to the legacy irqlock.  The function as it
was is now named "_Swap_irqlock()", while _Swap() now refers to a
spinlock and takes two arguments.  The former will be going away once
existing users (not that many!  Swap() is an internal API, and the
long port away from legacy irqlocking is going to be happening mostly
in drivers) are ported to spinlocks.

Obviously on uniprocessor setups, these produce identical code.  But
SMP requires that the correct API be used to maintain the global lock.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-08 14:49:39 -05:00
Andrew Boie
41f6011c36 userspace: remove APPLICATION_MEMORY feature
This was never a long-term solution, more of a gross hack
to get test cases working until we could figure out a good
end-to-end solution for memory domains that generated
appropriate linker sections. Now that we have this with
the app shared memory feature, and have converted all tests
to remove it, delete this feature.

To date all userspace APIs have been tagged as 'experimental'
which sidesteps deprecation policies.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-08 07:04:30 -05:00
Andrew Boie
71a3b53504 x86: don't automatically configure newlib malloc
This diverges from policy for all of our other arches
and C libraries. Global access to the malloc arena
may not be desirable.

Forthcoming patch will expose, for all C libraries, a
k_mem_partition with the malloc arena which can be
added to domains as desired.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-08 07:04:30 -05:00
Adithya Baglody
9bebf4cb23 x86: fix app shared memory if XIP enabled
This is a separate data section which needs to be copied into
RAM.

Most arches just use the kernel's _data_copy(), but x86 has its
own optimized copying code.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-08 07:04:30 -05:00
Andrew Boie
2d9bbdf5f3 x86: remove support for non-PAE page tables
PAE tables introduce the NX bit which is very desirable
from a security perspetive, back in 1995.

PAE tables are larger, but we are not targeting x86 memory
protection for RAM constrained devices.

Remove the old style 32-bit tables to make the x86 port
easier to maintain.

Renamed some verbosely named data structures, and fixed
incorrect number of entries for the page directory
pointer table.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-05 20:51:21 -08:00
Adithya Baglody
cb536111a9 Gcov: Added support for x86.
This patch adds all the required hooks needed in the kernel to
get the coverage reports from x86 SoCs.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2019-01-16 06:12:33 -05:00
Flavio Ceolin
6d50df212f arch: x86: Make statements evaluate boolean expressions
MISRA-C requires that the if statement has essentially Boolean type.

MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2019-01-07 08:52:07 -05:00
Anas Nashif
74a74bb6b8 power: rename api sys_soc -> sys_
sys_soc is just redundant, just call APIs with sys_*.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-12-28 16:16:28 -05:00
Anas Nashif
9151fbebf2 power: rename APIs and removing leading _
Remove leading underscore from PM APIs. _ was used for internal APIs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-12-28 16:16:28 -05:00
Flavio Ceolin
0ed0d164ef arch: x86: Use macro BIT to shift bits
The operation was shifiting bit using a signed constant in the left
operand. Use BIT macro to do it properly.

MISRA-C rule 12.2

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-12-11 14:37:10 -08:00
Flavio Ceolin
4b35dd2628 misra: Fixes for MISRA-C rule 8.2
In C90 was introduced function prototype, that allows argument types
to be checked against parameter types, though it is not necessary
specify names for the parameters. MISRA-C requires names for function
prototype parameters, it claims that names can provide useful
information regarding the function interface.

MISRA-C rule 8.2

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-12-07 09:06:34 -05:00
Flavio Ceolin
34b12d8f16 arch: x86: x86_mmu: Remove possible dead code
When __ASSERT is not enabled there is an attribution to the variable
total_partitions and it is never used.

MISRA-C rule 2.2

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-12-07 09:06:34 -05:00
Flavio Ceolin
1492df3415 x86: core: thread: Avoid clash with function identifier
There is a function called _thread_entry defined in
lib/thread_entry.c. Just changing name to fix MISRA-C violation.

MISRA-C rule 5.8

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-12-07 09:06:34 -05:00
Flavio Ceolin
c42dc9435d arch: x86: Make tag name unique
Renaming a variable to not clash with a struct name.

MISRA-C rule 5.7

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-12-07 09:06:34 -05:00
Andrew Boie
ab82ef4ca5 x86: always build the page fault handler
Previously, this was only built if CONFIG_EXCEPTION_DEBUG
was enabled, but CONFIG_USERSPACE needs it too for validating
strings sent in from user mode.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-12-06 12:44:23 -08:00
Andrew Boie
d4363e4185 x86: print helpful message on FPU exception
A few people have tripped over this recently.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-12-06 12:44:23 -08:00
Patrik Flykt
494ef1cfe2 arch: Add 'U' to unsigned variable assignments
Add 'U' to a value when assigning it to an unsigned variable.
MISRA-C rule 7.2

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2018-12-04 22:51:56 -05:00
Flavio Ceolin
6e1f6e5d5d arch: x86: Make if statement evaluate a boolean expression
MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-11-30 08:05:11 -08:00
Flavio Ceolin
001ad8b6c2 arch: Making body of selection statement a compound statement
MISRA-C rule 15.6

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-11-29 14:21:29 -08:00
Andrew Boie
7bac15f2ff x86: add dynamic interrupt support
If dynamic interrupts are enabled, a set of trampoline stubs
are generated which transfer control to a common dynamic
interrupt handler function, which then looks up the proper
handler and parameter and then executes the interrupt.

Based on the prior x86 dynamic interrupt implementation which
was removed from the kernel some time ago, and adapted to
changes in the common interrupt handling code, build system,
and IDT generation tools.

An alternative approach could be to read the currently executing
vector out of the APIC, but this is a much slower operation.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-10 11:01:22 -05:00
Flavio Ceolin
61a1057ea5 kernel: Remove redundant type name
struct k_thread already has a pointer type k_tid_t, there is no need for
this definition to tcs.

Less symbols/names make the code cleaner and more readable.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-10-31 19:43:47 -04:00
Andy Ross
9098a45c84 kernel: New timeslicing implementation
Instead of checking every time we hit the low-level context switch
path to see if the new thread has a "partner" with which it needs to
share time, just run the slice timer always and reset it from the
scheduler at the points where it has already decided a switch needs to
happen.  In TICKLESS_KERNEL situations, we pay the cost of extra timer
interrupts at ~10Hz or whatever, which is low (note also that this
kind of regular wakeup architecture is required on SMP anyway so the
scheduler can "notice" threads scheduled by other CPUs).  Advantages:

1. Much simpler logic.  Significantly smaller code.  No variance or
   dependence on tickless modes or timer driver (beyond setting a
   simple timeout).

2. No arch-specific assembly integration with _Swap() needed

3. Better performance on many workloads, as the accounting now happens
   at most once per timer interrupt (~5 Hz) and true rescheduling and
   not on every unrelated context switch and interrupt return.

4. It's SMP-safe.  The previous scheme kept the slice ticks as a
   global variable, which was an unnoticed bug.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-10-16 15:03:10 -04:00
Flavio Ceolin
78f27a81f5 kernel: Using the same paramenters names in a specific function
MISRA-C requires that all declarations of a specific function, or
object, use the same names and type qualifiers.

MISRA-C rule 8.3

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-28 07:58:19 +05:30
Mark Ruvald Pedersen
d67096da05 portability: Avoid void* arithmetics which is a GNU extension
Under GNU C, sizeof(void) = 1. This commit merely makes it explicit u8.

Pointer arithmetics over void types is:
 * A GNU C extension
 * Not supported by Clang
 * Illegal across all ISO C standards

See also: https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html

Signed-off-by: Mark Ruvald Pedersen <mped@oticon.com>
2018-09-28 07:57:28 +05:30
Krzysztof Chruscinski
27459a13e4 arch: Add LOG_PANIC to fault handlers
Added LOG_PANIC to fault handlers to ensure that log is flush and
logger processes messages in a blocking way in fault handler.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2018-09-27 13:11:26 +05:30
Flavio Ceolin
5884c7f54b kernel: Explicitly ignoring _Swap return
Ignoring _Swap return where there is no treatment or nothing to do.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-14 16:55:37 -04:00
Sebastian Bøe
69d8c1c08c syscalls: Correct the type of _k_syscall_table
_k_syscall_table is an array of function pointers and is declared as
such in C sources, this makes it an STT_OBJECT[0] in the symbol
table. But when the same symbol is declared in assembly, it is
declared to be a function, which would make the symbol an STT_FUNC.

When linking with LTO this type inconsistency results in the warning:

real-ld: Warning: type of symbol `_k_syscall_table' changed from 2 to
1 in /tmp/cc84ofK0.ltrans8.ltrans.o

To fix this warning we declare the table with GDATA instead of GTEXT,
which will change the type from 'function' to 'object'.

[0]
https://docs.oracle.com/cd/E19455-01/816-0559/chapter6-79797/index.html

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-26 08:54:27 -07:00
Anas Nashif
483910ab4b systemview: add support natively using tracing hooks
Add needed hooks as a subsystem that can be enabled in any application.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
a2248782a2 kernel: event_logger: remove kernel_event_logger
Move to more generic tracing hooks that can be implemented in different
ways and do not interfere with the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
b6304e66f6 tracing: support generic tracing hooks
Define generic interface and hooks for tracing to replace
kernel_event_logger and existing tracing facilities with something more
common.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Adithya Baglody
a8b0b0d5e8 benchmarks: timing_info: Add hooks in the kernel for userspace.
Added sampling hooks in the kernel needed for userspace benchmarks.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Flavio Ceolin
0866d18d03 irq: Fix irq_lock api usage
irq_lock returns an unsigned int, though, several places was using
signed int. This commit fix this behaviour.

In order to avoid this error happens again, a coccinelle script was
added and can be used to check violations.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-08-16 19:47:41 -07:00
Sebastian Bøe
1186f5bb29 cmake: Deprecate the 2 symbols _SYSCALL_{LIMIT,BAD}
There exist two symbols that became equivalent when PR #9383 was
merged; _SYSCALL_LIMIT and K_SYSCALL_LIMIT. This patch deprecates the
redundant _SYSCALL_LIMIT symbol.

_SYSCALL_LIMIT was initally introduced because before PR #9383 was
merged K_SYSCALL_LIMIT was an enum, which couldn't be included into
assembly files. PR #9383 converted it into a define, which can be
included into assembly files, making _SYSCALL_LIMIT redundant.

Likewise for _SYSCALL_BAD.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-15 11:46:51 -07:00