Commit graph

2358 commits

Author SHA1 Message Date
Ioannis Glaropoulos
13a4d884f0 arch: arm: remove un-necessary inclusion of <string.h>
Remove the inclusion of <string.h>, if CONFIG_INIT_STACKS
is defined, because it is not required anywhere in thread.c.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-26 18:26:03 -05:00
Ioannis Glaropoulos
66192618a7 arch: arm: Minor style and typo fixes in inline comments
Several style and typo fixes in inline comments of arm kernel
files and thread.c.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-24 04:56:34 -07:00
Ioannis Glaropoulos
7d4339a920 arch: arm: add explanatory comment for SPLIM_NS set functions
This commit adds an inline explanatory comment in the API
for setting the non-secure stack-pointer limit registers, to
stress that the API is only applicable to Mainline ARMv8-M MCUs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-24 04:55:41 -07:00
Ioannis Glaropoulos
98e38109c4 arch: arm: fix error reason intialization
This commit fixes a minor bug by setting the error reason
(to, default, _NANO_ERR_HW_EXCEPTION) for errors detected
during Secure/Non-Secure stack inspection. Applicable only
to Secure firmware.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-24 04:55:41 -07:00
Piotr Zięcik
1c16cfcc30 arch: arm: Make ARM_MPU the sole option controlling MPU usage
This commit removes all MPU-related (ARM_CORE_MPU and NXP_MPU)
options exept ARM_MPU, which becomes master switch controlling
MPU support on ARM.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik
d393186d51 arch: arm: Introduce CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options
This commit introduces CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options,
which indicate which flavour of MPU is supported by given SoC family.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Sebastian Bøe
1765276000 arch: arm: Use BL instead of B to jump to _PrepC
The __reset vector is using the 'b' instruction to jump to _PrepC. 'b'
can only jump 2KB on Cortex-M0 platforms so this causes build failures
when _PrepC happens to be too far away from __reset.

To resolve this we use 'bl' instead as it can jump two thousand times
further[0].

This can also be resolved by porting the reset vector to C or by
placing the _PrepC function in a dedicated section that the linker
places next to __reset.

[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0489e/Cihfddaf.html

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-09-19 09:13:50 -04:00
Flavio Ceolin
4a211ec241 include: Add missing headers guard
Add missing headers guard

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Ioannis Glaropoulos
73e8454d17 arch: arm: remove power-of-two align and size requirement for ARMv8-m
The ARMv8-m Memory Protection Unit does not require MPU regions
to be power-of-two aligned and sized. This commit removes this
requirement when building for ARMv8-m MCUs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-14 23:05:13 -04:00
Flavio Ceolin
5884c7f54b kernel: Explicitly ignoring _Swap return
Ignoring _Swap return where there is no treatment or nothing to do.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-14 16:55:37 -04:00
Flavio Ceolin
8a9ba10c2c kernel: swap: Fix __swap signature
__swap function was returning -EAGAIN in some case, though its return
value was declared as unsigned int.

This commit changes this function to return int since it can return a
negative value and its return was already been propagate as int.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-14 16:55:37 -04:00
Sebastian Bøe
d98e046a24 cmake: move ti_lm3s6965-specific code into the soc directory
As far as possible SoC-specific code should be contained to it's
directory and core systems should not be referencing specific
SoCs. This keeps the common code clean and makes it easier to maintain
out-of-tree SoCs.

To this end we move CONFIG_SOC_TI_LM3S6965_QEMU's soft-reset related
code out of arch/arm/core/cortex_m and into arch/arm/soc/ti_lm3s6965.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-14 10:22:20 -05:00
Anas Nashif
abcf2ad5a8 kconfig: move soc selection to ZEPHYR_BASE/soc/
Rather than do that for each architecture, source SoC Kconfigs where the
code is maintained, under ZEPHYR_BASE/soc.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Anas Nashif
70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Paweł Zadrożniak
7c2197f2d8 boards: nrf: uart: Moved UART pin configuration to DTS (nRF boards)
UART pins (TX, RX, RTS, CTS) are now configured in DTS files.
RTS and CTS definitions are optional. If flow control is enabled
and RTS/CTS pins are not defined, then compiler will issue
an error message.

Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
2018-09-11 23:29:50 -05:00
Pawel Dunaj
c850ba8efa arch: arm: soc: nordic_nrf: nrf52: Add missing header
Add missing header required to use bool type.

Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
2018-09-11 08:43:53 -04:00
Maureen Helm
0439deeac6 arm: Clear primask and faultmask during startup
A bootloader may leave primask or faultmask set, so clear them during
startup when we enable interrupts and switch to the main thread.
Previously we only cleared primask for architecture variants which don't
support basepri, but now we do it for all architecture variants.

Fixes a failure on mimxrt1050_evk with the latency_measure test and
shell_module sample when using an nxp internal bootloader.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-11 08:36:57 -04:00
Filip Kubicz
990a0e8c71 dts: add SPI bindings for nRF family
This change adds DTS definition of SPI device for nRF chips.
It also removes SPI pin configuration from Kconfig and moves it to
chip DTS.

Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
2018-09-11 11:41:37 +02:00
Filip Kubicz
5c3992f34f dts: update I2C bindings for nRF chips
Change 'nRF5' family names to 'nRF' in I2C DTS.

Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
2018-09-11 11:41:37 +02:00
Justin Watson
4e551aabb6 sam: adc: Updated SAM ADC driver.
Updated to work with new ADC API.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-08-29 13:46:57 -04:00
Andrzej Głąbek
0a97b5bf35 dts: nrf: Add ADC nodes and bindings for nRF SoCs
This commit adds ADC nodes to DTS files for nRF SoCs and introduces
corresponding  bindings for these nodes.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-08-29 13:46:57 -04:00
Yannis Damigos
d2e713f9ef arch: stm32l4: Enable gpio interrupts correctly
Enable gpio interrupts correctly and don't
disable the already enabled interrupts.

Fixes #9630

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-29 08:53:09 -04:00
Yannis Damigos
32a6fa1c58 arch: st_stm32: Remove I2C and SPI instances from common defconfig
Remove I2C and SPI instances when enabling I2C_STM32 and
SPI_STM32 drivers.

It allows to enable the drivers if ports I2C_4, SPI_4,
SPI_5, SPI_6 are selected.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-29 07:04:32 -05:00
Kiril Zyapkov
64b130683c arch: arm: stm32l4: add missing I2C_3 to dts.fixup
One can enable I2C_3 in kconfig and set status = "ok" in dts, but
the driver expects to find the config as fixed up with this
addition.

Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
2018-08-28 13:18:44 -05:00
David B. Kinder
1c29bff055 doc: fix kconfig misspellings
Fix misspellings in kconfig files missed during regular reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-08-28 13:58:46 -04:00
Adithya Baglody
511edf0175 Revert "sam_e70: enable instruction and data caches on sam_e70"
This reverts commit c0907762f3.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-28 13:46:47 -04:00
Anas Nashif
c0907762f3 sam_e70: enable instruction and data caches on sam_e70
The Cortex-M7 CPU included in the SAM e70 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization.

Fixes #8138

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-27 10:09:19 -04:00
Sebastian Bøe
69d8c1c08c syscalls: Correct the type of _k_syscall_table
_k_syscall_table is an array of function pointers and is declared as
such in C sources, this makes it an STT_OBJECT[0] in the symbol
table. But when the same symbol is declared in assembly, it is
declared to be a function, which would make the symbol an STT_FUNC.

When linking with LTO this type inconsistency results in the warning:

real-ld: Warning: type of symbol `_k_syscall_table' changed from 2 to
1 in /tmp/cc84ofK0.ltrans8.ltrans.o

To fix this warning we declare the table with GDATA instead of GTEXT,
which will change the type from 'function' to 'object'.

[0]
https://docs.oracle.com/cd/E19455-01/816-0559/chapter6-79797/index.html

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-26 08:54:27 -07:00
Aurelien Jarno
069d409b29 arch: arm: stm32: enable instruction and data caches on STM32F7
The Cortex-M7 CPU included in the STM32F7 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization. Note that the D-cache should only be enabled if it
is disabled, to workaround CMSIS issue #331.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-08-25 07:15:33 -07:00
Piotr Mienkowski
f69199777f soc: efr32fg1p: correct clock initialization sequence
This patch changes clock initialization sequence to initialize external
cristal oscillators only if it was not done before. Initialization of
external cristal oscillators may be performed by the bootloader.

Tested on BRD4250B evaluation board.

Fixes #9471

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2018-08-22 11:06:58 -05:00
Ramakrishna Pallala
1301cc636b arch: arm: nordic_nrf: Add an API to check for valid PM state
Add an API _sys_soc_is_valid_power_state to check if a PM state
is valid or not.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-08-22 08:07:14 -07:00
Diego Sueiro
d1219f4e29 arch/mcimx7_m4: Add i.MX7 Solo Kconfig SoC partnumber define
Adds the proper Kconfig entries for the i.MX7S partnumber presented
on WaRP7 board.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-21 18:54:41 -05:00
Diego Sueiro
671cb652a1 arch/mcimx7_m4: Add pad, clock and gate config for GPIO7 and UART6
Adds the necessery configuration for using the GPIO7 and UART6 on
i.MX7 platforms.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-21 18:54:41 -05:00
Anas Nashif
483910ab4b systemview: add support natively using tracing hooks
Add needed hooks as a subsystem that can be enabled in any application.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
a2248782a2 kernel: event_logger: remove kernel_event_logger
Move to more generic tracing hooks that can be implemented in different
ways and do not interfere with the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
b6304e66f6 tracing: support generic tracing hooks
Define generic interface and hooks for tracing to replace
kernel_event_logger and existing tracing facilities with something more
common.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Adithya Baglody
a8b0b0d5e8 benchmarks: timing_info: Add hooks in the kernel for userspace.
Added sampling hooks in the kernel needed for userspace benchmarks.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Ioannis Glaropoulos
6ee0ad2944 arch: arm: add ASSERT in _get_region_attr_by_type
This commit adds an __ASSERT line in _get_region_attr_by_type,
to signal an error if the supplied MPU region type is not valid.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
b956690520 arch: arm: mpu: explicitly add UL in numerical shift operations
This commit adds a UL suffix after numerical digits to ensure
the correctness of certain shift operations.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
2a1fe6e285 arch: arm: implement ARMv8-M MPU driver
This commit implements and integrates the ARMv8-M MPU driver
into the memory protection system for ARM.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
2f0e722167 arch: arm: mpu: move ARMv7m-specific functions in internal header
This commit refactors arm_mpu.c by moving all internal function
implementation that is specific to ARMv7-M architecture to a
separate internal header file. This allows to easily extend
arm_mpu.c to support ARMv8-M by including all ARMv8-M-specific
implementation in a similar internal header.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
5a69648061 arch: arm: refactor _get_region_attr_by_conf(.) function
This commit refactors the _get_region_attr_by_conf(.) function,
so it does the following:
 - it is renamed to _get_ram_region_attr_by_conf(), to reflect
   that it is only used to configure RAM MPU regions.
 - it gets an arm_mpu_region_attr_t object structure pointer
   to fill-in with the derived region attributes.
 - it takes an additional argument (the region base address),
   which allows the function to have a common signature with the
   ARMv8-M version of it (where the attribute derivation needs
   the base address).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
829781d56e arch: arm: refactor _get_region_attr_by_type() function
This commit refactors the _get_region_attr_by_type(.) function,
so it does the following:
 - it takes an arm_mpu_region_attr_t object pointer and use it
   to fill-in the derived region attributes.
 - it performs only the distinguishing between the different MPU
    region types, hiding the actual MPU-specific implementation
	in internal functions.
 - it takes an additional argument (the region base address),
   which allows the function to have a common signature with the
   ARMv8-M version of it (where the attribute derivation needs
   the base address).
 - it returs 0 or succes and a negative non-zero integer
   to indicate an error.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
ff919d5fdb arch: arm: adapt region_init(.) to use arm_mpu_region_attr structure
This commit adapts the _region_init(.) function so it can use
the rasr field of the arm_mpu_region_attr structure, when it
configures the RASR register.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ulf Magnusson
21e63ed2ae arch: arm: kconfig: Remove redundant FLOAT dependencies
The choice that contains FP_HARDAPI and FP_SOFTAPI already depends on
FLOAT, so the choice symbols don't have to.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-18 07:54:20 -07:00
Mieszko Mierunski
4f6aac1a67 dts: nrf5: Changed GPIO and GPIOTE define names
Changed names using nrf5 to nrf for consistency with other drivers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
15813d343c boards: nrf: Changed GPIO default driver to NRFX shim
I removed GPIO configuration from board files and enabled them
as default in driver Kconfig file. All boards had GPIO ports
enabled that is why I decided to enable it by default.

Power management example was changed to use new driver.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
6d8220d27f drivers: gpio: Add shim for nrfx GPIO and GPIOTE drivers
Added shim implementation gpio_nrfx.c which uses nrfx drivers
for GPIO and GPIOTE

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00
Mieszko Mierunski
e99e363cc0 dts: nrf: Added DTS support for nRF51
DTS for nRF51 was missing, I updated soc and board files to
support DTS properly.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00