Commit graph

929 commits

Author SHA1 Message Date
Chuck Jordan
cd198764ba arc: branch too far when STACK_CHECKING enabled.
A build error was resulting if CONFIG_ARC_STACK_CHECKING is enabled.
There is a breq that was too far. Adding conditional code to
re-arrange the branching so that it can be done.

See ZEP-1116.

Change-Id: Idea85817b2e05617bbaa4450437aa74c5737e213
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-12-02 22:57:14 +00:00
Ramesh Thomas
aae7ac0765 quark_se_ss: power_mgmt: Remove redundant int trigger setting
Zephyr is always setting irqs to be level triggered as
required by the core. It is unnecessary to set it to
level again while entering sleep states.

Change-Id: I10f919d619af2e1ab05dc85a67766929b6ae9402
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-12-02 14:03:06 +00:00
Benjamin Walsh
4e8a54c1e3 arc: move disabling/invalidation of caches earlier
Too much code might run with a stale icache, before _PrepC(), so move
the invalidation/disabling code earlier. The asm code does the exact
same thing disable_icache() and invalidate_dcache() were doing.

Change-Id: If52f4e4a1de546fb82873c91ead95614a44b106d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-30 23:47:46 +00:00
Ramesh Thomas
87a2b02189 quark_se_ss: power_mgmt: Fix a bug in call to sleep instruction
When sleep instruction is called with interrupts enabled, the
interrupt priority threshold bits need to be set. Only interrupts
with equal or higher priority will wake the sleep. Currently it
is set to 0 unintentionally and only priority 0 interrupt can
wake the sleep.

Jira: ZEP-1349
Change-Id: I927e259345cc37c5ecc4dfdcde996dd16443e61b
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-28 01:00:35 +00:00
Benjamin Walsh
6741561ae4 arc: fix missing _firq_stack symbol when INIT_STACKS=y and NUM_BANKS=1
There is no FIRQ stack in the system in this case, so do not initialize
it.

Change-Id: I8bc068ce43ac8a39909994d8cc01ba0c6a17f4ae
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-26 14:04:19 +00:00
Benjamin Walsh
b2974a666d kernel/arch: move common thread.flags definitions to common file
Also remove NO_METRIC, which is not referenced anywhere anymore.

Change-Id: Ieaedf075af070a13aa3d975fee9b6b332203bfec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-26 14:04:18 +00:00
Benjamin Walsh
069fd3624e kernel: streamline initialization of _thread_base and timeouts
Move _thread_base initialization to _init_thread_base(), remove mention
of "nano" in timeouts init and move timeout init to _init_thread_base().
Initialize all base fields via the _init_thread_base in semaphore groups
code.

Change-Id: I05b70b06261f4776bda6d67f358190428d4a954a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-23 00:27:42 +00:00
Benjamin Walsh
50eb51a745 arc: support interrupt/FIRQ stacks with CONFIG_INIT_STACKS
Use the main stack during very early boot so that we can call memset on
the interrupt and FIRQ stacks. Iniitalize the them before one of them is
used for the rest of the pre-kernel initialization.

Change-Id: Ib57856a66273dda9382e08fa91da5a54847b77c2
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-23 00:24:01 +00:00
Benjamin Walsh
83e6df26f9 arc: use one of the interrupt stacks during early init
Same issue as with ARM. ARC can use _Swap() though, because the call to
it is serial, not generating a low-priority exception and interrupts are
locked until the main() thread is context-switched into and the
interrupt stack is released.

Fixes ZEP-1310.

Change-Id: Ie1f27f7ad0502191ca2867b5400d6e0bfb7f0fc6
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-23 00:23:59 +00:00
Benjamin Walsh
8fcc7f69da kernel/arch: remove unused uk_task_ptr parameter from _new_thread()
Artifact from microkernel, for handling multiple pending tasks on
nanokernel objects.

Change-Id: I3c2959ea2b87f568736384e6534ce8e275f1098f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-23 00:23:57 +00:00
Benjamin Walsh
669360d5ec kernel: fix thread prio and stack size types in some APIs
Prio should be an int, since values are small integers, not a fixed-size
int32_t. It aligns with the prio parameters of the other APIs.

Stack size should be size_t.

Change-Id: Id29751b86c4ad7a7c2a7ffe446c2a96ae83c77bf
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-18 23:08:46 +00:00
Inaky Perez-Gonzalez
11bd718733 fatal error handlers: report which thread croaked
When a thread dies, at least print the pointer to it, so we can debug
better.

Change-Id: Ief6bbc0c221e2d5271c240a4b73df16413aa5e22
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2016-11-17 14:36:50 +00:00
Benjamin Walsh
f6ca7de09c kernel/arch: consolidate tTCS and TNANO definitions
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.

Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.

The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.

The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.

Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.

Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-12 07:04:52 -05:00
Chuck Jordan
73c5b2861e arc: trap handler should always check IRQ_ACT
Regardless of the number of interrupt priorities
supported, the exit of the trap handler can check
AUX_IRQ_ACT to see if it interrupted a FIRQ or IRQ.

Change-Id: I0b84d8298d3e6e437c934c01db4535fa8fe29458
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-11 21:37:18 +00:00
Julien Delayen
f540cbc5c5 power: Add ARC power states and update sample
Add Low Power States support to the power shim layer
and show the usage in the quark_se sample.

States are defined as follow:
- SYS_POWER_STATE_CPU_LPS: SS2 with LPSS enabled
- SYS_POWER_STATE_CPU_LPS_1: SS2 with LPSS disabled
- SYS_POWER_STATE_CPU_LPS_2: SS1 with LPSS disabled

Jira: ZEP-994

Change-Id: Ie4b93f6e539cb53fc035be00280b66b2cb0d9fea
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-11-11 03:28:54 +00:00
Andrew Boie
56f561e15e arches: use new kernel APIs
Change-Id: I4b6f5264d5295ebf4278991a1f4e2141bef6602f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 20:49:40 +00:00
Andrew Boie
0b474eef9c kernel: deprecate old init levels
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.

New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.

Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.

Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 17:59:44 +00:00
Benjamin Walsh
3cc2ba9f9c kernel: add __ASSERT() for thread priorities
Verify the thread priorities are within the bounds when starting a new
thread and when changing the priority of a thread.

Change-Id: I007b3b249e4b80235b6439cbee44cad2f31973bb
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-08 20:27:31 -05:00
Benjamin Walsh
5986ec040b arc: fix race condition when returning from interrupt
A race condition would happend if a FIRQ interrupted a
return-from-interrupt from a RIRQ at the wrong moment: if a decision was
already taken which thread to context switch in and the FIRQ woke up
another thread of higher priority, the ready queue would be corrupted.

The solution is to lock interrupts at the moment the interrupt return
code starts looking at the kernel queues. Interrupts do not need to be
unlocked before exiting: the return-from-interrupt (rtie) instruction
will restore the correct interrupt locking state for the thread being
context switched in.

Change-Id: I777665c2faeca7b1f2a77ddd9ee2a520080bae88
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-08 22:50:14 +00:00
Andrew Boie
9b0ec51098 arc: remove CONFIG_NANOKERNEL code
Change-Id: I1978c067d422aebb52d736ac747443a06bd437c3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-08 22:02:46 +00:00
Iván Briano
f4764fc348 counter qmsi: Enable the driver to work on ARC
Jira: ZEP-1030

Change-Id: I3f5e26f399a163467ec8371802b7472d87416940
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-08 14:37:35 -02:00
Chuck Jordan
381cb25f63 arc: cache.h support added for em7d and em11d SOC
An implementation to flush multiple d-cache lines has been added
per the top-level cache.h API. ZEP-1153 was opened to express
the need for MORE i-cache and d-cache APIs. For example, the current
cache.h API doesn't provide a means to invalidate d-cache lines
and has nothing for i-cache.

I've also modified some of the i-cache related aux registers to have
better names so that they won't be confused with d-cache.
These changes are for
ZEP-1176.

Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-07 18:53:49 +00:00
Allan Stephens
f48f263665 kernel: Rename USE_FP and USE_SSE symbols
Symbols now use the K_ prefix which is now standard for the
unified kernel. Legacy support for these symbols is retained
to allow existing applications to build successfully.

Change-Id: I3ff12c96f729b535eecc940502892cbaa52526b6
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-11-07 18:52:31 +00:00
Andrew Boie
8871cf0994 arc: remove support for legacy kernels
Change-Id: Id3d8285dc39428752758ee47fb1b826f05b1f3e0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-04 11:45:14 -07:00
Allan Stephens
a3f3de3741 unified: Rename ESSENTIAL to K_ESSENTIAL
Adds standard prefix to symbolic option that flags a thread
as essential to system operation.

Change-Id: Ia904a81ce343fdd1cd44caaaeae641d822777f9b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-11-04 00:47:08 +00:00
Iván Briano
f028973f43 gpio qmsi: Enable SoC level GPIO to work on ARC too
The GPIO and AON GPIO ports are available to both the x86 and ARC
cores, but the driver always assumed only the x86 at the time of
configuring interrupts.

Use the available macros to set the correct values independently of
which core it's being built for.

Jira: ZEP-1030
Change-Id: I310afcc48780fbe1cac9dc3368a6de11bd797fda
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:56 +00:00
Iván Briano
34cf9773b1 gpio qmsi: Differentiate between the SoC GPIO and SS GPIO
The SoC level peripherals are accesible by both cores, while the SS
ones are only available to the sensor subsystem. Since the ARC core can
make use of both drivers at the same time, we need to be able to
differentiate their configuration values somehow.

Also disable the SoC GPIO for the ARC by default, as it still needs
more changes to be usable.

Jira: ZEP-1030
Change-Id: Ic5415c404ecd32a3e560467b6f5eaa873a515d72
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:52 +00:00
Iván Briano
5b2160b598 watchdog qmsi: Enable the driver to work on ARC
Jira: ZEP-1030
Change-Id: Iab5bb301dae9a18dc2050606f230606ef76bebb5
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:48 +00:00
Iván Briano
244af4a2af aio qmsi: Enable the driver to work on ARC
Jira: ZEP-1030
Change-Id: I614646053974d6a81579bbea9d969a10916f9cac
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:44 +00:00
Iván Briano
cb6cba2c70 dma qmsi: Enable the driver to work on ARC
Jira: ZEP-1030
Change-Id: I29f742762d92ca86361be9c9ed76e8cea21d58b6
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:40 +00:00
Iván Briano
b63e635a18 rtc qmsi: Enable the driver to work on ARC
Jira: ZEP-1030
Change-Id: Ie57b183c9fdf0e0cb70c7d81b92b221d54a32c0f
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:28 +00:00
Iván Briano
beb4f405d8 socs quark: Simplify IRQ configuration
IRQ numbers differ between x86 and ARC, as well as the bits that need to
be touched in the interrupt routing masks. QMSI abstracts some of it and
for the rest we do have the information needed.

Add a macro to select the right IRQ number based on which core we are
building for.

Change-Id: I3e6680d10a0a23c98777d2831efe6819fcb54162
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-11-02 22:24:27 +00:00
Chuck Jordan
8b1958a36a arc: Don't need CONFIG_NUM_REGULAR_IRQ_PRIO_LEVELS
We can derive NUM_REGULAR_IRQ_PRIO_LEVELS by subtracting 1
from CONFIG_IRQ_PRIO_LEVELS if FIRQ is present (which is currently
always the case). If FIRQ is not present, the value will be equal
to CONFIG_IRQ_PRIO_LEVELS since all interrupts will be regular.

Change-Id: Ibefc939e3771bf0adf712127db0d36cb49bf732b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-31 23:56:56 +00:00
Dmitriy Korovkin
3c7dda3897 unified/arc: Fix scheduler algorithm bug
Fix the error in thread rescheduling:

Fix Fast IRQ exit routine error when it reschedules threads if
(prio >= 0) || (sched_locked == 0) || (next_thread == _current),
while the correct condition for thread rescheduling is:
(prio >= 0) && (sched_locked == 0) && (next_thread != _current),

Fix regular IRQ error when the regular IRQ exit routine rescheduled
threads when (next_thread == _current) instead of
(next_thread != current).

Increased IDLE_STACK_SIZE for ARC architecture, to hold saved
registers.

Change-Id: I1d87a968e231e13822844b7564567e6ca310cde2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-28 17:46:54 +00:00
Benjamin Walsh
b452817b67 kernel: merge _IS_IN_ISR() with _is_in_isr()
They were the same, standardize on the lowercase one.

Change-Id: I8bca080e45f3e0970697d4451e468b9081f96f5f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-10-27 21:45:03 +00:00
Allan Stephens
743bdb8143 unified: Enable handling of thread options for static threads
Change-Id: I51d2d9cfa0eeb5f974a6cf1db32406399ef57418
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-27 08:36:14 -05:00
Allan Stephens
2220f25f0a kernel: Standardize thread monitoring initialization
Gets rid of unnecessary THREAD_MONITOR_INIT() macro, to be
consistent with the approach taken by _thread_monitor_exit().

Aligns x86 code with the approach used on other architectures.

Revises the associated comments and removes unnecessary
doxygen tags.

Change-Id: Ied1aebcd476afb82f61862b77264efb8a7dc66c9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-26 17:03:12 +00:00
Dmitriy Korovkin
dc76dbf2ef unified: Add tickless idle support for ARC
Change-Id: I89684e7bee379be0a18f64e4f2c39ae132fe7e6d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:01 +00:00
Dmitriy Korovkin
909bfffda9 unified/arc: add unified kernel support for ARC arch
- the interrupt (both regular and fast) now does not do rescheduling
  if the current thread is a coop thread or if the scheduler is not locked

- the _nanokernel.flags cache of _current.flags is not used anymore
  (could be a source of bugs) and is not needed in the scheduling algo

- there is no 'task' field in the _nanokernel anymore: scheduling routines
  call _get_next_ready_thread instead

- the _nanokernel.fiber field is replaced by a more sophisticated
  ready_q, based on the microkernel's priority-bitmap-based one

- thread initialization initializes new fields in the tcs, and does not
  initialize obsolete ones

- nano_private includes nano_internal.h from the unified directory

- The FIBER, TASK and PREEMPTIBLE flags do not exist anymore: the thread
  priority drives the behaviour

- the tcs uses a dlist for queuing in both ready and wait queues instead
  of a custom singly-linked list

- other new fields in the tcs include a schedule-lock count, a
  back-pointer to init data (when the task is static) and a pointer to
  swap data, needed when a thread pending on _Swap() must be passed more
  then just one value (e.g. k_stack_pop() needs an error code and data)

- the 'fiber' and 'task' fields of _nanokernel are replaced with an O(1)
  ready queue (taken from the microkernel)

- fiberRtnValueSet() is aliased to _set_thread_return_value since it
  also operates on preempt threads now

- _set_thread_return_value_with_data() sets the swap_data field in
  addition to a return value from _Swap()

- convenience aliases are created for shorter names:

  - _current is defined as _nanokernel.current
  - _ready_q is defined as _nanokernel.ready_q

- _Swap() sets the threads's return code to -EAGAIN before swapping out
  to prevent timeouts to have to set it (solves hard issues in some
  kernel objects).

Change-Id: Ib9690173cbc36c36a9ec67e65590b40d758673de
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:00 +00:00
Dmitriy Korovkin
05d4b23f22 arc: Fix RGF_NUM_BANKS==1 and NUM_IRQ_PRIO_LEVELS>1 problem
Define _firq_scratch_restore, needed when CONFIG_RGF_NUM_BANKS==1
outside of CONFIG_NUM_IRQ_PRIO_LEVELS > 1 clause.

Change-Id: I82eef11a005a35f38a064ce3ce1d6521d6428958
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:00 +00:00
Chuck Jordan
13900b7046 arc: remove some NSIM conditionals
EM7D was recently merged, and one change suggested there was
to remove conditional checks for NSIM. It is OK to have the simulator
use the exact same memory addresses and sizes as would be found on the
board. This submission fixes EM9D and EM11D to be the same -- i.e.
to not have NSIM conditionals.
See ZEP-966.

Change-Id: Ia990ff7bb4b7ff5071af83723ed3d1420fdff012
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-21 11:53:37 -07:00
Chuck Jordan
a9442ab761 arc: em_starterkit board can now support SOC=EM7D
The EM7D SOC is similar to EM11D, except it has different sized
iccm and dccm memories, and also has FIRQ with RGF_NUM_BANK==1.
To select this SOC on the board, all dip switches are in the up position.
See ZEP-966.

Change-Id: I864ffe0efdf367de0a8cd58e9c46efd7e401c671
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-21 18:10:04 +00:00
Chuck Jordan
ff303948d5 arc: Support FIRQ handling when CONFIG_RGF_NUM_BANKS==1
For the EM Starterkit, one SOC I will soon be adding is EM7D.
This SOC has FIRQ, but only has one register bank.
Thus the interrupt handling for FIRQ needs to be different
when CONFIG_RGF_NUM_BANKS==1. The handler must instead push
registers onto the stack in the same stack frame layout that RIRQ uses.
This allows for context switch to be easily done since its compatible.
The common interrupt entry point _isr_enter must save r0 before using
it, because in the FIRQ 1-bank case, it would be destroyed otherwise.
So a global variable named saved_r0 has been added for this reason.
The stack cannot be used to save r0, because it first has to determine
whether its FIRQ or RIRQ here. This change has been tested on the
EM Starterkit with EM7D SOC changes -- coming soon. To make the review
easier, these 3 files are submitted first.

Also, exceptions will no longer use the _firq_stack.
This stack is not needed in the 1-bank case, but an exception stack
is needed. I've added a new stack called _exception_stack,
and made it be 512B, which should be enough for one exception.
See ZEP-966

Change-Id: I6f228b840da7c4db440dd1cfef4ae25336c87f0d
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-18 20:26:29 +00:00
Marcus Shawcroft
8ea6287c0b quark: ipm: Make driver config structures static.
Change-Id: I2d4977aaea9df969fd8edb4b07310e472e6c6917
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-15 12:29:18 +00:00
Chuck Jordan
df4c0acd2d arc: Fix comment about IRQ call stack
The code density registers are NOT saved on the stack.
This is controlled by bit 13 in AUX_IRQ_CTRL, which didn't even have a symbol
defined for it. I've also added _ARC_V2_AUX_IRQ_CTRL_LP for bit 13.

Change-Id: Ie80853b72bed4e60a5cf1cf0a8c905a3d86180d9
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-07 20:50:26 +00:00
Chuck Jordan
ed569f525d arc: RGF_NUM_BANKS is another configurable option for ARCs
In order to add the EM7D SOC, I will be implementing a version of the FIRQ
interrupt handler that saves and restores registers on the stack when
RGF_NUM_BANKS==1. All other ARC SOCs at this time have RGF_NUM_BANKS==2,
allowing for a faster handler that can use the registers in the 2nd register bank.
But EM7D doesn't have this 2nd bank, hence the need for this new configurable choice.
(See ZEP-966)

Change-Id: Ie089f1f079902552cf279c2cda23ee0805b01eed
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-07 20:50:25 +00:00
Qiu Peiyang
76549c1b79 I2C: remove obsolete i2c_quark_se_ss driver
i2c_quark_se_ss driver is deprecated and replaced
by i2c_qmsi_ss. So remove i2c_quark_se_ss definition.

Change-Id: Idcc6a7f01ffae626ae7d5f9966eac67be78599af
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2016-10-05 10:07:30 +00:00
Qiu Peiyang
2a2291d430 remove unused whitespace in arch/arc/core/fault_s.S
commit  e57b21c78c ("irq: Use lowest priority not a
hard-coded priority 2") introduce a wrong whitespace,
not complying with coding style. Remove it.

Change-Id: Ie7e48843e5da6cb3417773ef8a57cf9a166c70d6
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2016-09-25 20:35:09 -04:00
Chuck Jordan
e57b21c78c irq: Use lowest priority not a hard-coded priority 2
In this file was found an assumption about how many
priorities are being used. This is configurable with
CONFIG_NUM_IRQ_PRIO_LEVELS, however, so it should be using that
instead. This line of code changes:
or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1))
so as to use the correct bit to OR.

Change-Id: I8c6297e98b5163aa27460a68b203e8a27d1e2506
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-09-24 23:22:03 +00:00
Chuck Jordan
8e5c813a24 irq: _ARC_V2_DEF_IRQ_LEVEL should be set to last legal priority
Set _ARC_V2_DEF_IRQ_LEVEL to the last legal priority value, and not 15.
The last legal value is: (CONFIG_NUM_IRQ_PRIO_LEVELS-1).
This is safer because we don't want priorites not configured to be 
enabled.

Change-Id: I1689cc00aa7e707a204d16ec17d7f396566e8638
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-09-24 23:22:03 +00:00