The headings on some .rst files were not following the expected
heading order of using # for h1, * for h2, = for h3, and - for h4
This patch fixes that, and the doc/templates/*.tmpl files created
for folks to use as templates for creating board and sample docs.
Change-Id: I0263b005648558d5ea41a681ceaa4798c9594dd9
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
zedboard_pulpino
1) has a 16750 uart, which is compatible with the uart_ns16550 driver.
2) make use of the pulpino timer driver
Change-Id: Ifda710fc8dea547ada05bb42e604d7cfdff284d5
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
The qemu_riscv32 board makes use of:
1) the uart_riscv_qemu driver
2) the riscv_qemu_timer driver
Change-Id: I413e3990a66bc62a0d15d82ebca6940b381fed43
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
The k64 gpio driver quietly initializes the pinmux to force the pin to
be a gpio, regardless of the setting defined by the board's pinmux
table, or even if the pin was not in the pinmux table.
This behavior caused the accelerometer interrupt pin to be incorrectly
defined in the frdm_k64f and hexiwear_k64 pinmux tables.
Change-Id: If46df0e051452fef291d5ad5cdff56463d5f465e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The hexiwear_k64 i2c pinmux settings were copied over incorrectly when
the new mcux pinmux driver was created.
Change-Id: I72e5f8f7c06e2d9b08921109691edaf311f3811b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the uart console pins from the k64 soc init to the frdm_k64f and
hexiwear_k64 board pinmux tables. Not having these pins in the board
pinmux tables led one to believe that no pins in PORTB were being used
on the hexiwear_k64 board, and thus the port was incorrectly disabled by
default.
Also fixes PORTB to be enabled by default if the uart console is used.
Change-Id: Ide6b7b34dfba8a75a02a8f2bf37cce843afb92f1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Provide USER button and LD2 Led defines in order to get basic samples
"blinky" and "button" available on nucleo boards.
Defines have been named in order to match with board printing.
Aliases are provided to get compatibility with zephyr sample code.
Change-Id: Ie23a4f63c406def50b94a644d4e136d3bda1ceff
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Previously, CC3200 drivers had two options to use the peripheral
driver library APIs:
1) Build driverlib SDK files in Zephyr, in ext/hal/ti/cc3200/*
2) Link directly with the driverlib.a, from an externally installed
TI CC3200 SDK.
A new option is added to replace option 2), and is now the default:
3) Use the driverlib functions already provided in ROM.
This enables a savings in code size, which will depend on the
types of device drivers configured and the number of SDK
APIs actually used.
A rom_report build of the shell sample application showed
a savings of about 2kb in code space using this new config option.
Change-Id: Ie1ede6f7aacd23db20f5292e776f1dfeab5c7fe0
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Merges the ksdk pinmux dev driver into the regular ksdk pinmux driver,
which now exposes the public pinmux API. Removes the private ksdk pinmux
API and converts the frdm_k64f and hexiwear_k64 boards to use the public
pinmux API.
Jira: ZEP-958, ZEP-1432
Change-Id: Ie5f60b604133093050b9c596050cad776d7b7cb3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enable PORTD on the frdm_k64f only if SPI_0 is enabled. Otherwise, there
are no pins in the pinmux table for this port and it should be left
disabled.
Change-Id: I7f8a05552f6a320debfd11a780be1092da831101
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Disable PORTA and PORTB by default on the hexiwear_k64 since there are
no pins in the pinmux table for these ports. Enable PORTE only if UART4
is enabled.
Change-Id: Ifdb01cacf0c475a9478454eb61474a930e22a628
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds the documentation page for the ARM V2M Beetle board into
the Zephyr tree.
Jira: ZEP-1300
Change-Id: I4f2fd9a4e496c0a674272f94bedcadf3c71d9971
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We get odd warnings associated with Kconfig because of this:
warning: symbol value '0# empty for now, use this file for global kernel
configurations and overrides.' invalid for CLOCK_STM32F4X_APB2_PRESCALER
Change-Id: I77c2828ab29dfa179f345953cc490dbd67fd0b5a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes the following warning:
warning: override: reassigning to symbol UART_CONSOLE
Change-Id: I09805bdfa31146faf276ca4ec06487a5d71cdff5
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will replace the current goal of 'make qemu' with 'make run' and
moves Qemu handling into its own file and into the boards instead of
being architecture specific.
We should be able to add new boards that support some other type of
emulation (by adding scripts/Makefile.<emu type>) and allow the board to
define their own options for the use type of emulation.
'make qemu' will still work, however it will be deprecated, starting
with this commit it is recommended to use 'make run'.
Jira: ZEP-359
Change-Id: I1cacd56b4ec09421a58cf5d010e22e9035214df6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the existing debugserver target also for Qemu debugging. Qemu
should be maintained as one of many emulation/simulations platforms and
emulation should be abstracted in the Makefiles and not tied to Qemu.
qemugdb will still work, it is however being deprecated.
Change-Id: I0cd10fb66debb939b8f7f1304bf2ef4605da6a1d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Re-add board documentation and integrate into the project online
documentation.
Setup sphinx to pick any new board documentation added to boards/*.
Change-Id: Id208d5ef923f8806135879dd33a55ed527dc5f27
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Disk IO functions are used by both FS and USB Mass Storage.
This patch refactors those from FS directory to a separate one.
In addition existing, config options were modified to make
stuff meaningful.
Jira: ZEP-1276
Change-Id: Ia2a2e18f3dbbbdb964c3dc0427d8138ad86134cd
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable arc to access the spi controller on I/O fabric.
There are two spi controllers on quark se SoC. One is attached
to the I/O fabric and the other one is in the sensor system.
X86 cpu is only able to access the spi controller on the I/O
fabric and the access is supported by existing code. HW allows
arc to access both controllers. But, the existing code only
gives arc access to the controller in the sensor sub-system.
Let's grant arc the access to the controller on I/O fabric as
well by the following changes.
1. Add spi_qmsi.c into arc compilation.
2. Use the already defined macros to choose interrupt numbers
and do interrupt unmasking automatically based on the
compilation targets.
3. Add new symbols in Kconfig including driver names for both
controllers
Jira: ZEP-1190
Change-Id: I40a5d423d4b7986a897834d1a3831938005eda6f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
ZEP-1317 records a problem were em_starterkit appears to boot up
EM7d, sometimes, due to a misread of the dip-switches.
This could be a mechanical issue. I am seeing it on my board too,
and I often have to struggle with the dip-switch to get it to boot
EM9D. For automated-testing, perhaps it is better if the default is
EM7D, since this is the all-switches-up and contact in the switch
isn't needed. Meanwhile, I'll work with our board team to try to get
to the bottom of this.
ZEP-1317
Change-Id: I41095c1d8b07ce156cc3856a50196c064af2ee18
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The basic button sample expects SW0_GPIO_NAME and SW0_GPIO_PIN macros to
be defined by board.h. The frdm_64f doesn't have a physical switch with
this name, so create an alias to SW3 to make the sample work.
Change-Id: I61eb096582d9898dbcb9799e69078ad0c4b700cf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The basic blinky sample expects LED0_GPIO_PORT and LED0_GPIO_PIN macros
to be defined by board.h. The frdm_k64f and hexiwear_k64 boards don't
have a physical LED with this name, so create an alias to the green LED
to make the sample work.
Change-Id: I3426c571bb2e3165dbd9f4372d863b474c35fd5c
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Previously, UART clock enable was done in pinmux init.
This is now moved into soc initialization, along with other
power related initialization routines.
Change-Id: I1f9464655ad966e9caac2d238006f12a06b202ab
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Previously, running UART applications in Zephyr from sFlash would
not show consistent character output.
The PRCM clock enable for UART was missing the sleep mode while
enabling the UART clock.
This has been fixed, and verified with philosophers (polled output)
and shell (interrupt driven) zephyr examples running from sFlash.
Change-Id: I95a87996f252d82b0c1c13d3f77535971b5cf9c5
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
In this particular case the LEDs are actually arranged in a 3x9 matrix,
with the GPIOs wired to the rows and columns of said matrix. An upcoming
patch will provide utility functions to access the matrix.
Change-Id: Icce93ee6a08ae28445c6dc4a41529105ac80f14a
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
Change-Id: Ia0be30cecd8c0ceabb495258480eb6f3ce13d3e5
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
Change-Id: I2785441c286b95fd77e636e9bf3d68bc9f5a1acc
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to the
corresponding GPIOs they are wired into.
Change-Id: I60903eb834ef1b2618b0525896c120fca84db177
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
To make way for the upcoming blinky and GPIO support for nRF5x-based
boards, this change addresses the hardcoded dependencies in Kconfig
default configurations of the different boards, moving the common option
defaults to the SoC default configuration itself.
Change-Id: I8db0750311ad5a12b76237b39438376f20f6f496
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds generic definitions for GPIO pins for onboard LEDs and
switches to enable the basic blinky, button, and disco
Zephyr examples for the TI CC3200 LaunchXL.
Change-Id: Iac0ed2ad01285f9e84eea1fa7013771ddd8d3a78
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Leverages the configuration generated by the TI recommended PinMux
utility to enable pins for the 4 GPIO ports on the CC32xx LaunchXL
board, pre-configuring GPIOs for the onboard:
- 3 LEDs, and
- Two user push buttons (SW2, SW3).
The pinmux configuration is used in lieu of a Zephyr
pinmux driver, and is called during board initialization.
Change-Id: Id2403fc2ec3fcc0a62ee5149e1ac596e7e06ead4
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
With the appearance of the nRF52840 IC a new Preview Development Kit
(PDK) board has been introduced. This patch adds basic support for this
new board.
JIRA: ZEP-1418
Change-Id: If5845e75312ec756b968e595e5dc31c4c9624be2
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
In preparation for the new Nordic MDK and nRF52840 IC support this patch
adds the specific nRF52832 IC model in the pca10040 board default
config, so that future boards with different ICs from the same nRF52
series are supported correctly.
JIRA: ZEP-1418
Change-Id: Ic7c2076eeeb33fb729e4dbba2ff4702ab812a826
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
All pins from the existing pin init in
drivers/pinmux/k64/pinmux_board_hexiwear_k64.c were brought forward.
Jira: ZEP-1393
Change-Id: I3eb38dc435809cb7997d5884ff63bf8dd1e54720
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some pins were not brought forward from the existing pin init in
drivers/pinmux/k64/pinmux_board_frdm_64f.c because they do not appear to
be used anywhere and it increases power consumption to enable them. For
example, 6 pins were enabled as analog inputs, but there is not yet an
ADC driver for the k64. The pins that were not brought forward are:
* PTA 0-2
* PTB 2,3,9-11,23
* PTC 2-4,10,11
Jira: ZEP-1393
Change-Id: I7410f6d993bd0a4df8f80df72e84def73bcf74cc
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch updates defconfig file on V2M Beetle board in order to enable
clock_control and watchdog by default.
It defines also a dummy LED in order to maintain compliance with the
Zephyr test environment.
Jira: ZEP-1300
Change-Id: I40ae4cb19e79ff24e1e351a2185a7191f03664d1
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add board support for the Nucleo64 L476RG development board.
Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers
Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add defaults for the fxos8700 sensor, including which i2c instance, the
slave address, and interrupt pin.
Change-Id: Ib8a1e451ddfd84d2b2f19b0da846854acc969dcf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add defaults for the fxos8700 sensor, including which i2c instance, the
slave address, and interrupt pin.
Change-Id: I4b0255308fd5c9b7c43f0f22e8ce2fe86c5e7011
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch fixes the unused parameter warning found at the
Arduino 101 and Galileo pinmux code.
Change-Id: If67538e955ca1c2d12d4b8378f451bd88b4a52ff
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
I notice that many of the other boards here use 1msec for the tick.
I notice also that when switching to unified kernel, scheduling based
on time has a lot more jitter with a 5msec tick.
I think a better default is 1000 ticks per second for em_starterkit.
Change-Id: Icc93345762dbea7d71ca9f4735bcf73f75cde273
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Currently it's only possible to configure those GPIOs through
boards.<h/c> files and thus it's not relevant for board that do not
embed cc2520 but might get one wired to it, unlike
quark_se_c1000_devboard which directly embeds one cc2520.
Change-Id: I819bc1d2de707ea12eb70dc60a40b28f92666e51
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit removes the legacy Contiki based uIP stack.
The new native IP stack must be used after this commit.
The commit also removes following things:
- legacy cc2520 driver
- legacy ethernet drivers
- legacy IP stack samples
and changes these things:
- disabled tests that only work for legacy IP stack
- select new IP stack by default
- enable random number generator by default as it is needed
by the new IP stack
Change-Id: I1229f9960a4c6654e9ccc6dac14a7efb9394e45d
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add TI CC2520 driver allowing RAW access to radio interface similar
way Bluetooth user channel works. This makes possible to handle radio
channel inside external 802.15.4 stacks, for example export it over USB
and handle in Linux.
Change-Id: I61bb4c8b998ff1e47dc65427ac471f04ec8fea63
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Making sure we build cc2520 driver when native IP stack is used.
Change-Id: I25f3cb38a2da0c7a54ac4befcea217dc70b31028
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The current ARC GCC compiler used in Zephyr SDK v0.8.2 generates
incorrect code when using the "-fno-omit-frame-pointer" option. This bug
should have been fixed in the 2016.03 release of the compiler.
Jira: ZEP-1243, ZEP-1403
Change-Id: I0901f55973c1ea37491b07bf625d0d1918803f3e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If SPI 1 is selected and GPIO CS trick as well, then do not use
controller's CS but GPIO 0 instead as a CS.
Change-Id: Ifc17cdc44f47b9348f4c655d510349e3124dceea
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Make the blinky application work with this board.
Change-Id: Ibe8d310229e2ff79a2164b7c8f16e7ba3ee0b8c2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add board support for ARM V2M Beetle platform.
ARM V2M Beetle board is build around the ARM Beetle Cortex-M3
based processor.
The support has been tested in nanokernel mode with the bringup
application that will be pushed with a future patch.
Jira: ZEP-1245
Change-Id: Ib05a40c072f10149e692283177387cf2cfe32f66
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The right flag to enable GPIO as SPI CS is SPI_CS_GPIO.
Change-Id: I06fc5e7e44f9aa6bad5867462c6c069d545bb0b7
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The Quark SE C1000 BLE Core is a nRF51822-QFAA, with 16kB of RAM and
256kB of flash. The configuration is otherwise similar to the Arduino
101 BLE, except that the UART RTS pin is the same as that used by
nrf51_pca10028.
Change-Id: I88cb18876bdde65abcf9a499894f70802046c824
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The SPI_0_CS_GPIO and SPI_0_CS_GPIO_PIN values were defaulting to
something not very usable, because of which e.g. the file system
test app was having to explicitly set the right values in its sample
configuration. Having a proper defaults in the board defconfig means
this isn't needed anymore.
Change-Id: I1399914451c1616588322e25304d40d3dd1151e7
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
The UART has no hardware flow control pins.
Change-Id: I16ffeee15a1f5714c695dc8b38e77fb134ea7a0f
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Change the default Bluetooth UART device name to the UART connected to
the arduino header. This allows using the frdm_k64f with a frdm_kw40z
shield board.
Change-Id: Id22950f0a48a7c95bcddc6f1ec044f7a37cb9b72
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Change the default Bluetooth UART device name to the UART connected to
the on-board kw40.
Change-Id: I2ae981bce31a58aed4dc6d3c378fc6f6a0bec76f
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/hello_world
- samples/philosophers
- samples/drivers/uart
- samples/shell
UARTA0 is currently supported.
Change-Id: I85727c622d4d42183cc9f2f8b43d653e245dd17e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Leverages the pinmux.c file generated by the TI PinMux utility
to enable UART pins. The pinmux configuration is used in lieu of a Zephyr
pinmux driver, and is called during board initialization.
UARTA0 is currently supported.
Jira: ZEP-1109
Change-Id: Iddb01f79043af034886859b608b7b6aadf844e53
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Added Kconfig and makefiles to be able to build a Zephyr application
on Linux/gcc, and load via OpenOCD.
Validated by running the hello world, and philosophers microkernel
samples, and stepping through the code in gdb.
Jira: ZEP-1109
Change-Id: If5d3e7b1a8ecf5ecf6a00f147742b3bc5716190f
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The k64 SoC has multiple instances of many peripherals, but which
instances can actually be used depends upon the board design and pinmux
configuration.
Move all instance-specific default driver configurations from the SoC to
the boards (frdm_k64f and hexiwear_k64). Default driver selection
remains in the SoC (e.g., enable the KSDK I2C driver when I2C is
enabled).
This paves the way to support different driver defaults for the
frdm_k64f and hexiwear_k64 boards, but it does not yet change any of the
default values; it only changes where the default values get set.
Change-Id: Id9ed898762eb400ecefeac91ae4dce66da05622d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
STM32Cube uses SoC defines made to reflect HW heterogeneity that
should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f401re following define is used:
*STM32F401xE
Which means:
*Same SW could be used on STM32F401RE and STM32F401CE:
same CONFIG_SOC could be used
*Different SW should be used on STMF401RE and STM32F401RC:
different CONFIG_SOC should be used
This change focuses on stm32f4xx series.
Change-Id: I56ff4d1815d09747cf722385532eb2dcbdf37b44
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32Cube uses SoC defines made to reflect HW heterogeneity
that should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f103rb following define is used:
*STM32F103xB
Which means:
*Same SW could be used on STM32F103RB and STM32F103VB:
same CONFIG_SOC could be used
*Different SW should be used on STMF103RB and STM32F103R4:
different CONFIG_SOC should be used
This change focuses on stm32f1xx series.
Change-Id: I5ecfaa52952d04421b27b5e74fb71b4fc108b662
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
With the driver for AON GPIO available to the ARC side, the user
buttons in the board are usable by both cores.
Change-Id: Ib8e67fba1513caec2e89c31c16f7ed0458c4ed76
Signed-off-by: Iván Briano <ivan.briano@intel.com>
These options were only needed for a MyNewt-based nRF51 firmware on
these boards (the MyNewt BLE stack is called Nimble, hence the
prj_nimble.conf sample config files). With a Zephyr-based nRF51
firmware these options are no-longer needed, so it's not appropriate
to have them default to enabled. Instead, if they are needed, require
the app-specific configuration to enable them.
Change-Id: Iefbee4d97590af4e11bcedea05fe61f32a147b83
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
Change-Id: I92b543022ae6103683cc9e16b925508fb3cf7db1
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Move common config options one level up to try to simplify the per-board
defconfig
Change-Id: I3d80fa494050634d0f877af2015b01b85df20d1d
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Those defined will be used in sample applications that deal with
on-board LEDs.
Change-Id: Ia447adfd33547e01206a9fd7ceeae420ba806f31
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The BLE core on the Arduino 101 is an nRF51822 QFAA (256kB flash, 16kB
RAM).
Change-Id: Ia802b3eb634c0cd6775c4059c9569bccd915a578
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Removing options that are already set by the soc Kconfig files.
Change-Id: I603c7797a26e3afedfa5ee72fe989c614c080fe5
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
If a deprecated board is built, a warning is presented indicating
what future release the board will be removed.
Change-Id: Ib166198d8b71303b990a30f79429f51871591a97
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The value for CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC needs to be set
in the SOC, since each SOC will have a different frequency
on the EM Starterkit. The EM7D, for example, has a 30Mhz CPU clock.
It was already being defined in the SOC, but the board setting
would override the SOC.
Change-Id: I4daf3b94f15bad99c0f3c8674a15ad225aa3d274
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Introduce an architecture sorting of boards. This is to allow for
easier maintenance going forward as the number of boards grows. It
will be easier for any scripts to know the board/arch mapping without
having to maintain an explicit list of what boards are associated with
which arch. We can also do things like have architecture maintainers
cover reviews and branches for arch/${ARCH} and boards/${ARCH} going
forward.
Change-Id: I02e0a30292b31fad58fb5dfab2682ad1c5a7d5a7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The exact pin numbers for the nRF5 UART configuration is
board-specific, so the Kconfig default values should be in a
board-specific file.
Change-Id: Ibaacde292db191221e32b3626c68bf972dd26016
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add board support for the Nordic Semiconductor's nRF51822 (nRF51 series)
Development Kit.
Change-Id: Idc082c6930bdebf3726fd453fb1309df7fab3f46
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
The EM7D SOC is similar to EM11D, except it has different sized
iccm and dccm memories, and also has FIRQ with RGF_NUM_BANK==1.
To select this SOC on the board, all dip switches are in the up position.
See ZEP-966.
Change-Id: I864ffe0efdf367de0a8cd58e9c46efd7e401c671
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The hexiwear board pairs two Kinetis SoCs - k64 and kw40. The k64
already has SoC support in Zephyr, therefore we are adding support for
another board for the same SoC. Note, however, that hexiwear uses a
different SoC package than the Freedom board and therefore has a
different part number and pinout.
The second SoC on the hexiwear board, kw40, runs a BLE controller stack
with HCI; it does not run Zephyr (yet).
Jira: ZEP-716
Change-Id: I206f6ef58010d13075a00432040894392117e3ce
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Using AON for GPIO kconfigs is very specifc to quark se, there
is no need to make this special for this platform. Use the
existing scheme instead.
Change-Id: I946431490380dc0f537d6056277a94c9c9c80fed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Exposes the SPI 1 pins by default in the pinmux
only if the SPI 1 device is enabled in the Arduino 101 board.
Change-Id: I9a8ad0942bb1de7130013931e86144139f78c90e
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
Add PTB22, PTE26, and PTB21 to the frdm_k64f pinmux table, and helper
macros to board.h to map them to red, green, and blue LEDs respectively.
Change-Id: I257621467e71dfd9bdc5d97d6da444dfb5c58b2b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add PTC6 and PTA4 to the frdm_k64f pinmux table, and helper macros in
board.h to map them to SW2 and SW3 respectively.
Change-Id: Ia30df9015d6d3c09131b4fbb2f2009ee745f7268
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Point to a new wiki page for the documentation. The old page can be removed
once this patch is committed.
Change-Id: I2b031bfffe10ec24c41c58d0754f2b14d95f5e53
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
restoring of the original firmware is now possible using the
flashpack utility.
Change-Id: I32df4b5bb63fb5f6a318026e9f89b1504bd37f5e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board is not being used or tested and does not actually
run on any hardware, remove it in favor of well supported boards
for this CPU.
Jira: ZEP-850
Change-Id: I01c825c7eb44d6c321f2ffb88e8899da528921dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board is not being used or tested and does not actually
run on any hardware, remove it in favor of well supported boards
for this CPU.
Jira: ZEP-850
Change-Id: Ied681b6059ad74f9d019054292c919a9f938e7d3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Arduino 101 comes with a bootloader that supports DFU
and flashing of all cores using the dfu-util package.
This changes the memory layout of the image built for the
Arduino 101 and remove previous work-arounds to allow booting,
including the version-header section in the linker script.
The bootloader expects the text section at +0x30 from the physical
load address and thus requires special treatment in the linker
script.
Other changes by Andrew Boie:
The flash size parameters were both wrong. X86 side has 192K
of flash from 0x4003000 - 0x40060000, the entire span of
sys_flash1.
ARC side is now the span from 0x40010000 - 0x40030000, 128K.
Change-Id: Iecfa5d2b84a3f522d9eca06268d6b8b71a094aaa
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quark D2000 and SE based boards (but Arduino 101) use QMSI bootloader
by default. QMSI bootloader sets up GDT in the so-called 'basic flat
model' just like Zephyr does by default.
This patch changes Quark D2000 and SE boards default configuration
so they rely on QMSI bootloader and we don't sets up GDT twice.
Change-Id: Ic6e520148b732bd48c00657c6c8138a8d865faef
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Enable the new BLE controller by default in nRF52's Nitrogen board.
Change-Id: I1692fc8853c1971c22a6a62e052d6f04b881ffca
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Enable the new BLE controller by default in Nordic's nRF52 DK
(Development Kit) board.
Jira: ZEP-702
Origin: Original
Change-Id: I578d582536186e326c81f9274faa2c0f1ae851ff
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Treat the sensor subsystem as an independent board that can send
messages to UART and disable IPM and the messaging interface. IPM
can be enabled by applications that require such interface.
Fix all samples that are affected by this change to make sanitycheck
pass.
Jira: ZEP-451
Change-Id: I3df6af16adefaefec02b97778d6c68ffc920ac35
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Many Kinetis SoCs contain an Oscillator (OSC) module and a Multipurpose
Clock Generator (MCG) module to configure clocks. Adding options to
configure these modules for PLL operation with different external
oscillator frequencies, which can vary across boards. More options may
be added later to support other clocking modes such as FLL.
Jira: ZEP-715
Change-Id: Ia121cc5b464d7e681883507bd756d331a8abd6ef
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This will lead to conflicts and warning coming from Kconfig, so just
whitelist the board in the samples where this hardware is supported
Jira: ZEP-739
Change-Id: I4a2f3bdcfdb44fc75df0e272c237789ee16e0de1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Kconfig allows selecting NETWORKING_WITH_15_4_TI_CC2520 even if the
current board doesn't support it, and also selects it by default. This
breaks building the 15.4 sample with qemu_x86. Add a config option for
having CC2520 support and enable the choise only if it is available.
In addition, remove unused function from iee802154 code, as it now
fails the tests.
Jira: ZEP-697
Change-Id: Ib082f82acdd0f86d3306bbd3bb827f61b0fd0be1
Signed-off-by: Jaakko Hannikainen <jaakko.hannikainen@intel.com>
Contains an nRF52832 as the main SoC and a LPC11U35 that provides onboard
debugging capabilities and a USB-ISP interface.
Change-Id: Ie6457cc5586bda9bbc0c073f96d23cc2205332c5
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Flashing issues have been resolved. The build system support for
flashing and debugging has been changed back to UFM scenario.
XIP and reset vector no longer disabled. Wiki documentation updated.
Change-Id: Iffe326485c20808dabc1e19e0b18b7b60a83d797
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is not needed anyore since we don't have a binary rom available.
Change-Id: I35b1488753857a887b1fd2b011660a9d7734cc5a
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
There is no code in the board file so remove it.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I200a39970bba851e238d4c52070cc9e0ea362782
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no code in the board file so remove it.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I4e3d520a7a23b3ce853c4784e3a6401e824f25fc
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no code in the board file so remove it.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: If690a5b0758e7bf430e21a3c8b8fbe4d0bcb022c
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I6e5ce35bd7b9b4411820bc112a08dd0d809495d6
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I742bc695e8a1efb34003e651f57c8aba4fb798f6
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I54e94ff2cc2d2bfbfb8a016ae49b4b4d13f25dd2
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: Ifa824af1c5c7566ab1379b467cb9bef50f887729
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I1ed09f05ea2c2d08d11fc742d76f32c1f8f2fbbd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I71892fd950f422d77cb28c2a9fb5391ca151ff34
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: Ia29cbf53670e254202c3d8916a28a1ba2254107c
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I28f3ccc6e6c7c20c679fd0e4ab36aaa8b1e72d75
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I2e824e1baf582517e713cabe1850c9accd509a5a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I891f5130f5bfd7a07b644ee0223b18fd86061cfa
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_UART_NS16550_ACCESS_MMIO doesn't exist anywhere so remove it from
the defconfig.
Change-Id: I221cbb4a9fe5c4ee567e994f2c617b50b1228d13
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_SPI_INTEL_LEVEL_LOW doesn't exist anywhere so remove it from the
defconfig.
Change-Id: I5241101a1b4b2f74aaac3a59721e65f71f88cdfd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: Ia55a2614d3eea1920f1be7880be2bf82c6c3c7db
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For Arduino 101, users must use the original ROM FW provided for this
board. For Quark SE development boards (!Arduino 101), users should use
the QMSI bootloader.
Here we remove the old ROM binary we were shipping with Zephyr as these
are now provided as part of QMSI releases on github.
The arduino_101_load.sh script was also updated to avoid trying this
step since the binary is no longer available.
Change-Id: I822a9d005355cb69177bb1a1d0ddef087ea07309
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
CONFIG_UART_CONSOLE_BAUDRATE doesn't exist and we will get the buad rate
setup from the UART_STELLARIS config defaulting to 115200
Change-Id: I268051055689134c54c92f696a9a560ca5336844
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use Kconfig symbol CONFIG_SOC_NIOS2_QEMU instead of CONFIG_SOC_NIOS2F_QEMU
Change-Id: Ia04666830dc9d6f64467fae103418920c202af27
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is at the expense of code size. The QEMU and MAX10
targets have plenty of space so enable it for these boards,
but leave off by default for others.
Change-Id: I93fdb7db14232727e9953b22490d8869ff3b60e7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The 16550 will now be the default console device.
Change-Id: I92a6b49984b055e7d5f5c97e5192150be0d5c5c7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For both of these, we send the .elf binary over the JTAG and it gets
written directly into SRAM. The CPU boots the image from the entry
point (__start).
This does not provision the kernel onto device's User Flash Memory
(UFM). Implementation of this is still in progress see ZEP-273.
Change-Id: Iae8188a21e4a3eecfda0f4f0bb220c0607d719cb
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Remove unused defines and turn off debug options.
Change-Id: I21e6b54a81505783396991e165a8087372d4986b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
USB Device core layer is a hardware independent interface between USB
device controller driver and USB device class drivers or customer
applications. It's a port of the LPCUSB device stack.
Change-Id: I9371ffab7034d20953fec0525e72fbe9e094c931
Signed-off-by: Adrian Bradianu <adrian.bradianu@windriver.com>
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
The .elf files sent to QEMU boot from __start, the reset vector
is completely ignored.
Change-Id: Ib436547bcb1c0154b5c23638dfdaf59627b109ea
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Attached PCs can read these messages with the 'nios2-terminal'
application.
Change-Id: I44942c8feaf3901adb410269460787cf2a8b6a4a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Useful at this stage of the bring-up. Stack memory will be initialized
with 0xaa and we build with -O0.
Change-Id: Icd0e9ac49c0158f7b18e4e286a07ca281d20e7e6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Has extra debug capabilities and the board has sufficient space
for it.
Change-Id: I638c665e766f1a41dc5db89fcf8b8c0d44912789
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Use a kbuild trick to force built-in.o to get built even if there isn't
any code so we can link properly. This is cleaner than keeping around
files that don't do anything.
We keep around board.h for now since drivers and other code might expect
it to exist.
Change-Id: I0fb1105f19149b0e17c45455368ddf0ef75e5165
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The KSDK device header files require a preprocessor macro that defines
the part number string (e.g., MK64FN1M0VMD12). Create a hidden Kconfig
option to hold the part number string, and hidden Kconfig options that
the board Kconfig will use to select the specific part number.
Change-Id: I612e785026261e425b47b5b7fae0c65b4f94b30b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For the moment, NIOS2_CPU_SOF must be set with the path to the
CPU configuration. We are checking with Altera on whether we
can directly check in the binary to the source tree.
These scripts depend on tools provided by the Altera Quartus
Prime Lite Edition. This is available for free but requires
registration on Altera's website to obtain.
Change-Id: Ia6cb6c9e43c3e141807a887cb25c47b370a7d8e9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
I see in the TOP makefile that if FLASH_SCRIPT is undefined,
it outputs the message "Flashing not supported with this board".
This behavior is wanted currently as this board does not
have a memory mapped FLASH device. It has a SPI-FLASH and
there are different instructions for putting an image on to the board.
Change-Id: I07dcdd9a7fd8346b846ee0fe1312d22f9ffaa13e
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Do not redefine the the pinmux configuration for the board, just use
the data directly. No other board will be using those, just the galileo.
Change-Id: If774bc5c4335021ae58a682224f092db23bc9f1b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move pinmux defintions under board/<board> and have all board
configuration in one single place.
Change-Id: I055b024384fae2938881b1c57d8ce7426e732e92
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
the flow control and baudrate configuration is for BLE, so
make this dependent on BLE being configured.
Change-Id: I35f8e00ac31658fb1ad4a2751169c076f1e78532
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Board support for the ARC EM Starter Kit provides for a board
that can select one of two SOCs. The EM9D and EM11D commits
will be done separately to expidite review. Also submitted here
is doc/board/em_starterkit.rst to explain details about this
Zephyr board choice.
Change-Id: Icd9fac045c700ad8dcb95161fdd63c130f665778
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: I1776178ad6fb984d6e293dbfa8bb1d718e4c2566
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixed openocd configuration to accommodate new releases of the hardware
Change-Id: Ic87193c3980f4caf2fec1fdcf79d8bd30dbf4f8c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the same Kconfig infrastructure and options for all SPI drivers.
Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update openocd configuration file allowing to flash with make
flash for the majority of boards. Old versions still might be flashed
with zflash. This also helps debugging boards.
Change-Id: Ie9701c09e1806e0c4de39f95bd34bce9f66051cc
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.
This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.
Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The factory defconfigs should be used to generate images
compatible with the factory settings and the bootloader that
comes with the Arduino 101.
When using those images, you will be able to keep the original
bootloader and flash the images using dfu-utils and there will
be no need for a JTAG adapter.
Jira: ZEP-219
Change-Id: I34b5e9ef73314f46b31086a772d94d3ddcc6c436
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
To boot zephyr on the Arduino 101 running the original bootloader
which supports DFU, set the following in your application configuration
file:
CONFIG_SS_RESET_VECTOR=0x40034000
CONFIG_PHYS_LOAD_ADDR=0x40010000
CONFIG_VERSION_HEADER=y
Jira: ZEP-219
Change-Id: Ia015a7b6fce888b49ed22c558de992132d4713ea
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enabling individual I2C controller is done in the SoC kconfig defaults.
There is no need to do that in the board defaults.
Change-Id: I45a62d8bc96a5f42b3fd613f5890bcdf04c92032
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.
Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adding an openocd.cfg to control flashing of the Nucleo-F103RB board
Change-Id: Ia730244bdc2d31d074fe72c41d3e58e7830c8df0
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On current Curie-based boards UART 0 is wired to the nRF51 BLE
controller and requires HW flow control to be enabled in order to
function. This patch restores the same behavior that was present
before the "qmsi: uart: use built-in qmsi driver" patch.
Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Do not have priority per IP, use one config instead.
Change-Id: Ieb2923d4749a294e2a1c677d47d56a14cee3f36d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.
The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").
For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).
Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This UART config is needed to handle properly btp tester serial data
flow.
Change-Id: Id013a232e105247414d44148f5ccfe708b19c4a8
Signed-off-by: Grzegorz Kolodziejczyk <grzegorz.kolodziejczyk@tieto.com>
Change NBLE_UART_ON_DEV_NAME to BLUETOOTH_UART_ON_DEV_NAME for H:4
Change-Id: I4391b32c75c738478c964d4c79f6eb80d737b043
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable Power Management handling also for quark_se_devboard with
nimble HCI stack.
Change-Id: I6e5bb85c4f2370f52904be9dff14ce8e7fb1eb44
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable Power Management and enable logic for quark_se_devboard,
without the patch BLE Radio module might be enabled with JTAG tools
or right after boot.
Note that some boards do not have the GPIO pins connected to BLE
module but this should be still OK wrt to board functionality.
Change-Id: I9019e406afa36fe2dea52c07075c947e8c50a961
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add configuration for OLIMEXINO_STM32 board.
By default, the UART console is forwarded to USART1 available on
UEXT connector. All GPIO ports available on the connecot headers
are enabled.
Change-Id: I60b3ff20ea60b5294a3a6c31f4dba0802794f9d8
Origin: Based on nucleo_f103rb board
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some controllers will emit an initial "NOP" Command Complete event
during initialization and expect the host to only send commands once
this event has been received. This patch adds a new Kconfig option to
be used in the case of such controllers and defaults this to true on
Arduino 101 with the H:4 driver where this behavior is currently
observed.
Change-Id: I440f14a7c07ac27545febf9f85ebcc343e2a4558
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.
Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.
Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
GPIO is not needed for quark_se_devboard for now when dealing with
NBLE.
Change-Id: I0dedf2bee0af153e1d6e224d90f4662f5601b2b7
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
GPIO would be selected by BLUETOOTH_NRF51_PM
Change-Id: I5d920723a46c1455d34c90c9dc43b21b91569ce1
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Currently there's no support for the H:5 driver on Arduino 101, so the
defaults set in defconfig should only be limited to the H:4 UART
driver.
Change-Id: I805d81c33701d179ffe26f4aed3fe2fb70d60d7b
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
If an external PCIe card inserted into Galileo board, the
devices I/O addresses may differ from the preconfigured ones.
For this reason PCI enumeration needs to be enabled.
Change-Id: I54b5ef9149f9eda0a390909a433b0e13a3dd7ecd
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
When choosing Bluetooth UART driver on arduino_101 select also
BLUETOOTH_NRF51_PM which enables the Nordic chip.
Change-Id: I22dcb60a676bb0e4cdfe995590803dbfbf87f23a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
To avoid explicitly having to state this in every application's config
file simply set the defaults to the sanest values.
Change-Id: I2c2bbd2424a12ec9a36bbd6d0c9cd9a1d259e5e5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This is a complete new cc2520 driver for zephyr. Intention is to fit
better within Zephyr device driver model.
- It's (almost*) ready to be instanciated as many times as necessary
- It's fully interrupt based on SFD and FIFOP (no pin polling)
- It's nicer to other sub-systems (it sleeps, no busy-wait loop)
- It still loosely complies to old legacy radio device driver model
*: GPIO API needs to be fixed in order to accept multiple callbacks, as
well as enabling callbacks to retrieve private data.
Notes:
- Hardware filtering does not work yet as the net stack, above, needs to
provide the relevant information for it (src/dst ieee802154 extended
addresses, short addresses...)
- A embryo of generic functions (txpower, channel, addresses...)
have been implemented but don't belong yet to any radio device driver
model. Such new driver model will come afterwards (soon?)
- SPI API would need to be improved to avoid as much as possible memcpy
as well as spi_slave_select() call.
Change-Id: I1fd6dfff28fba3984f6006d394ea12f1e763ac18
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
UART0 is connected to Nordic BLE chip, copy the configuration from
arduino_101 where there is the same chip.
Change-Id: Ic9fe30f4562d261920c0cfd359ea34be4e7e2476
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable GPIO and select UART0 for Nordic BLE chip.
Change-Id: Ic1bf82a8b97fcc231eb857ee0bd05381a24a2d25
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Set the target to ARC to speed up flashing. the difference:
before
downloaded 27320 bytes in 50.685825s (0.526 KiB/s)
after
downloaded 27320 bytes in 3.396626s (7.855 KiB/s)
Change-Id: I53ca26f97eefd40e869662b137f5a659082aa478
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
SPI flash depends on SPI. Enable the SPI flash driver only when
SPI is enabled.
Change-Id: I902588b806a4a5773fddb58a7567a8e0d4ba9fe0
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On Galileo Gen2 board SPI uses GPIO pin for CS.
Thus spi_intel driver must be initialized after gpio_dw,
so it's init level must be more that gpio_dw's one.
Change-Id: If2e5fb1106afe01e5567cf3fe72063bdc94ad3d2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Remove those kconfig options that are SoC specific, and should not be
configurable via kconfig.
Change-Id: Ia62888838877da4627419bd36c261d5254761acd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
These interrupt settings are SOC specific. So, move them to the
SOC level of Kconfig.
As IRQ priority is fixed in D2000, changed the value to 0 to
make it consistent with what other shim drivers are using.
Change-Id: Id20bed46c478a7555ae976e3a3063ba2cb099788
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This will improve the speed when flashing an image to the board:
before:
downloaded 4936 bytes in 7.982860s (0.604 KiB/s)
after:
downloaded 4936 bytes in 4.486743s (1.074 KiB/s)
Change-Id: I0209d53ba15dbf8e3f16e2d3675a35b58342776a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.
The default is to be triggered on rising edge, just as the same
old kconfig did.
Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This file was misplaced here. Atom board is now available only
for minnowboard.
Change-Id: If5a0d723600f957e2b024848b8cb8aac2e7a7ff9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver doesn't provide any API, it only initializes the pinmux
controller to appropriate values depending on the board.
The first board to use this new infrastructure is the Arduino 101 board,
because it is alphabetically the first.
To better organize code for the different SoCs and boards, a "family"
level is created in the 'drivers/pinmux' directory. The Arduino 101
board is part of the Quark MCU "family".
The PINMUX_DEV configuration (and functionality) is removed for now, it
will be added back when the pinmux_dev drivers are (re)introduced, with
clearer semantics.
Change-Id: Idf5cc3caf6be620aa50828ae8fdc535df6caf458
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Enable 72MHz SYSCLK by default. The board does not have an on-board
quartz, however the STLink frontend produces a 8MHz clock signal that we
can use. Since the clock signal is not coming from an oscillator, HSE
bypass must be enabled. Make sure not to exceed 36MHz clock on APB1 bus.
Change-Id: I6b0b499a1cc4b0deccbfa374fc9ca3e3e8cc38c5
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Enable 72MHz SYSCLK by default. We use the fact that there is an
on-board 8MHz quartz oscillator available as HSE clock signal. Make sure
not to exceed 36MHz clock limit on APB1.
Change-Id: I9ebc2144910253e68cd8a9b078884852f01c2cab
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Before moving pinmux related code to 'drivers/pinmux' fix their return
codes to be consistent with the rest of the API.
Change-Id: Ie84f64e93745d44bef8b9d2119f6a05cdc8cb8c4
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Add configuration for Nucleo-64 F103RB board. By default, the UART
console is forwarded to USART2, available on STLink V2-1 USB
connector. All GPIO ports available on the connecot headers are
enabled.
Change-Id: I266170d1288ef27f668410c5737c46cdf716e137
Origin: Original
Signed-off-by: Maciek Borzecki <maciek.borzecki@gmail.com>
Introduce configuration for STM32 MINI A15 embedded development
board. The board has a STM32F103VET6 MCU on board. The MCU has 64KB of
SRAM and 512KB of flash.
The board has the following peripherals:
- RS232 port on DB9 connector, connecting to USART1, pin mapping:
- PA9-US1-TX
- PA10-US1-RX
- a LED diode (U2) connected to pin PB5
- micro SD card connector with pin mapping:
- PC8-SDIO-D0
- PC9-SDIO-D1
- PC10-SDIO-D2
- PC11-SDIO-D3
- PC12-SDIO-CK
- PD2-SDIO-CMD
- on board SPI flash AT45DB161D-SU, pin mapping;
- PA4-SPI1-NSS
- PA5-SPI1-SCK
- PA6-SPI1-MISO
- PA7-SPI1-MOSI
- button (K1), connecting PB15 to GND
- 40-pin header connector XS5
Change-Id: Ia378b105abb25fb589a100185ea96512a5f98cf3
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Quark AON counter and timer sub-drivers. They are based
on the QMSI drivers.
In order to enable this driver, the following options
must be set.
CONFIG_QMSI_DRIVERS
CONFIG_QMSI_INSTALL_PATH
CONFIG_COUNTER
Origin: Original
Change-Id: Idbeabfaef3408f4d645b0e64a337d7f5f0f357c7
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
All driver APIs (i2c, spi, gpio, etc.) return 'int' type, but pinmux
APIs. So this patch changes the returning type from 'uint32_t' to
'int' from include/pinmux.h and fixes all pinmux drivers according.
Besides keeping consistency between all drivers APIs, this patch is
also applicable for the errno.h code transition. Pinmux drivers will
return negative errno.h codes so returning 'int' is more suitable
than 'uint32_t'.
Change-Id: I2a6e92d567a0e21fec363226da6197df94657d4b
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This adds a menu to enclose all board Kconfig. So the board
configs do not appear on the top level out of context in
menuconfig. This also reflects the SoC options where these are
under menus for each architecture.
Change-Id: I76ce2bf1acf7cbd2673ceb2eac71e96cdca2ff35
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This makes the board selection dependent on SoC selection. For example,
select Atmel SAM3 will only allow "Arduino Due" as board selection.
This disallows incompatible SoC/board combination, like K64F with
Arduino Due.
JIRA: ZEP-106
Change-Id: I675961cf33db5a0058fc68f14c8f16978f9c6b95
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This board is now part of qemu_x86 and shares the same file except
the configuration which makes it build with IAMCU.
JIRA: ZEP-103
Change-Id: I9a9911d013b493240c089ce71e9f95687dcc02a3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Making pinmux depend on GPIO breaks many tests and configurations
when running on real hardware. This should be added as local
configuration in the defconfig instead.
Change-Id: Ibbf1c9a3428ed692937383bf85218b0c120cbe44
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
CONFIG_HPET_TIMER_LEVEL_LOW and CONFIG_HPET_TIMER_RISING_EDGE are
selected from same choice option so cannot be both selected.
Since HPET_TIMER_FALLING_EDGE is the default only options overriding
this were left in defconfig files.
Fix following:
Merging prj_x86.conf
.config:10:warning: override: HPET_TIMER_RISING_EDGE changes choice
state
Change-Id: I5c88d2c0ae309afa11d9fae116235a8a424a2408
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Many bugs that have taken months to tease out could have been
instantly exposed had we run all our sanity checks on this
ABI.
Origin: Original code or copied from boards/qemu_x86
Change-Id: I6a5038bf99379470c3f736857d104024d3fc7978
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The pinmux API was modified to expand the meaning of the 'func' argument
to allow it to represent more than a pre-configured function. This was done
to reasonably accommodate a larger range of pin configuration options
offered by other MCUs, such as the Freescale K64 (up to 8 pin functions,
plus interrupt, pullup/down, drive strength, open-drain, slew rate, etc.).
This allows bit fields to be used to define various settings.
Change-Id: I2b216b822c6bae7133eed01c8c3339bb47b6c5db
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
In the pinmux_dev driver for the Quark SE development board in
pinmux_dev_set() the variable 'mode' was used, but it should have been
'func'. This was causing a compilation error:
/home/vinicius/work/zephyr/boards/quark_se_devboard/pinmux.c:
In function 'pinmux_dev_set':
/home/vinicius/work/zephyr/boards/quark_se_devboard/pinmux.c:245:23:
error: 'mode' undeclared (first use in this function)
uint32_t mode_mask = mode << (pin_no << 1);
Change-Id: I5b9df7c6b488dc5b8819fcf59bb3b994d9d4820b
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Enable support for WinBond W25QXXDV SPI flash on
arduino 101 platform.
Change-Id: Ia4dc73f956f79c6a56a31bc3dfca4e5298447742
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The peripherals utilizing UART were required to register their own
ISR rountines. This means that all those peripherals drivers need
to know which IRQ line is attached to a UART controller, and all
the other config values required to register a ISR. This causes
scalibility issue as every board and peripherals have to define
those values.
Another reason for this patch is to support virtual serial ports.
Virtual serial ports do not have physical interrupt lines to
attach, and thus would not work.
This patch adds a simple callback mechanism, which calls a function
when UART interrupts are triggered. The low level plumbing still needs
to be done by the peripheral drivers, as these drivers may need to
access low level capability of UART to function correctly. This simply
moves the interrupt setup into the UART drivers themselves. By doing
this, the peripheral drivers do not need to know all the config values
to properly setup the interrupts and attaching the ISR. One drawback
is that this adds to the interrupt latency.
Note that this patch breaks backward compatibility in terms of
setting up interrupt for UART controller. How to use UART is still
the same.
This also addresses the following issues:
() UART driver for Atmel SAM3 currently does not support interrupts.
So remove the code from vector table. This will be updated when
there is interrupt support for the driver.
() Corrected some config options for Stellaris UART driver.
This was tested with samples/shell on Arduino 101, and on QEMU
(Cortex-M3 and x86).
Origin: original code
Change-Id: Ib4593d8ccd711f4e97d388c7293205d213be1aec
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
That implementation is not galileo-specific, but rather a generic way of
rebooting an x86 target. Needs SoC support.
Change-Id: I9c3374a8ab57a624d9d9b7090260c5b11fe4e773
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
CC2520 can handle up to 8Mhz SPI SCLK frequency, thus let's use it. It
will help to avoid timing issuse while transmitting and receiving (i.e.:
getting registers or buffers from CC2520 through SPI will be fast and
won't impede RX/TX events too much).
Change-Id: I3391993e25ffbe166028923b9afb777a8451a35e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Base address registers and IRQs are set in Kconfig.
Set proper SPI default to various quark_se_ss based boards.
Change-Id: Iadaae551f441457bef334f94f68cafa7c3e499d0
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Quark SE development board provides an ARC core and thus requires a
board definition so developpers can flash this core as well.
Change-Id: I3612e3b0c4d7085af4fcf3fa1f6233849a05c8b4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This board is not supported and not available for general public.
Use the Quark SE CRB/Devboard instead.
Change-Id: Id0f8c08bbacb812ef00fe9502b4acecf4f31ffd7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There can only be one instance of an ADC, but we have code setup for
multiple.
Change-Id: I94eae2450bdc6b138ebad66f80a7c451cefe32a9
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
The radio driver was using DW spi and gpio drivers hardcoded.
Now it will check if SPI_DW or SPI_QMSI is set.
Change-Id: I4e12ef7c071058218c1cc714c62fed90a9f5eb06
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Using level will just flood the handler, as the concerned gpio pins
stays on level for some time.
Change-Id: I991d818783170b09c326350c04bb588c7324892c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fixing the flash script so that we only have one for the process of writing
out the ROM and the OS images.
Change-Id: I6fc8bd8eee553a17c0036da3ce5b89510f3b57d8
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
- Use interface script from openocd distribution
- add debug support
Change-Id: If7e0ab0ad1fc6e67ca648a0a7c32356b3db90cf0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
First pass at a script/process that an end user can run to backup and restore
the binary state of an Arduino 101 system.
Change-Id: I5979bdea5aaa2a77b0e0bb0e44de65ba74cbfd65
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
As the UART uses I/O port access, it needs to be pointed out
to override default MMIO setting.
Change-Id: Ibf923b5cab547f9eec991900c5f7a8b2ffbc3832
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Add tester support for arduino_101 board reusing UART1.
Change-Id: Ifc00f92a80accffc37fd9b09df798ff995340a1c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Using the latest SDK (0.7.2) you can flash directly using make
by specifying the board, for example
make BOARD=arduino_101 flash
This will build and flash the generated binary to the board.
Change-Id: I90254abd69874efbb449ef318079958980c23074
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds the pinmux driver for use with Arduino Due.
The default for pinmux (mostly) reflects the pin layout
on the board.
Change-Id: I80827ee8bc507567e0cc04b3c8c48580aadf2b3f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move BLE configuration to board and enable GPIO for NBLE.
Change-Id: I99c309656430936edf6766fc99fe83b011801bb4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Set options and baud rate to communicate with NBLE chip.
Change-Id: I338aad3b1dc03b809aade29eedac7093ea346a5e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
SPI needs to get its interrupt configured as triggering on level high to
work properly. This is specific to Quark SE (thus x86 core).
Change-Id: If3921240709e0fbf5b26e2325f67eb977a9fac10
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
These are the default ones for the internal CC2520 chip found on the
Quark SE SS devboard. GPIO 11 is used to emulate CS.
Change-Id: Ibc564176f1f77edeb7f25df3567de8c334703795
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SPI, to control the CC2520 chip, is the only generic feature and thus
the only one configurable through Kconfig. GPIO on the other end depends
a lot on the SoC/Board. Adding a slave select option as well.
Change-Id: I63068fab476ed8d5b26103e4ad20e5be253c9932
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Support for running cc2520 radio found on Quark SE devboard.
Change-Id: Ib0781489e3ebae8569a13c35d3fe6a6d87ac9a3b
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds very basic support for running on Arduino Due.
Only the nanokernel hello_world has been tested.
Change-Id: I42b83d7f23ff88f709d2d6f2d43c6d29c82b9d32
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Ben Walsh identified a few functions can be removed as they provide
duplicate code except for one small variant (register number). Making
a common function that takes the register position as an input, it is
possible to remove an entire function, saving on code space.
Change-Id: I1850f461ed6d85f42aaf85745e1c2557850cdbad
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
It's basically the same pinmuxer as in CTB with different external
sensors wired to it.
Change-Id: Icea89a72b805d6dd2c5798c3f517c4fb00c819c9
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The production version is slightly different than the internal
development board, so the pin mux description has been updated.
Change-Id: I0235ed9eb480a1fd713843dd1b3b5c7856e7132b
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Shorten the name and remove the vendor prefix. No need to add
vendor to board names.
Change-Id: I68d441121c4034276706da63d7e5420ddf317149
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Both WIFI_DISABLE_N & PCIE_RESET_N are output pins which control the
mini-PCIe, so fix the pinmux settings accordingly.
In addition, to avoid resetting the mini-PCIe card, keep PCIE_RESET_N
high.
Change-Id: I7478a7ee5771d8840c53ec4e9cc15551d31653e3
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Static function was declared after it was used.
Change-Id: I7872d9aedef34d0e1e68e6475bea8afcd0496f69
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This is a generic Atom configuration that can be inherited by boards
with Atom SoC like the minnowboard.
Change-Id: I06ab999062be7811d14755fd34440dee8f8b81ed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
No need for the same SoC configuration with different names. Use IA32
as the "SoC" for qemu_x86 "boards".
Change-Id: Iee00538701c5ece14d0c3df637b0aaa54790f0e2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use a real board name that can run this kernel instead of a generic
name. Basic functionality exits on this board with Zephyr.
Setup of the board is mostly similar to what we have in galileo (EFI
based)
Change-Id: Ic8554f26dcac0dbbbb6d35d863482f6207dc63c5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Previous it was renamed in favor of Qemu, now that we have board support
we move this to the original name and derive a qemu board out of the
platform.
Change-Id: Ia8769b27defa0a39503ecf2e6ec7fc6304b6ff49
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit also renames boards and makes naming consistent between
board name and defconfig files.
quark_d2000_reference -> quark_d2000_crb
quark_se_test_sss -> quark_se_sss_ctb
quark_se_test -> quark_se_ctb
Change-Id: Ibe6a5102edb987fe1d6ce32c8c392a87d45d6951
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We had one pinmux per platform with support for multiple boards.
This moves pinmuxing to boards as first step. Common functions that
are exposed by the API need to be moved to driver while keeping the
muxing configuration with the boards.
Change-Id: I2b4fabf663db98d644abcb5d51ba83adc6f74541
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Galileo pinmux configuration and reboot code belong into
the board and not the SoC.
Change-Id: If862178569438a8901902088bd085275416c25ef
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Define boards based on platforms/SoCs and define them under boards/.
Also unify the naming of all platform, SoC and board files and use
platform.h for platforms and board.h for boards.
Change-Id: Icfeb96479ab5800aca98c80a79bdc3cecd645314
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Galileo board is based on the X1000 SoC, so move galileo to
boards and create this SoC instead, inheriting all SoC related code
and configuration items.
Change-Id: I9b39f1b44644775ee48acae284b82bae7876fffb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
First step for adding the new board layer. Create configurations for the
various boards we support on x86 under boards with the new Kconfig variables
defining them.
The board selection is optional, that means you will be able to run
make menuconfig
and create your own .config and select any SoC.
Change-Id: If08e88e9675d13f0f0501ef6750b9424b15f5dc8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>