bt_conn_lookup shall work both with identity address or initial
destination address as bt_conn may change the destination address with
the identity address.
Change-Id: Ibdd19ec453c3307eb6db188196b7e57a2260b526
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
There's now snprintk available that's more light-weight on the stack
than snprintf.
Change-Id: I6b3e4409703ca92fe6b8f4146ff47c490ab826cb
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Applications may want finer control of the NRPA used for
non-connectable beacons, and provide it up-front rather than letting
the stack generate one.
Change-Id: I84d459372cc85ed09a8f9cde16dbb9b98dec2a43
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Expose helpers in hci.h for setting and getting the LE random address
type.
Change-Id: I7c6437051f0b2d1f5f79e19b2616bb643ae6300b
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
To guarantee that the compiler does not reorder the execution of
irq_lock() with preceding operations, a volatile qualifier is
placed before the declaration of the ticks variable, which then
ensures that irq_lock() is executed after the tick calculation but
before accessing the ready and timeout queues.
Without the volatile keyword interrupts will be disabled during the
calculation of the ticks, which increases interrupt latency
significantly.
Change-Id: I2da82a1282e344f3b8d69e9457b36a4cb1d9ec18
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The SYS_LOG macros now map to printk by default, and printk doesn't
(currently) support %2.2x, rather %02x needs to be used instead (it
gives the same result).
Change-Id: I0f7a5b7da91afba0c970bce7e2680de40c917bd3
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Having the logging macros arbitrarily mapping to printk or printf
based on selected Kconfig options that the app isn't necessarily aware
of can have unexpeced (bad) side effects. In particular, printf
consumes *a lot* more stack (closer to 512 bytes) than printk, so
enabling a seemingly innocent CONFIG_STDOUT_CONSOLE option could lead
to stack overflows that are hard to debug.
Jira: ZEP-1419
Change-Id: I5fd77a7ed402e9ca67af23857e0f886f96d243bc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Fix compilation issues that show up if SYS_LOG is mapped to printk
instead of printf. Unlike printf, printk is annotated so that the
compiler catches incorrect format specifiers passed to it.
Change-Id: I4d6f635a0ed61de698727028ea8767dc0ef28bb1
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Fix compilation issues that show up if SYS_LOG is mapped to printk
instead of printf. Unlike printf, printk is annotated so that the
compiler catches incorrect format specifiers passed to it.
Change-Id: Iab7cc6da110e9c98720211a6f773dcf055a3a411
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Provide PWM driver for STM32 series F1/F4/L4.
Driver is ported on STM32Cube HAL and should support other STM32
series with minor updates.
Configuration is done so that PWM sample driver could be run on
all nucleo boards supporting PWM driver.
Change-Id: I6522a565451085df932e0eefd8404268380b5bfe
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following pinmux update for PWM support,
update soc to support this new configuration.
Change-Id: I1126e347ab1ab6b2d830993e548de8f32fa2f8f9
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add pin config for PWM support on ST Nucleo boards
Following config is chosen:
-PA0/PWM2_CH1 for F401RE and L476RG
-PA8/PWM1_CH2 for F103RB
Change-Id: I013e15ed35360d7777bb24ff94e0830f913a6580
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch adds Beetle to the Watchdog test case.
Jira: ZEP-1300
Change-Id: I371ca2f89aaec8e07f45cfa04fc2618d009cf487
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch updates defconfig file on V2M Beetle board in order to enable
clock_control and watchdog by default.
It defines also a dummy LED in order to maintain compliance with the
Zephyr test environment.
Jira: ZEP-1300
Change-Id: I40ae4cb19e79ff24e1e351a2185a7191f03664d1
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds Timer 0 and 1 to be used as counters.
Jira: ZEP-1300
Change-Id: I9d8b971d8a3d76eee2f9cc4600e95729d67717a3
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add driver for CMSDK (Cortex-M System Design Kit) APB WDOG. This device
uses NMI as interrupt hence it requires Runtime NMI (CONFIG_RUNTIME_NMI)
to be configured in the platform.
Tested with drivers/watchdog sample application.
Jira: ZEP-1300
Change-Id: Ib318047109af81e32060e80d456ef3873fd380ea
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables the clock control interface into the ARM LTD
CMSDK APB UART driver.
Jira: ZEP-1300
Change-Id: Ic0a214beb02d56ffb02ad4e6ca26b80805c0a4e6
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables the clock control interface into the ARM LTD
Beetle GPIO driver.
Jira: ZEP-1300
Change-Id: I576767b68a8e4aa965d34716528df3bb4e837d73
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds the clock_control implementation for the ARM LTD
Beetle platform.
The main features enabled are:
* Clock on and off in ACTIVE, SLEEP and DEEPSLEEP mode.
* PLL support (freq: 12, 36, 48 Mhz).
The integration with the existing drivers will be done in future
patches.
Jira: ZEP-1300
Change-Id: I07cb2325275bd86a036e8e24aeb7bbf2c6176a93
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds the boot time Power Management configuration for Beetle
on Zephyr. In particular it defines the states of the peripherals during
sleep and deep sleep and the allowed wakeup sources.
Jira: ZEP-1300
Change-Id: Iad9c0f851771ea60d94bbe5420b7b3ee0743b77e
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add board support for the Nucleo64 L476RG development board.
Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the I2C for the STM32Lx series
Change-Id: Id1694aeb3606b4fa9772bfb7a9f60e48a7cc93a8
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add one pin configuration for I2C1 of the STM32L4 series.
Change-Id: Id05d916f2a1126ca439aebcddd8dc9c91015f6fe
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add all possible pin assignment definitions for I2C{1-3} on STM32L4xx.
Change-Id: I2d4266bc3bb9ba41b74a80567c0b04a89963753e
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the pin configuration of the USARTs.
Change-Id: Idf7a18b6eab95c61870ad4850c9eafb1fdcab03d
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add macro for all the available pinmux for the USARTs present on
STM32L4.
Change-Id: Ie4352750e1c6f08642b3e222b57f2a791f08ef74
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add EXTI support for the STM32l4XX family.
Change-Id: Ia92f26eaf49899ea23fae05dd3a7357007c9db20
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the support for all the GPIO port of the L4.
Change-Id: Id365e17223cd5c49443df9fb6b96a3c4f204f523
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the clock driver for the STM32L4 series.
Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Deal with STM32L4X additions for clock and interrupt handling to the
uart driver.
Change-Id: I6e8dafb132dafea54b8f31a3a5cb6e35a207574d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the initial SoC support for the STM32L4XX family. The code was
tested on STM32L476RG, but should work on any STM32L4XX currently
available.
This implementation was inspired by the stm32f1x implementation.
Change-Id: Id6670bce0c423617284e8467a9c461531f948e0f
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This new README provides guidelines on STM32Cube introduction
into Zephyr.
Change-Id: I06b22852495dbe7e7f23e88be060fe23e8bd18b5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers
Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Due to new serial driver implementation based on STM32Cube we can
remove the USARTX_ADDR defines as they aren't ended anymore
Change-Id: Ia9f9b0a2a63280c0221c789a53ff7338bda17dfb
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Due to new serial driver implementation based on STM32Cube we can
remove the USARTX_ADDR defines as they aren't ended anymore
Change-Id: Icd5b7995429025c5b54b1a04ca6abb9649ab31c8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32Cube based implementation allows single driver file for
all stm32 based SoCs.
By maximizing code reuse, use of STM32Cube eases new SoCs
porting into Zephyr and provides better maintanability and
maturity.
Change-Id: Ief4b723add3dfc8b2a839683559c5a4c5d5eb837
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
These correspond to the libc snprintf and vsnprintf APIs.
Change-Id: If3944972ed95934a4967756593bb2932c3359b72
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Pass a parsing context around, allowing counting the number of
characters written, which is then returned in the return value of
printk(). This makes printk more similar to printf and prepares the
way to extend the implementation to support printing to strings.
Change-Id: Ib28a18a4f36fc58b98b228fd5763b2c05f5af7bc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Not enough memory on this device with 8K of SRAM
Change-Id: I359cce806098cac7e0e2a9e00ce40c91bc535c5b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixing a tiny build error found through sanitycheck.
Change-Id: Iee9a3ac135380ddf70e2902b532f6f28d417715c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Drop the unnecessary trailing whitespace formatting in inline asm.
Change-Id: I351df91b7175fe21d268d325865838b4840def8d
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Replace the use of a hardwired temporary register in the irq_lock()
implementation with a local variable. This will allow the compiler
more flexibility in register allocation.
Change-Id: Ifbdb52fca1d40404d55934343ac2a8153df7e1a8
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The cortex-m4 irq_lock() implementation uses a movs instruction, thus
clobbering the condition code, but does not include the clobber in the
asm clobber list. This is a bug in the situation where the compiler
schedules a live condition code over the inline lock instructions.
Since the irq_lock() implementation does not need to kill the CC we
simply switch to mov from movs.
Take the opportunity to drop the unnecessay .n and let the assembler
choose an appropriate encoding.
This fixes a bug found by inspection, it has not actually been
observed in real code.
Change-Id: Id60fa3362df9d4bf05c3d5e23066410ede92d73c
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
