Manuel Argüelles 673f38f3d1 soc: arm: nxp_s32: s32k1: unselect CPU_HAS_xCACHE ... Following changes in #64978, align CPU_HAS_xCACHE symbols with the CMSIS feature definitions in the device headers so that both have the same value. Fixes #66147 Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>		2023-12-05 13:18:23 +01:00
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common	soc: nxp_s32: introduce support for S32K1 devices	2023-11-30 11:21:59 -05:00
s32k1	soc: arm: nxp_s32: s32k1: unselect CPU_HAS_xCACHE	2023-12-05 13:18:23 +01:00
s32k3	soc: arm: fix missing configs & defines	2023-12-05 10:19:15 +00:00
s32ze	soc: nxp_s32: cmsis rtos v2 adaptation	2023-11-27 19:58:57 +01:00
CMakeLists.txt	soc: arm: introduce NXP S32Z/E support	2022-10-14 09:51:14 +02:00
Kconfig	soc: nxp_s32: consolidate part number options	2023-11-15 10:25:43 -06:00
Kconfig.defconfig	soc: arm: introduce NXP S32Z/E support	2022-10-14 09:51:14 +02:00
Kconfig.soc	soc: arm: introduce NXP S32Z/E support	2022-10-14 09:51:14 +02:00