soc: arm: nxp_s32: s32k1: unselect CPU_HAS_xCACHE
Following changes in #64978, align CPU_HAS_xCACHE symbols with the CMSIS feature definitions in the device headers so that both have the same value. Fixes #66147 Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
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@ -20,48 +20,36 @@ config SOC_S32K142
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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config SOC_S32K142W
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bool "S32K142W"
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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config SOC_S32K144
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bool "S32K144"
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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config SOC_S32K144W
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bool "S32K144W"
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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config SOC_S32K146
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bool "S32K146"
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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config SOC_S32K148
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bool "S32K148"
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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endchoice
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