Add board overlay for pic32cm_jh01_cpro to enable ADC test
cases to run on PIC32CM_JH01 Curiosity Pro board
Signed-off-by: Shankar Ramasamy <shankar.ramasamy@microchip.com>
Add ADC0 and ADC1 pinctrl definitions and update the board
metadata to list ADC as a supported feature for PIC32CM_JH01
Curiosity Pro board
Signed-off-by: Shankar Ramasamy <shankar.ramasamy@microchip.com>
Add the XSPI2 in the Device Tree of the stm32h5f5j_dk
PSRAM memory is connected aps6408l to the port2
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the XSPI1 in the Device Tree of the stm32h5f5j_dk
External Flash NOR is connected mx25lm51245 to the port1
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Name the XSPI 1/2 depending on the stm32 series.
It could be mixed between XSPI or OCTOSPI depending
on the module HAL.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Name the XSPI 1/2 depending on the stm32 series. It could be mixed between
XSPI or OCTOSPI depending on the module HAL.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the stm32h5f5j_dk target board with stm32h5f5 device.
sysclock at Max freq 250MHz.
Note that user button is on PI8.
Use the STM32CubeProgrammer v2.22.0
Runner openOCD is not yet available
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce the new stm32h5e4, stm32h5e5, stm32h5f4, stm32h5f5 mcu
The Xj variant has 4MB of internal flash whereas the Xk variant has 3MB.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The meaning on the macros is self-explanatory, and the sheer amount of
macros makes documenting every single one a giant waste of time.
Shush Doxygen warnings about undocumented symbols by making the whole
header INTERNAL_HIDDEN.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the new stm32h5e4/5 and stm32h5f4/5 devices of the stm32H5 family
with 4MB of flash and Arm® Cortex®-M33 core.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add pm_action callback with PINCTRL_STATE_SLEEP on suspend and
PINCTRL_STATE_DEFAULT on resume. Register the driver with
PM_DEVICE_DT_INST_DEFINE so the PM framework calls the callback
during system sleep transitions.
If no sleep pinctrl state is defined in DTS, the suspend call
is a no-op.
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
The 3GPP TS 27.010 section 5.3.4 specifies:
"DISC command sent at DLCI 0 have the same meaning as the
Multiplexer Close Down command"
Add a handler for this and do the same operation as in
modem_cmux_on_cld_command().
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Update unit tests after moving hardware reservation logic from
Handler class to HardwareMap. Relocate and rename tests to match
the new module structure and API changes.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Hardware reservation logic moved from Handler class to ProjectBuilder
runner using context manager approach. When NoDeviceAvailableException
is raised due to no free devices, the task is re-queued for later
processing instead of blocking the execution pipeline.
The reserve_hardware() context manager handles device reservation,
yields execution control only when hardware is available, and ensures
proper cleanup in the finally block.
All DUT management logic is now consolidated in HardwareMap class,
removing DUT references from Handler classes. This improves code
maintainability by centralizing responsibilities and eliminating
shared ownership of hardware resources between modules.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Add flexspi nor flash support on imx93_evk, need to insert M.2 nor flash
card on the board.
Signed-off-by: Joe Zhou <zhongcai.zhou@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add Silabs General GPCRC driver for Series 2 boards
Enable crc sample and test cases for Silabs series 2
Tested on real boards and compared result with all CRC16
and CRC32-IEEE algorithm
Signed-off-by: Phuc Hoang <donp172748@gmail.com>
Update phandle documentation to reflect that IO channels are now
special-cased like GPIOs.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Extend the special casing of specifer space to include io-channels,
making the implementation a bit more easily scalable for the
future as well. This allows defining io-channels like gpios,
prepending a name like foo-io-channels, which is useful when
multiple groups of io-channels need to be defined for a node:
foo {
bar-io-channels = <&baz 0>, <&baz 1>;
qiz-io-channels = <&baz 2>, <&baz 3>;
};
This is useful for defining channels to be read in parralel
sequences.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Firmware-related samples should belong to the Firmware area.
Update MAINTAINERS to reflect that.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add initial support for SCMI shell commands. For now, this only includes
clock protocol-related commands. Other SCMI protocols will be added
incrementally.
Part of #103633.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
- add lpspi2 instance support
- test spi_loopback passed on my local
(connect J3-14 (LPSPI2_SOUT) <-> J3-16 (LPSPI2_SIN))
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Enable SCMI configs for AM62L evm to enable clock control
and power domain management through the SCMI protocol.
Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
Increase SCMI shared memory region from 256 bytes to 4KB to support
larger SCMI message payloads required for clock and power domain
operations.
Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
Add support for SCMI transport layer using ARM SMC (Secure Monitor
Call) as the doorbell mechanism with shared memory for data transfer.
Communication is performed synchronously so polling is the only
supported mode. The implementation follows the SCMI specification
for SMC/HVC based transport.
Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
Add polling_only flag to scmi_channel structure to support transports
that require polling mode (e.g., SMC transport which uses synchronous
SMC/HVC calls without interrupt support).
Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
Rename SOC_XILINX_XC7Z* Kconfig symbols to SOC_XC7Z* to align
with HWMv2 guidelines. The SOC Kconfig symbol name must match
the uppercase version of the SOC name defined in soc.yml.
Before: config SOC_XILINX_XC7Z010 with default "xc7z010"
After: config SOC_XC7Z010 with default "xc7z010"
This allows CI checks to detect typos and enables future
auto-generation of SOC_* symbols from soc.yml files.
Updated files:
- soc/xlnx/zynq7000/xc7zxxx/Kconfig.soc
- soc/xlnx/zynq7000/xc7zxxxs/Kconfig.soc
- boards/digilent/zybo/Kconfig.zybo
- boards/qemu/cortex_a9/Kconfig.qemu_cortex_a9
Fixes: #69317
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
stm32wbxx bump to version to 1.24.0
stm32wlxx bump to version 1.4.0
Update dma_stm32.h to sync with HAL new function prototype for
LL_DMA_IsActiveFlag_HT*() functions that now expect a const pointer
on STM32WLX series.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
PHY and controller function depends on VREGUSB. Add VREGUSB regulator
node to nRF54LM20A and use phandle to reference it in the wrapper node.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add driver for internal voltage regulator for the USB signaling
interface.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Co-Authored-by: Carles Cufi <carles.cufi@nordicsemi.no>
The regulator may generate an interrupt when, for example, the voltage
is present. The callback can be used for USB VBUS voltage regulators to
notify that a device is connected to a port.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
We need to describe the wrapper separately as a parent node because it
is not part of the USB controller but is used to configure, control, and
enable/disable the USB PHY, and to enable/disable USB controller.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The nodelabels do not have any relation to the Nordic MDK and can be
named differently between SoCs.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Make the RT1170 EVK rev B target explicit in display_check instead of
relying on the board default revision alias. This keeps the
testcase consistent with the adjacent explicit rev A entry and
avoids ambiguity about which hardware revision is exercised.
Signed-off-by: Hake Huang <hake.huang@nxp.com>
When lptmr0 is reserved as the system timer, the MCXW IEEE 802.15.4
radio cannot rely on a separate counter device being instantiated for it.
The fallback to the kernel cycle counter is also not a valid replacement
for hardware timestamping in all timer configurations.
Add a counter phandle to the MCXW binding, wire the MCXW7x boards in scope
to use lptmr1 as a dedicated non-system-timer counter, and make the driver
consume that devicetree-provided counter directly.
This keeps the fix narrow to the boards enabled in this PR while removing
the fragile hard-coded lptmr0/lptmr1 selection logic.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
When all LPTMR instances are reserved as the system
timer, the counter driver has no instances to create.
The static init and ISR functions become unused,
causing -Werror=unused-function build failures.
Guard the entire driver body with a preprocessor check
that counts usable (non-system-timer) LPTMR instances.
When the count is zero the file compiles to nothing.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
The MCUX LPTMR counter driver skips instantiating the LPTMR
instance reserved by zephyr,system-timer. The counter basic
API test still enumerated all status-ok nxp,lptmr nodes via
DEVICE_DT_GET(), which left a dangling device reference when
i.MX95 M7 selected lptmr1 as the system timer.
Filter the test device list to exclude the chosen system timer
node so the test only references LPTMR instances that the
counter driver actually instantiates.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
