The meaning on the macros is self-explanatory, and the sheer amount of
macros makes documenting every single one a giant waste of time.
Shush Doxygen warnings about undocumented symbols by making the whole
header INTERNAL_HIDDEN.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Preallocate and keep reusing the same buffer for SETUP data. This
ensures that USB stack will always be able to handle SETUP stage
regardless of UDC memory pool usage.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Allocating buffer in response to control transfer is part of processing
and therefore should not be done in UDC driver but rather in the stack.
Simplify UDC driver design by moving all control transfer buffer
allocations and processing to USB stack.
New control transfer handling flow is as follows:
1. USB stack allocates and queues buffer for Setup stage. This informs
UDC driver that USB stack is ready to process new transfer.
2. UDC driver completes enqueued Setup buffer. SETUP data may have
been received by device before Setup buffer was enqueued.
If multiple SETUP data was received, UDC driver must complete
request using last received SETUP data.
3. USB stack processes request. USB stack is responsible for:
* Stalling control endpoint when request cannot be processed
* Allocating and enqueueing Data stage buffer if necessary
- Depending on enqueued endpoint (IN/OUT), UDC driver is
expected to complete the transfer. If host sends new SETUP
data for any reason (e.g. timeout), then Data stage buffer
must be completed with -ECONNRESET code.
- UDC driver may postpone processing Data IN until USB stack
enqueues new Setup stage buffer.
* Handling status stage if applicable
- If Data IN was enqueued, stack immediately allocates and
enqueues Status OUT stage buffer.
- If Data OUT was enqueued, stack waits for Data OUT buffer
completion before doing any further processing.
- If control transfer handling fails, stack is expected to
STALL control endpoint.
* Allocating and enqueuing Setup buffer.
- This informs UDC driver that stack has finished processing
control transfer. UDC driver may choose to start processing
Data IN and/or Status OUT only after new Setup buffer is
enqueued.
4. UDC driver must fail (complete with -ECONNRESET) any enqueued and
not completed Data and Status buffers if host sends new SETUP data.
UDC driver must be able to buffer last received SETUP data until
USB stack is ready (enqueues Setup buffer).
5. UDC driver must complete all Data and Status buffers before it
completes Setup buffer.
6. UDC driver may keep ownership of Setup, Data and/or Status buffers
across USB bus resets. USB stack does not attempt to dequeue any
control transfer buffer it enqueued.
This approach implicitly synchronizes UDC driver against USB stack,
which ensures that only one set of Setup/Data/Status buffers is
allocated at a time.
Another advantage of the rework is drawing a clear line on buffer
ownership. The buffer responsibilities are as follows:
* USB stack is the only entity that both allocates and frees the
buffers. Only USB stack is allowed to set "setup", "data" and
"status" fields in struct udc_buf_info.
* UDC takes ownership of buffers handed to it in udc_ep_enqueue().
* UDC releases buffer ownership by calling udc_submit_ep_event().
Because there is just a single place where the buffer ownership changes,
and all buffers must go USB stack (alloc) -> UDC (perform requests on
the bus) -> USB stack (free) route it would be possible in the future to
implement a "tap" similar to Linux usbmon that would ease debugging.
This commit significantly changes how USB stack communicates with UDC
drivers. It was decided that supporting both the old and new model
simultaneously would require way too much effort. Therefore all UDC
drivers were reworked. Following people worked on driver rework:
* Tomasz Moń - ambiq, dwc2, kinetis, mcux ip3511, nrf, numaker,
renesas ra, rpi pico, smartbond, virtual
* Mathieu Choplain - stm32
* Mark Wang - mcux ehci
* Johann Fischer - sam0, stm32
* Ren Chen - it82xx2
* Brandon Hurst - max32
* Gerson Fernando Budke - sam udp, sam usbc, sam usbhs
Co-authored-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Co-authored-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Co-authored-by: Mark Wang <yichang.wang@nxp.com>
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Co-authored-by: Ren Chen <Ren.Chen@ite.com.tw>
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Co-authored-by: Brandon Hurst <brandon.hurst@analog.com>
Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
Co-authored-by: Gerson Fernando Budke <nandojve@gmail.com>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
definition of KConfigs STM32WBA_LL_THREAD_STACK_SIZE,
STM32WBA_BLE_CTLR_THREAD_STACK_SIZE, STM32WBA_LL_THREAD_PRIO,
and STM32WBA_BLE_CTLR_THREAD_PRIO to confige the
threads dedicated to BLE Controller and Link Layer
process.
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
Ble host and link layer threads initialization is no more done
during the system initialization.
Add stm32wba_ble_ctlr_thread_init() and
stm32wba_ll_ctlr_thread_init() functions calls
during ble and ieee802.15.4 driver initialization
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
In calculation of the FREQUENCY register value take into account
the tolerance of the peripheral clock to ensure that the SCL
frequency does not exceed the specified value.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Create a dts property specifying clock tolerance and add it
to affected i2c instances. The property is to be used in
the i2c driver to ensure the actual SCL frequency does not
exceed the value in "clock-frequency".
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
The nocache memory may not be freed when the `transferSofar` is 0, it
is allocated when (transferBuffer != NULL && transferLength != 0), so
release it with same conditions.
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Update hal_realtek paste the PR to drop python-mbedtls, it looks like it
does not install correctly on many distros.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add missing header file in stm32l1x poweroff.c drivers to get
stm32_enter_poweroff() and LL_DBGMCU_DisableDBGStandbyMode() declared.
Remove inclusion of stm32_ll_cortex.h that is not needed.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Looks like ETSI may have set up a weird/wrong redirect on a URL that
used to point to CRA-related ETSI standards. The broken link was
reported by someone from ETSI and this commit replaces it with the
suggestion made by that person.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
THis commit updates the picolibc module to match the version of picolibc
included in the Zephyr SDK 1.0.0 release.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Document how to run Zephyr on MPU boards in 'doc/index.rst' files for
sama7d65_curiosity and sama7g54_ek boards.
Signed-off-by: Tony Han <tony.han@microchip.com>
Add flexcan2 support on the NXP imx943_evk board for A55 Core.
Signed-off-by: Jianchao Wang <Jianchao.wang_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add all device nodes for flexcan on i.MX 943 A55 platform.
Signed-off-by: Jianchao Wang <Jianchao.wang_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Removes resource reservation for cpuflpr from the cpuapp build and
only applies it when either of the flpr snippets are used
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Add DSA (Distributed Switch Architecture) sample support for the
FRDM-IMXRT1186 board with configurations for both CM33 and CM7 cores.
Testing:
- Verified on both CM33 and CM7 cores
- Direct connection to PC successfully tested
- Network connectivity confirmed via ping
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add a board-level clock init hook and, when NETC is enabled, override
MAC0 root clock divider to 4 (125MHz) as required for RGMII 1G on
FRDM-IMXRT1186.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
- Add board-specific configurations for both CM33 and CM7 cores
- Add ethernet function description in index.rst
- Update board pinctrl, device tree, Kconfig and CMakeLists
- Add board initialization code for NETC switch support
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add a new board variant `extmem` for the CM7 core that uses external
HyperRAM and QSPI FLASH instead of internal memory. This variant is
useful for applications requiring more RAM or Flash than available
in the internal memory.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Use CONFIG_SOC_SERIES_IMXRT118X as judgement for NETC driver
configuration to support all RT1180 derivative parts
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Track success explicitly and only report timeout when no matching PHY ID
was found after all retries.
Extend the Motorcomm YT8521 PHY driver to support YT8531 chip.
The YT8531 is compatible with YT8521 and shares the same register
layout and configuration interface.
- "motorcomm,yt8521" for YT8521
- "motorcomm,yt8531" for YT8531
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
The image array entry in the boot container had incorrect values for
offset, size, and load_addr fields, preventing use with NXP Secure
Provisioning Tool (SPT).
The offset was calculated as -1 * CONFIG_IMAGE_CONTAINER_OFFSET
(0xFFFFF000) instead of CONFIG_CONTAINER_USER_IMAGE_OFFSET (0xA000).
The size and load_addr fields did not account for the header region.
These fields now correctly reflect the flash layout with container
at 0x1000 and application code at 0xB000.
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
Add device tree for STM32C5 series, including all SoCs,
all GPIOs and (LP)U(S)ART nodes.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
On STM32 HAL2, LL_ICACHE functions expects the ICACHE instance as first
argument. Add a macro that will construct the correct list of arguments
depending on HAL version.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add abstraction function to check the TX/RX fifo flags and enable/disable,
and redefine a few macros (like stop bits or data width) for STM32 HAL2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Shush Doxygen warnings about undocumented symbols by making the whole
header INTERNAL_HIDDEN.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
- Enable the `bee_bt_hci` node and set the `zephyr,bt-hci` chosen property.
- Add `bluetooth` to the supported features list in board metadata.
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
- Define the HCI node in the SoC series' dtsi.
- Adjust main thread stack sizes and buffer counts required
for Blutooth operation.
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
