VIDEO_BUFFER_POOL_NUM_MAX default value is 2 so remove it from
samples conf files setting it to that default value.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Now that VIDEO_BUFFER_POOL_HEAP_SIZE is available is used
in all projects, VIDEO_BUFFER_POOL_SZ_MAX can be removed.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Update video common code and applications to rely on the
CONFIG_VIDEO_BUFFER_POOL_HEAP_SIZE instead of
CONFIG_VIDEO_BUFFER_POOL_SZ_MAX.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
In preparation to the renaming of CONFIG_VIDEO_BUFFER_POOL_SZ_MAX
into CONFIG_VIDEO_BUFFER_POOL_HEAP_SIZE, add the new CONFIG
in all conf files equal to POOL_SZ_MAX multiply by POOL_NUM_MAX.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Clarify the size of the video buffer pool by having a
dedicated CONFIG for it. Until now the size of the
video buffer pool was equal to VIDEO_BUFFER_POOL_SZ_MAX
multiply by VIDEO_BUFFER_POOL_NUM_MAX.
This commit only add the description, the config doesn't
have yet any effect. Change will be added after all configs
are updated to define it in order to avoid breaking
platforms between 2 commits.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Switch to usage of ext-sdram property (ZEPHYR_REGION) for display
buffers instead of usage via the Shared-Multi-Heap API.
The ZEPHYR_REGION mechanism offer more flexibility than the
shared-multi-heap which is allocated on the whole PSRAM.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Switch to usage of ZEPHYR_REGION for display and video
buffers instead of usage via the Shared-Multi-Heap API.
The ZEPHYR_REGION mechanism offer more flexibility than
the shared-multi-heap which is allocated on the whole
PSRAM.
If enabled, add allocation of the VENC internal buffers
from the PSRAM via the HEAP allocator.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The CONFIG_VIDEO_BUFFER_POOL_SZ_MAX represent the size of the
biggest buffer in the pool size and not the whole pool size.
For the stm32-venc this should be 1-000-000 and not 10-000-000.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Allow usage of either Shared-Multi-Heap based internal memory pool
allocation or allocation from a HEAP located optional in a
Zephyr region.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Addition of two options in order to select the Zephyr region
into which the video buffer pool should be placed.
CONFIG_VIDEO_BUFFER_POOL_ZEPHYR_REGION allows to indicate that the
video video pool should be placed in a specific ZEPHYR region which
name is CONFIG_VIDEO_BUFFER_POOL_ZEPHYR_REGION_NAME
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
There is no USB port or headers for lpuart on the cvb board,
thus introducing a shield for the mother board in order to
visualize serial output and expand I/O connectivity:
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add support for NXP S32K5XXCVB boards which features
S32K566 SoC.
Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Co-authored-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
S32K566 is a member of the S32K5 family which expands
s32k3 series to higher performance and larger memory.
Zephyr port for S32K5 will support cortex-M7 and cortex-R52
After reset, swt_startup is enabled and starts running,
disable it using the watchdog hook.
Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Co-authored-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This adds support for clock_control_get_rate/clock_control_set_rate
API, so that module clock rate can fetch or modify via them in Hz.
Note only CANFD support is added as an reference example and other
module support will be added as-needed.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Fix the issue that occurs when building with GNU and
CONFIG_LINKER_GENERATOR=y.
Currently, the GROUP {region} directive does not function properly
with GNU. The input section cannot link to the memory group
defined by "zephyr,memory-region" in the final output linker
script.
This commit updates the GNU section name parser script, allowing
it to look up both group and region for output block generation
in the final output linker script.
Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Previously, the pinctrl macro definitions on the sf32lb platform relied on
manual maintenance, which led to some errors.
We will now use scripts to
generate the metadata, ensuring accuracy
Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
Btp got support of EAD in f04d0196de, enabling config flag will enable
GAP/SCN/BV-01-C and GAP/ADV/BV-20-C to be executed
Signed-off-by: Evgenii Kosenko <Evgenii.Kosenko@silabs.com>
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific ADC API extensions under.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Update the release-notes-4.4 to document:
1. The mcux_lpcmp driver will be deprecated.
2. The compatible 'nxp,lpcmp' for mcux_lpcmp
has now been changed to 'nxp,sensor-lpcmp'.
3. A new lpcmp driver based on the comparator
driver API has been created, and the 'nxp,lpcmp'
compatible is used for it.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Update the board overlay files for mcux_lpcmp sample to use
the sensor-lpcmp driver:
1. Delete the 'compatible' and 'clocks' properties from
the SoC-level lpcmp nodes.
2. Set the compatible to "nxp,sensor-lpcmp" to use the
sensor-based lpcmp driver.
3. Add '#io-channel-cells = <2>' property for sensor API.
4. Add pinctrl configuration for lpcmp0.
5. Ensure status is set to "okay".
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
We shall enable lpcmp in application level. Enabling lpcmp
at the board level doesn't make any sense, since the lpcmp
input is determined by the application.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
1. We shall set the proper clock source for lpcmp.
2. The property '#io-channel-cells' is currently
not needed for LPCMP.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
1. Enable MCXA/MCXN platforms' LPCMP clock control through
the clock driver (syscon).
2. Enable MCXE platform's LPCMP clock control through the
clock driver (mc_cgm).
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
We are planning to implement a new lpcmp driver based on the
comparator API and deprecate the current sensor-based driver.
We now mark the mcux_lpcmp as deprecated.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
We are planning to implement a new LPCMP driver based on the
comparator API and deprecate the current sensor-based driver.
We would like to use the nxp,lpcmp binding for the new
comparator-based driver implementation. To avoid naming conflicts,
we are renaming the current sensor binding to nxp,sensor-lpcmp.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Split device initialization into two phases across all LBM drivers:
1. Boot-time init: Minimal device initialization
2. First config: Radio hardware initialization
This deferred initialization approach provides full control over the
radio hardware, allowing applications to perform any necessary setup
before the radio is initialized. The radio init is automatically
triggered on the first call to lora_config().
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add functions to register and unregister user GPIO callbacks for DIO1
interrupts on LBM lora radio devices. This allows external code (e.g., the
LoRa Basics Modem HAL) to receive notifications when DIO1 fires.
The driver configures the pin mask automatically based on the DIO1 pin
from devicetree.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
KeepSorted can fail on Windows when the active code page is
not UTF-8 (e.g. GBK), because text files in the Zephyr tree
are UTF-8. Detect file type via libmagic and only process
text/* files, avoiding attempts to decode binary content.
Open text files via GIT_TOP / <path> with encoding="utf-8"
(and errors="surrogateescape") to prevent UnicodeDecodeError
during local compliance runs without changing the KeepSorted
sorting rules.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Refactor the Infineon TCPWM counter driver to use the TCPWM block base
address instead of the counter instance base address. This change aligns
with the standard Infineon PDL API which requires the TCPWM block base
and counter index as separate parameters.
This modification maintains functional compatibility while providing
better alignment with the underlying hardware abstraction layer.
This also aligns with PR feedback to move the ifx_tcpwm.h header file
from the include folder (public APIs) to the drivers folder. Instead,
this refactoring prepares to remove that header file entirely.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Spec - Section 2.3.8
> If the property is defined with an <empty> value, it specifies that
the parent and child address space is identical, and no address
translation is required.
Spec - Table 2.3
> <empty>: Value is empty. Used for conveying true-false information,
when the presence or absence of the property itself is sufficiently
descriptive.
`ranges = <>;` should be interpreted as `<prop-encoded-array>` with
empty array, when processing the child the ranges should be used and
given it is and empty array we will fail to map and behaviour
is undefined by the dts spec!
Hence IMO `ranges;` is the correct syntax here. This leaves no space
for uncertainty and undefined behaviour by tools and
user interpretation.
Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific Disk Access extensions under.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This is a follow-up to commit 59d8fbc0a9.
Add missing brackets in mask definitions that use `COND_CODE_1()`.
Without those, the call to `__DEBRACKET()` that is done inside
`COND_CODE_1()` removes the outer brackets provided by `GENMASK()`,
what causes problems when the mask is directly used with another
operator like `~`.
Remove also no longer needed brackets added in `start_next_packet()`
by the commit mentioned above as a workaround for this problem,
the root cause of which was not identified at that time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
