Commit graph

136,983 commits

Author SHA1 Message Date
Farsin Nasar V A
39edc96945 dts: arm: microchip: add RSTC node
Add the device tree node for microchip RSTC G1 IP.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-26 10:13:53 -06:00
Arunprasath P
75d41570cf tests: adc: microchip: Add sam_e54_xpro overlay for tests
Add board overlay file for sam_e54_xpro to enable adc
test cases to run on this board

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
a4d266616a samples: adc: Add sam_e54_xpro overlay for adc_sequence
Add a devicetree overlay to run the adc_sequence sample on
SAM E54 Xplained Pro.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
247c045ba2 boards: microchip: sam_e54_xpro: Add ADC pinctrl and feature support
Add ADC0 and ADC1 pinctrl definitions and update the board metadata
to list ADC as a supported feature on the SAM E54 Xplained Pro board.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
e767aa498a drivers: adc: microchip: Introduce G1 ADC Driver
Add a Zephyr ADC driver for the Microchip G1 ADC peripheral
with support for differential mode, multi-channel sequencing,
oversampling, and NVM-based factory calibration.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
1cdde74b35 dts: arm: microchip: Introduce ADC G1 dts binding
Add the device tree node and the binding file for
microchip adc G1 Peripheral.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Biwen Li
23354f3cad tests: drivers: uart_async_api: enable it for m33 of imx943_evk
This commit enables tests/driver/uart/async_api demo
for m33 in NETCMIX of imx943_evk.
- build command as follows,
  west build -p always -b imx943_evk/mimx94398/m33
  tests/drivers/uart/uart_async_api

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
9bfda71a9a dts: arm: nxp: imx95: m7: add disp_irqsteer node
Add disp_irqsteer node(this is another irqsteer instance).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
df9180305d dts: arm: nxp: imx95: m7: add more masters
Add more irqsteer masters.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
7b8d94c2be boards: nxp: imx943_evk: m33: enable edma2
Enable edma2 defaultly.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
23b764ffc2 dts: arm: nxp: imx94x: add edma2 node
Add edma2 node for lpuart3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
b93bffd271 dts: arm: nxp: imx943: m7_1: add irqsteer node
Add irqsteer node for m7_1.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
d7142bd597 dts: arm: nxp: imx943: m7_0: add irqsteer node
Add irqsteer node for m7_0.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
9dcf76c670 tests: arch: arm_custom_interrupt: exclude imx943
Exclude imx943,
  - multi level interrupts feature is enabled defaultly,
    so irqsteer1 driver is enabled, then the test case
    report the build issue:
    multiple definition of z_soc_irq_enable,
    tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c:47
    first defined here.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
66bfea6aef samples: drivers: uart_aysnc_api: imx943_evk: m33: add config
Add config for imx943_evk_mimx94398_m33
- Use the sample to test the irqsteer driver

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
4a3df69c09 boards: nxp: imx943_evk: m33: enable edma4
Enable edma4 by default for lpuart8 of m33(in NETCMIX)
of imx943_evk

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
cc183934a4 soc: nxp: imx943: m33: enable multi level interrupts
This commit enables multi level interrupts:
- Enable multi level interrupts
  imx943 is a two level interrupts system and
  some interrupts(eg. edma interrupts) depend on irqsteer.
- Increase irq number from 405 to 790
  Actually there are 407(IRQ 0 ~ IRQ 406) interrupts
  from nvic(first level interrupts),
  The second level interrupts are extended by irqsteer,
  it extends 32 x 12 = 384 interrupts,
  So first level interrupts + second level interrupts
  = 407 + 384 = 791(IRQ 0 ~ IRQ 790) interrupts

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
ce50e46a90 drivers: intc: irqsteer: Drop calling into NXP HAL
Supporting irqsteer using NXP HAL becomes increasingly harder with new
SoCs.

For example now there are two incompatible HAL drivers for IRQ steer
(mcux-sdk-ng/drivers/irqsteer and mcux-sdk-ng/drivers/irqsteer_1).

In order to avoid overcomplicating code and better scaling code for
newer SoCs just drop using the NXP HAL and implement an IRQ Steer native
Zephyr driver

Use irqsteer node of imx943 as example.

New features:
- Support multiple irqsteer instances.
- Indroduce new properties(nxp,irq-offset, nxp,num-irqs).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
8822d8f8a9 irqsteer-master: Introduce priority attribute
This adds priority attribute to irqsteer in order to
support multi level interrupts.

We need to make this change atomic so that we don't break
the build.

So, we introduce a new property named 'priority' to
`interrupt-cells` and we increase the number of cells.
Then we update all instances of interrupts
using irqsteer (for imx95, imx8m, imx8qm, imx8qxp and also
update the overlay(imx8mp_evk_mimx8ml8_adsp) for tests.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Chris Friedt
de2d0c9563 posix: c_lib_ext: fnmatch: fix character class support
A couple of tests were inconsistent with glibc and picolibc.

Significant rework done to the `fnmatch()` implementation which included
refreshing that and the `rangematch()` implementations from commit

0a3b2e376d150258c8294c12a85bec99546ab84b

in https://github.com/lattera/freebsd

Removed `match_posix_class()` and implemented that functionality as
`rangematch_cc()`, which uses 64-bit integer comparison for matching
`[:alnum:]` et al instead of string comparison. That likely only works
for the "C" locale.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Signed-off-by: Harun Spago <harun.spago.code@gmail.com>
2025-12-24 12:50:31 -05:00
Chris Friedt
637080e7ec posix: c_lib_ext: fnmatch: fix escape-oriented regression
A regression in 936d0278bd introduced a
subtle bug in the way that escaped expressions were handled.

The regression originated with the assumption that test data (originally
adapted from a 3rd-party testsuite) was correct when it was in fact
flawed.

Specifically, `fnmatch("[[?*\\]", "\\", 0)` should fail (`FNM_NOMATCH`),
since the "\\" sequence (a single backslash after compilation) escapes
the following ']' character, thus leaving the bracket expression
incomplete.

As @keith-packard  has pointed out,
https://pubs.opengroup.org/onlinepubs/9699919799/utilities/\
V3_chap02.html#tag_18_13_01 says that a bracket expression is only
interpreted as a bracket expression, when a proper bracket expression
is formed.

Therefore, the pattern is interpreted as the sequence
`'['`, `'['`, `'?'`, `*` (wildcard), `']'` and the call should return
`FNM_NOMATCH` to indicate failure rather than 0 to indicate success.

Added new test cases from #98827 and some commentary for subsequent
reviewers.

This change does not completely fix #55186 but is related to it.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-12-24 12:50:31 -05:00
Pieter De Gendt
526fa714a4 samples: drivers: jesd216: Print dw19 octal enable requirement
If supported, parse dw19 and print out the octal enable requirement.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-24 12:49:47 -05:00
Pieter De Gendt
7d6a9ab552 drivers: flash: mcux-flexspi-nor: Support octal mode
Add support for JEDEC octal mode.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-24 12:49:47 -05:00
Pieter De Gendt
206cad3b21 drivers: flash: jesd216: Add BFP DW19 decode helpers
Add struct and decode function for dw19 with octal enable requirement.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-24 12:49:47 -05:00
Qingsong Gou
89bc874404 tests: drivers: spi: add spi test support for sf32lb52_devkit_lcd
Add spi test support for sf32lb52_devkit_lcd

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Qingsong Gou
ff20bccfd9 drivers: spi: sf32lb: fix transceive_async
Fix transceive_async coding style and compile warnings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Qingsong Gou
0bfba8b6f4 drivers: spi: sf32lb: refactor transceive
Refactor transceive to pass spi test

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Qingsong Gou
65ca5b588b drivers: spi: sf32lb: some minor fixs
Fix some options not supported
code optimization

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Zhaoxiang Jin
ce55d6f36c doc: migration-guide-4.4: Add SAR ADC driver migration notes
Add migration guide documentation for NXP SAR ADC driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
8050fbe242 samples: adc: Enable ADC samples for frdm_mcxe31b board
Enable adc_sequence and adc_dt samples on frdm_mcxe31b board

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
727293473b boards: nxp: frdm_mcxe31b: Enable SAR ADC support
1. Enable SAR ADC support for nxp mcxe31x platform.
2. Enable SAR ADC support for nxp frdm_mcxe31b board.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
7558361c1a drivers: clock_control: enable ADC clock control
Enable MCXE31X platform ADC clock control through
the mc_cgm clock control driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
ea8e8b7d53 drivers: adc: refactor mcux_sar_adc to nxp_sar_adc
Zephyr's current ADC API only supports 32 logical channels,
which is inadequate for SAR ADCs on certain SoCs. For instance,
the ADC on the MCXE31B has 64 hardware channels. The previous
implementation used a one-to-one mapping between logical and
hardware channels. In the new SAR ADC driver version, we bind
hardware channels to logical channels via the zephyr,input-positive
property, enabling us to access any channel.

Currently, only imx93 uses this ADC. To maintain the bisectability
of Zephyr commits, in this commit we will also modify the imx93-related
files, inlcuding:
1. Update the clock_control_mcux_ccm_rev2.c to use the new Kconfig
option 'CONFIG_ADC_NXP_SAR_ADC'.
2. Add properties to the imx93_evk_mimx9352_m33.overlay of the adc_api
testcase.

Now the sar adc is native driver, so, remove
CONFIG_MCUX_COMPONENT_driver.sar_adc from the glue cmake.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
af72661b1a doc: releases: document NXP board compile definition scope changes
Add migration guide entry for compile definitions 'XIP_EXTERNAL_FLASH',
'USE_HYPERRAM' and 'XIP_BOOT_HEADER_XMCD_ENABLE' that were changed from
global to local scope in NXP board CMakeLists.txt files.

Applications that depended on these definitions being globally available
may need to be updated.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:35 -05:00
Zhaoxiang Jin
e8e4889895 boards: nxp: change definitions to local scope
1.'XIP_EXTERNAL_FLASH' and 'USE_HYPERRAM' are only used in
zephyr/boards/nxp/mimxrt1180_evk/xip/evkmimxrt1180_flexspi_nor_config.c,
so just change them to local scope.

2.'XIP_BOOT_HEADER_XMCD_ENABLE' is only used in
zephyr/boards/nxp/mimxrt1170_evk/xmcd/xmcd.c,
so just change it to local scope.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:35 -05:00
Benjamin Cabé
aa0e3f79d1 driver: auxdisplay: Update validation to use K_SYSCALL_DRIVER_AUXDISPLAY
Replace K_SYSCALL_OBJ() with K_SYSCALL_DRIVER_AUXDISPLAY() in syscall
handlers to validate that the requested driver operation is actually
implemented before invoking it.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-24 12:48:22 -05:00
Benjamin Cabé
3a9d5b4991 drivers: auxdisplay: add missing syscall memory checks
Add missing K_SYSCALL_MEMORY_WRITE and K_SYSCALL_MEMORY_READ
verifications in syscall handlers for pointer parameters.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-24 12:48:22 -05:00
Derek Snell
5b014704da doc: boards: nxp: add shields used to test features
Lists supported shields for driver/feature tests.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-12-24 12:47:47 -05:00
Merin George
a8838f7cfd driver: rtc: compilation error fixed
Infineon RTC driver compilation error fixed

Signed-off-by: Merin George <merin.george@infineon.com>
2025-12-24 12:47:18 -05:00
Merin George
1ed26473bb driver: timer: cyw20829 clock announce outside of spinlock context
Fixed the sys_clock_announce to be outside of spinlock context to
resolve the issues related to invalid spinlock when CONFIG_PM is
enabled

Signed-off-by: Merin George <merin.george@infineon.com>
2025-12-24 12:47:18 -05:00
Camille BAUD
30fa6fb3d6 tests: build_all: display: Update test cases to behave as intended
move depends on to only apply to default case, remove 'example' case,
remove unnecessary display tag on ai_m62_12f_kit

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-24 12:47:08 -05:00
Martin Hoff
8e2326e43f boards: silabs: siwx91x: add ADC configuration for siwx917 boards
Add the adc exemple configuration in boards dtsi an pinctrl.
Additionally, the SiWx917_rb4338a overlay file has been removed as
its contents have been integrated into the main device tree files.
Also, only siwg917_rb4342a is now tested in CI for adc_dt and
adc_sequence (even thought other boards can run the sample).

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-24 12:46:48 -05:00
Martin Hoff
f2741038aa boards: silabs: siwx91x: pinctrl.dtsi files for rb4338a and rb4342a
This patch moves the definition of the pinctrl for both siwg917_rb4338a
and siwg917_rb4342a boards from the board dtsi to a dedicated file.
It allows better maintenance and consistency with other boards.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-24 12:46:48 -05:00
Martin Hoff
e357c96d4a dt-bindings: adc: add new header file for Silabs SIWX91X ADC bindings
This patch introduces a new header file regarding ADC binding with
SiWx91x SoC. It allows a more friendly definition of ADC channel input.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-24 12:46:48 -05:00
Chun-Chieh Li
55e38dd937 drivers: can: numaker: refine format
Refine the format using clang-format and make no logic changes

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-24 12:46:35 -05:00
Hong Nguyen
e93279e773 drivers: stepper: include enable and microstep pins in common config
- Include the enable, m0, and m1 microstep to the common init config.
- Refactor drivers that manually init these pins to use the pins
from the common config.

Signed-off-by: Hong Nguyen <hong.nguyen.k54@gmail.com>
2025-12-23 19:50:25 +00:00
Robert Lubos
346e4d041e tests: net: lib: lwm2m: interop: Add missing PSA configs
Some PSA configs were missing for DTLS to work in LwM2M interop tests.

CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID was defined twice, so remove
redundant entry.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-23 19:50:17 +00:00
Alberto Escolar Piedras
4ad6857e66 tests/subsys/modem/backends/tty: Ensure it is built with proper C lib
This test itself (not the code under test) needs to be build with the
host C library as it calls into its open/close/read/write APIs.
So let's ensure we build it with it, independently of what the
default C library may be.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-23 19:49:50 +00:00
Alberto Escolar Piedras
6ef08d1221 modem: backend: tty: Support building with any C library
Ensure we call into the host C library open/close/read/write
independently of which embedded C library the code is built with.

We do this by:
a) Using the native simulator nsi_host* trampolines when we just want
   to call straight into the host libC.
b) Building in the native_simulator runner context (and therefore with
   the host C library) two functions which we call from the embedded
   side.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-23 19:49:50 +00:00
Robert Perkel
98233a966f samples: sensor: mtch9010 Added MTCH9010 Sample Code
Added sample code for the MTCH9010 device

Signed-off-by: Robert Perkel <robert.perkel@microchip.com>
2025-12-23 19:49:27 +00:00