Add two new definitions, ADC_SAR_IP_HW_REG_SIZE and
ADC_SAR_IP_CHAN_2_BIT, to eliminate the inclusion of
Adc_Sar_Ip_HwAccess.h, since this header file does not
exist for the S32K5 platform.
Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
When one generated .pb.h file includes another generated .pb.h file,
the build can fail because compilation may start before all headers
are generated.
The nanopb_generated_headers target collects all proto generation
targets as dependencies, but the calling target was not depending on
it. This can cause a race condition where the compiler fails with
"No such file or directory" for included headers.
Make the calling target depend on nanopb_generated_headers to ensure
all protobuf headers are generated before source compilation begins.
Signed-off-by: Nick Brook <nrbrook@gmail.com>
icm45686_encoded_fifo_payload is defined as packed struct,
while the nested structures are not. It causes an issue of
potential unaligned access to accel and gyro members.
The issue was detected by clang compiling with
-Wunaligned-access flag:
```
icm45686.h:52:6: error: field accel within 'struct icm45686.h:46:3)'
is less aligned than 'struct icm45686.h:48:4)' and is usually due
to 'struct icm45686.h:46:3)' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
icm45686.h:57:6: error: field gyro within 'struct icm45686.h:46:3)'
is less aligned than 'struct icm45686.h:53:4)' and is usually due
to 'struct icm45686.h:46:3)' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
```
Small C code snippet to demonstrate the reported issue:
```
struct icm45686_encoded_fifo_payload icm45686;
// prints 1:
printf("%lu\n", __alignof__(icm45686));
// prints 1:
printf("%lu\n", __alignof__(icm45686.accel));
// prints 2:
printf("%lu\n", __alignof__(typeof(icm45686.accel)));
```
This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101142
by adding `packed` attribute to accel and gyro members.
Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
bmi08x_accel_frame is defined as packed struct,
while the nested structures are not. It causes an issue of
potential unaligned access to accel member.
The issue was detected by clang compiling with
-Wunaligned-access flag:
```
bmi08x.h:605:2: error: field within 'struct bmi08x_accel_frame'
is less aligned than 'union bmi08x.h:605:2)' and is usually due
to 'struct bmi08x_accel_frame' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
```
This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101142
by adding `packed` attribute to accel member.
Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
In case of native build, the CONFIG_architecture
cannot currently be resolved with Kconfig, so we
must fall back to resolving it during compilation
using compiler definitions.
Signed-off-by: Jaagup Averin <jaagup.averin@gmail.com>
Add adxl345_attr_set_range() to allow runtime config.
of the accelerometer's measurement range via the
SENSOR_ATTR_FULL_SCALE attribute.
The function maps the requested range to the nearest supported
ADXL345 range (±2g, ±4g, ±8g, or ±16g) and updates the device
configuration accordingly.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add SPDX-License-Identifier and copyright headers to Infineon
board overlay files in flash_shell, uart async_api, and
nvs samples for cy8cproto_062_4343w and cy8cproto_063_ble boards.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
A alignment of 1 is also called 'unaligned'.
This default causes exceptions on CPUs that use different paths
for unaligned and aligned access.
Use a sane default that doesnt guarantee a store/access exception.
Signed-off-by: Camille BAUD <mail@massdriver.space>
Update hostap cleanup intervals to 120 seconds for NXP wifi chips.
CONFIG_WIFI_NM_WPA_SUPPLICANT_CLEANUP_INTERVAL for wpa_supplicant.
CONFIG_WIFI_NM_HOSTAPD_CLEANUP_INTERVAL for hostapd.
Signed-off-by: Hui Bai <hui.bai@nxp.com>
Both wpa_supplicant and hostapd register cleanup interval to eloop and
the intervals are all 10 seconds by default and this can cause device to
be woken up twice from sleep every 10 seconds. In order to reduce power
consumption, add below new items in Kconfig so that users can update the
cleanup intervals based on their requirements.
CONFIG_WIFI_NM_WPA_SUPPLICANT_CLEANUP_INTERVAL
CONFIG_WIFI_NM_HOSTAPD_CLEANUP_INTERVAL
Signed-off-by: Hui Bai <hui.bai@nxp.com>
Enable clock for tempsense module in NXP MC CGM driver to
support temperature sensing functionality.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add a new driver for the NXP TempSense temperature
sensor found in various NXP MCUs, such as the MCX
family. The driver reads temperature data from the
TempSense peripheral and provides it via the Zephyr
sensor API.
The TempSense peripheral details can be found in the
NXP MCXE31x reference manual chapter 78.
reference manual can be found at:
https://www.nxp.com/webapp/Download?colCode=MCXE31XRM
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
This commit enhances the SAR ADC driver by adding
support for clock frequency selection. The clock
frequency can now be configured via the devicetree,
allowing for better optimization of ADC performance
based on application requirements.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Since RPI_PICO_PIO_GET_PROGRAM returns const variable, so changed
`pio_program_t *` variables in data to `const pio_program_t *`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This PR combines node content in the same file spread over multiple
node definitions.
This PR has not funtional changes to the boards
Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
Fix adc_dt run issue on NXP MCXN boards, the default
mode of vref is standby mode, the BUF21 is not enabled,
so the LPADC can not work normally. Need to set the vref
mode to 'NXP_VREF_MODE_LOW_POWER' or 'NXP_VREF_MODE_HIGH_POWER'
to enable the BUF21.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Move the NULL checks for the protection configuration parameters
before dereferencing them to avoid potential NULL pointer
dereferences.
The device pointer is assumed to be valid.
No functional change intended.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
uint64_t is not in general unsigned long long int, and therefore
its format specifier is not llu in general.
The macro PRIu64 resolves to whatever it is.
For 64bit targets, uint64_t is relatively normal to just be
unsigned long.
Providing the wrong format specifier results in the build warning
```
format %llu expects argument of type long long unsigned int, but
argument <x> has type long [unsigned] int
```
The issue can be reproduced by building this test with
native_sim/native/64.
Issue introduced in da6cd1a474
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Segger Systemview calls k_current_get() in sys_trace_k_thread_switched_in.
During early boot, this hook is triggered while k_is_pre_kernel() is true.
This triggers an assertion failure when CONFIG_ASSERT is enabled.
Add a guard to ignore the thread switch event if it is called pre-kernel.
Signed-off-by: Igor Knippenberg <knippenberg@filics.eu>
The nrfs audiopll is automatically started if freq fraction or
prescaler is requested. The initial state of the clock should be
off, so send a disable request after setting initial freq fraction
and prescaler.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Ensure the MAIN power domain is on before triggering
NRF_LRCCONF_TASK_CLKSTART_0 task.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add board shield definition for the Semtech SX1261MB2BAS LoRa module. This
is mostly copied over from semtech_sx1262mb2das.
Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
Use API for registering synchronous interrupts. It reduced interrupt
latency due to NVM memory wake up.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add API for indicating that a deterministic interrupt will occur at
certain point in time in the future. Implementation is ensuring that
there will be no latency due to NVM memory waking up. There are 2
ways of ensuring that:
- setting low latency power mode in RRAMC (higher power consumption
in idle (not available in non-secure build)
- using PPI and GRTC to trigger the RRAMC wake up task right before
an expected interrupt
Module has a pool of GRTC channels and dynamically allocates and
frees those channels when events are registered and unregistered.
If GRTC channel is not available then algorithm falls back to power
mode setting (in secure build).
API offers registering an event using relative and absolute timing.
API can be used from Zero Latency interrupts.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add support for testing AMD-Xilinx Inter-Processor-Interrupt(IPI) on
Versal Gen2 RPU.
Add an overlay configuration to enable IPI-1 as the default
inter-processor interrupt for RPU0 in Versal Gen2. While IPI-1 is the
preset, it can be adjusted based on design requirements.
rpu0_rpu0_mailbox is set up in loopback mode for testing.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Add support for testing AMD-Xilinx Inter-Processor-Interrupt(IPI) on
Versal-NET RPU.
Add an overlay configuration to assign IPI-5 as the default
inter-processor interrupt for RPU0 in Versal-NET. While IPI-5 is preset,
it can be adjusted based on design requirements.
rpu0_rpu0_mailbox is set up in loopback mode for testing.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Add the inter-processor interrupt (IPI) nodes to the device tree for the
Versal Gen2 platform, as per Versal Gen2 Technical Ref Manual (AM026)
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Add the inter-processor interrupt (IPI) nodes to the device tree for the
Versal-NET platform, as per Versal-NET Technical Reference Manual (TRM).
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Add a new MBOX driver for the AMD-Xilinx IPI Mailbox, providing support
for the Versal-NET and Versal Gen 2 platforms
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Add device tree bindings for the AMD-Xilinx Inter Processor Interrupts
(IPI) mailbox.
The IPI architecture allows the passing of messages across the system
without the complications of autonomous read-write transactions and
polling inefficiency. The notification of the interrupt is also
possible without message buffers on some platforms. Some IPI channels
are hard-wired to particular core while others can be configured to
assign to any core on AMD-Xilinx heterogenous multiprocessor platform.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
1. Update the CRC sample’s Twister console regex to match the current
log output.
2. Add an integration_platforms entry (ek_ra8m1) so the sample runs
in PR CI.
3. Make CRC verification unconditional so the expected
“verification succeeded” log is always emitted and mismatches fail
the test.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Release the buffer with net_buf_unref(rsp) once the reading default link
policy settings response has been parsed.
Signed-off-by: zhenwei fang <fangzhenwei@bytedance.com>
Enable GP14 for this sample. Use commented-out entries for the
other servo outputs, as is done in the other overlay files.
Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
