The PL011 driver has already implemented supporting reset device
behavior.
However, the support is incomplete because the `arm,pl011.yaml`,
does not contain a `reset-device.yaml`.
Add include directive to `arm,pl011.yaml` to including
`reset-device.yaml` to complete the support for reset device.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add a CLI argument for specifying individual files to be added to the
parsing. This is useful for downstream users that wish to import files
such as `bindings/spi/spi-device.yaml`, without also pulling in all the
associated SPI controllers.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add NRF_PERIPH_GET_FREQUENCY() that returns the frequency of clock
that is used for the node.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Update the context state parameters when the context is already locked.
This allows changing the callback information for asynchronous
operations while the context is locked.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add configuration for UARTE120 fast instance. Use multi-instance capability
of the test to run same test on UARTE120 and slow UARTE peripheral.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Do not use CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n because this option
is going to be deprecated and this option does not support all uart
instances (e.g. uart120). Limit testing of configuration with
CONFIG_UART_0_ENHANCED_POLL_OUT=y to legacy platforms. nrf54x
platforms have ENDTX-STOPTX short so this feature is not supported
and needed there.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
gpio_loopback fixture is used for single pair of shortened pins. For
this test 2 pairs are needed (cts-rts + tx-rx) so gpio_loopback does
not describe it correctly.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Do not unlock CR at the end of initialization.
The lock mechanism is to protect unwanted registers modifications due to
software bugs. There is no point in leaving the registers unlock once
the driver is initialized.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Currently, the uart_wch driver only supports the polling API.
This patch introduces bindings for the interrupt-driven API.
Signed-off-by: Paul Wedeck <paulwedeck@gmail.com>
This ensures that the system clock is correctly updated when the first
timeout is aborted, preventing unexpected early wake-up by the system clock
programmed previously.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
With the changes made in PR #76061, only on the F429ZI platform, in
the test_write_abort test,the number of received data (2) is not equal
to the number of sent data (1). It looks like uart_tx_abort is done very
quickly, and the callback doesn't have enough time to deal with it.
Adding a small delay solves the problem and doesn't affect results on
other platforms.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Test cases on F746ZG work with USERSPACE config not enabled.
PR #80944 forces the use of the TEST_ENABLE_USERSPACE config with
the "select" statement instead of "imply," which is more restrictive
for test case dependencies.This leads to the error
"Memory region 0x2004d180 (size 8) write access denied" on boards.
By setting CONFIG_TEST_USERSPACE=n, the TEST_ENABLE_USERSPACE config will
not be enabled.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
When attaching a device, it should look up if the dynamic addr is
already attached only, and not by the static addr.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add the SDR Error Code to be written in to the payload following
section 5.1.10.2 of the I3C v1.1.1 specification.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
For ENTDAA, BCR and DCR is always transmitted back up to the controller.
When `i3c_bus_init` is done, it does the ENTDAA then it would get the
basic info would get the BCR and DCR again. This was rather reduntant.
This now splits it up so there is a function called
`i3c_device_adv_info_get` which gets the mrl, mwl, getcaps, and the
mxds. `i3c_device_basic_info_get` now only just gets the bcr and dcr.
There is also an inline function called `i3c_device_info_get` which
will get everything.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The two interrupt controller registers on 818x got spoonerized, oops.
Hilariously it actually worked (mostly) becuase the interrupt would
still be delivered, the controller isn't involved in the ACK/clear
process on thsi device, the and the set of pending interrupts was
masked against enabled ones. Found it by accident when I moved things
around and caught a "spurious" interrupt.
Also the 8195 DRAM region was all packed in a single block that doesn't
honor the two regions defined in the host devicetree. That's benign
from Zephyr (the memory in the hole actually is usable) but dangerous
for SOF as the second region is used by the host driver to allocate
DMA buffers and we can't touch it except as directed. Honor the
scheme used by the other devices.
Signed-off-by: Andy Ross <andyross@google.com>
For the same reason that this script can't zero the SRAM region (it
spontaneously reboots my 8186 device) we can't scan the SRAM for the
winstream header. It's never there anyway, it lives in .rodata.
This is likely a hardware bug, but as it's an older platform and this
is test code it's probably best to just keep it as a workaround.
Signed-off-by: Andy Ross <andyross@google.com>
Enable a winstream console via the new "STATIC" platform API, and add
code to the loader script to read it (largely cribbed with
modifications from the same feature in cavstool.py, we have nowhere to
share code like this, alas).
The older logging feature is still present as an "oldlog" mode to the
script. We can leave it for a bit as a failsafe (e.g. for debugging
issues with winstream) and remove it later.
Signed-off-by: Andy Ross <andyross@google.com>
The winstream code itself is reasonably generic, but the console
integration was written to the intel_adsp memory window driver only,
as that was the only consumer.
Add an alternative that allows the winstream to be pointed to by a
linker symbol instead. The platform layer is responsible for putting
it where it needs to go.
Also includes a 20-byte "descriptor" recodr (with a very large magic
number) in the binary that points to the winstream, for the benefit of
external tooling that needs to find it at runtime.
Signed-off-by: Andy Ross <andyross@google.com>
These devices have non-standard cache lines (128 bytes), and were
inheriting an incorrect setting for this kconfig.
Also clean up some related feature kconfigs which were being ignored
and not set =y.
Signed-off-by: Andy Ross <andyross@google.com>
This is a pre-existing (but rarely used) Zephyr linker tag. Support
it instead of reinventing something similar.
Signed-off-by: Andy Ross <andyross@google.com>
Xtensa cache line sizes aren't an obtuse area of pedantry like they
are in x86. Different cores already in Zephyr are already using
variant cache line sizes (64 and 128 bytes are both common).
And I tripped over this by using the wrong value because the kconfig
was being inherited (incorrectly) from a default somewhere.
Xtensa exposes the correct value in core-isa.h (well, unless the
toolchain/hal gets messed up). Add a check to make sure that our
platform kconfig gets it right.
Note that qemu/dc233c was already getting this wrong, leaving the
value at the kconfig default of zero. That was benign (qemu doesn't
provide any cache emulation for incoherent DMA), but needs to be
fixed.
Signed-off-by: Andy Ross <andyross@google.com>
The Linux SOF driver owns this space, but puts buffers here which the
DSP is expected to read and write. Give it a space in the default MPU
mapping.
Note that this assumes that the DMA region is numerically above the
linkable DRAM region in the address space. That's true for existing
devices, but likely to be broken in the future.
Signed-off-by: Andy Ross <andyross@google.com>
The SOF source code is confusing. On some hardware these devices have
distinct IRQs assigned, and on others they seem to share an ISR for
all. Leave the existing assignments in place for SOF-compatibility,
but union all the devices into a single ISR path that will poll each
(there are only two). This will work in all configurations, and we
can figure out the proper architecture at leisure.
Signed-off-by: Andy Ross <andyross@google.com>
SOF needs this information for rimage to work, it contains data needed
by the kernel loader and not firmware per se. Note that contra other
SOF platforms, this leaves the data in the live firmware image so it
can be inspected at runtime. That's not needed by core SOF code, but
is handy for debugging. And these devices have a ton of DRAM space
available.
Signed-off-by: Andy Ross <andyross@google.com>
The CMD_BLANK_CHECK can return errors when the flash is readable, and
should only be used after programming, not in is_area_readable(). From
the LPC55S69 datasheet: "As cells age and lose charge, a correctly
programmed address will fail this check, while still being able to be
read successfully for the remaining duration of the data retention time."
Signed-off-by: Derek Snell <derek.snell@nxp.com>
There are 4 Kconfig names about the "Draw Buffer". Rename 'VBD' to 'VDB'
in Kconfig option 'LV_Z_*VBD*_CUSTOM_SECTION' to make name consistent.
config LV_Z_VDB_ALIGN
int "Rending buffer alignment"
config LV_Z_VBD_CUSTOM_SECTION
bool "Link rendering buffers to custom section"
config LV_Z_DOUBLE_VDB
bool "Use two rendering buffers"
config LV_Z_VDB_SIZE
int "Rendering buffer size"
default 100 if LV_Z_FULL_REFRESH
And the draw buffer definition is now:
static uint8_t buf0[BUFFER_SIZE]
#ifdef CONFIG_LV_Z_VDB_CUSTOM_SECTION
Z_GENERIC_SECTION(.lvgl_buf)
#endif
__aligned(CONFIG_LV_Z_VDB_ALIGN);
Signed-off-by: Haiyue Wang <haiyuewa@163.com>
Fix arch_timing_cycles_get() to prevent overflow on the clock rollover.
The issue is observable on tests/benchmarks/wait_queues and
tests/benchmarks/sched_queues with BENCHMARK_NUM_ITERATIONS is large
enough, e.g. default 1000.
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Add support for STM32H757 SoC, which shares its design
with STM32H747 with added cryptography peripherals.
Signed-off-by: Grzegorz Runc <g.runc@grinn-global.com>
The stm32l562e_dk board uses a ft6x06 i2c controller for the touchscreen.
The zephyr driver ft5336 can control it.
Signed-off-by: Luc BEAUFILS <luc.beaufils@savoirfairelinux.com>
Add the overlay file to run tests/drivers/watchdog/wdt_basic_api
on the nucleo_h7s3l8 and stm32h7s78_dk target boards
Signed-off-by: Francois Ramu <francois.ramu@st.com>
