Add support for .mot file flash using west flash command
The RX build output .mot as binary file to flash into
board
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Intial support for RSKRX130 512KB board
The board 2 version 128KB and 512KB running on 2 different
part of the RX130 MCU series.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Intial serial driver support for RX MCU, this driver utilize
the SCI HWIP for uart communication
Current support include polling API and Interrupt driven API,
some of the code is using Renesas RX Driver Package (RDP) as
hal layer
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Sang Tran <sang.tran.jc@renesas.com>
Initial commit for GPIO driver support on board using RX130 MCUs
* drivers: GPIO: implementation for GPIO driver on RSK_RX130_512KB
* dts: rx: add device node for GPIO of RSK_RX130_512KB
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Intial support of pinctrl driver for Renesas RX MCU
family.
This support base on using Renesas RX driver package in
hal_renesas layer
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
This commit add a system timer driver for Renesas RX using the
CMT peripheral. The driver supports both system ticks and
high-resolution cycle counting
- Configures CMT0 as the system tick timer
- Configures CMT1 as a free-running cycle timer for precise
time tracking
- Handles timer overflows to maintain a continuous cycle count.
- Implements sys_clock_cycle_get_32() and sys_clock_cycle_get_64()
for high-resolution timing
- Supports Zephyr tickless kernel mode by tracking elapsed cycles
- Enables interrupt-based tick announcement using CMT0
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Yuichi Nakada <yuichi.nakada.sx@renesas.com>
Initial support of clock control driver for RX MCU
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
The qemu-system-rx is based on RX62N, this commit added
support for the RX62N SOC layer. MCU is using RXv1 core and
system timer running at 6MHz
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Add intial support for RX linker script
The RX GCC toolchain automatically adding an "_" as prefix
on every C symbol to comply to the arch ABI, for the C file
to understand the symbol define in linker script the
PLACE_SYMBOL_HERE() macro help to add "_" to linker script
define symbol if build with CONFIG_RX enable
This commit adding minimal support in common linker script
for RX arch
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The Renesas RX support flashing .mot file for binary image
This commit target to add the .mot file output for build and
flash script
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Current clock synchronization was always stepping clock. This was
causing large offset, and discontiguous ptp hardware clock time.
For TSN hardware, discontiguous ptp hardware clock time was not
able to be used for other TSN protocols.
This patch is to convert to frequency adjustment with a basic
PI control algorithm.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Converted ENET_Ptp1588Configure to ENET_Ptp1588StartTimer during reset.
This is to avoid configuring IRQ handlers again in hal driver with
ENET_Ptp1588Configure.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The rate adjustment should be based on nomianl frequency, but not
current frequency. Then any PTP stack with PID control could adjust
frequency well.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The enet handle in mac driver was not shared with ptp driver
properly. This was causing wrong TX timestamp.
This patch is to fix it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Add a disabled st,stm32-qdec node to TIM3 for STM32F2-based MCUs.
This enables QDEC support via devicetree overlays and simplifies
usage on boards such as nucleo_f207zg.
Signed-off-by: Amaan Singh <amaansingh160@gmail.com>
Add disabled qdec subnodes to timers TIM1 through TIM5 and TIM8
for STM32F2 series MCUs. This enables Zephyr to provide consistent
QDEC support across all supported encoder-capable STM32 timers.
Signed-off-by: Amaan Singh <amaansingh160@gmail.com>
The documentation is updated to give more information regarding the SPI
default settings and the necessity to change the out-of-the-box firmware
to be compatible with Zephyr.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
This commit enables die_temp support by configuring ADC3 and adding
the die_temp0 alias to the devicetree of the nucleo_h753zi board.
This change has been tested using the die_temp_polling sample.
Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
Clean up dt binding descriptions and introduce titles where
needed to make board documentation pages look nice. The supported
hardware table on board documentation pages sources its data
from dt bindings, and needs succinct titles.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Use the title property from bindings in the supported hardware table
if available.
Create <abbr> elements for acronyms and abbreviations in titles.
Abbreviations are not created when the description field is used as
a title, since existing text in bindings was not created with this
in mind, and parentheses are used in the text in ways that are
incompatible with the auto-abbreviating logic.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Make the recently added `title` attribute in dt bindings available
in the board catalog used by the board supported hardware directive.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Make the binding title available from the node the same way
the binding description is propagated.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Added USB device node with compatible "st,stm32-usb".
Added usb_fs_phy node with compatible "usb-nop-xceiv".
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
- Defined CCIPR2_REG offset.
- Added USB_SEL(val) macro to support USB clock selection using CCIPR2_REG.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Allow reading the offset register.
This allows reading the offset before setting it if offset is set more than
once.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Don't automatically disable all GPIO ports just because
`PM_DEVICE_RUNTIME` is enabled. Require the user to explicitly call
`pm_device_runtime_enable` on the port, or add
`zephyr,pm-device-runtime-auto` to the devicetree node.
Signed-off-by: Jordan Yates <jordan@embeint.com>
No window widening was applied to conn_offset_us causing the initial
ticker_cb to get called slightly too late
Apply window_widening_periodic_us to conn_offset_us, since this is the
worst-case window widening (win_offset is not allowed to be larger than
a connection interval) and is applied in the LLL window size already
Fixes EBQ failure in LL/TIM/PER/BV-02-C
Signed-off-by: Troels Nilsson <trnn@demant.com>
For npck3m8k:
1. Update code ram from 320KB to 416KB (0x1005_8000~0x100B_FFFF).
2. Update data ram from 32KB to 64KB.
3. Move fiudiv from hfcbcd1 to hfcbcd2 register
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
K3 series is a Nuvoton embedded controller based on NPCX series.
Add npck3m8k dtsi
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
