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118,807 commits

Author SHA1 Message Date
Mahesh Mahadevan
76b6e6b1d7 MAINTAINERS: Update maintainer for release notes
Update to the 4.1 Release managers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-11-21 09:14:29 +01:00
Volodymyr Fialko
0d66091cce riscv: pmp: don't reconfigure modes
Previously PMP was avaible only with Multithreading, since it's now
available without MT - add extra checks to prevent user/kernel mode
reconfiguration.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-20 16:04:15 -05:00
Lucien Zhao
850d471b95 boards: nxp: mimxrt1180_evk: add flexspi1 support
USE_HYPERRAM macro defined shouldn't be placed under
CONFIG_BOOT_FLEXSPI_NOR.

Add flexspi1 pinmux pinctrl and flash partitions

Add flash partitions and correct flash parameter.

This commit was tested with samples: flash_shell on cm33/cm7 cores

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-20 16:00:02 -05:00
Lucien Zhao
6463dd610d drivers: clock_control:: Update ccm_rev2 clock driver for RT118X
flexspi_clock_set_freq can be applied for RT118X series.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-20 16:00:02 -05:00
Lucien Zhao
bfc607e38d dts: arm: nxp: rt118x: add flexspi instance support
add flexspi2 and rename flexspi1 to flexspi to adapt
flexspi.c driver under soc/nxp/rt118x folder.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-20 16:00:02 -05:00
Lucien Zhao
a8f5958c78 soc: nxp: imxrt: imxrt118x: add flexspi support
add flexspi.c file to get flexspi clock rate.

Enable flexspi1 clock if don't boot from flash.

Use custom fixed mpu_regions.c file to config MPU for CM7

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-20 16:00:02 -05:00
Federico Di Gregorio
1f5a1b50fa boards: opta: ADC support
A valid device tree configuration is provided for the ADCs of the 8 input
channels and the sample adc_dt works out of the box. Obviously this is
not the only possible configuration but it provides a good template for
further customization without the need to lookup the ADC GPIOs and
connections in the schematics.

Signed-off-by: Federico Di Gregorio <fog@dndg.it>
2024-11-20 15:59:53 -05:00
Federico Di Gregorio
f8ab959d7e boards: opta: RS485 support
This set of changes enables the RS485 hardware connected to usart3 and
provides some overlays that allow for easily running the modbus
rtu_client and rtu_server samples on Opta.

Signed-off-by: Federico Di Gregorio <fog@dndg.it>
2024-11-20 15:59:53 -05:00
Federico Di Gregorio
32309f8124 boards: opta: device tree cleanup
Some changes to cleanup and clarify some device tree nodes:

* removed wrong sdram2 definition
* added all internal flash slots accessible from M4
* added all internal flash slots accessible from M7
* removed CONFIG_UART_LINE_CTRL because not needed by USB CDC ACM

Signed-off-by: Federico Di Gregorio <fog@dndg.it>
2024-11-20 15:59:53 -05:00
Federico Di Gregorio
cf45ab85d2 boards: opta: ethernet reorganization
This set of changes reorganize the ethernet configuration by removing the
use a regulator to enable the PHY: the correct GPIO pin is set in code
only if the network has been configured via CONFIG_NET_L2_ETHERNET.

Signed-off-by: Federico Di Gregorio <fog@dndg.it>
2024-11-20 15:59:53 -05:00
Valerio Setti
516886be1b mbedtls: MBEDTLS_ENTROPY_POLL_ZEPHYR default on if MBEDTLS_ENTROPY_C
As long as MBEDTLS_ENTROPY_C is enabled, Mbed TLS needs to
poll some entropy source to gather data that will then be
processed by CTR/HMAC-DRBG modules. This means that in most
of the cases, once MBEDTLS_ENTROPY_C is enabled then also
MBEDTLS_ENTROPY_POLL_ZEPHYR needs to be enabled. This was
done manually until now, as the long list of samples/tests
demonstrate.

This commit solves this dependency by defaulting
MBEDTLS_ENTROPY_POLL_ZEPHYR to on as soon as
MBEDTLS_ENTROPY_C is set. As a consequence, all manual
enablement of MBEDTLS_ENTROPY_POLL_ZEPHYR in samples/tests
are removed.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2024-11-20 15:59:40 -05:00
Valerio Setti
08bd9c72bd mbedtls: use CSPRNG whenever possible as PSA random source
The main problem of MBEDTLS_PSA_CRYPTO_LEGACY_RNG is that it
brings in some legacy modules (entropy + ctr_drbg/hmac_drbg)
which means extra ROM/RAM footprint.
MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG instead simply calls to the
CSPRNG which makes it definitely smaller.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2024-11-20 15:59:40 -05:00
Valerio Setti
ac6d834272 mbedtls: auto-select MBEDTLS_CIPHER_AES_ENABLED when built-in in PSA
Auto-select MBEDTLS_CIPHER_AES_ENABLED when AES support is requested
through PSA (i.e. CONFIG_PSA_WANT_KEY_TYPE_AES) and the PSA support is
provided through Mbed TLS itself (i.e. CONFIG_MBEDTLS_PSA_CRYPTO_C).

This mimic what happens in Mbed TLS at build time: if AES support
is required through PSA, but there's no one else providing it
(i.e. no TF-M in Zephyr) then provide this support through legacy
AES module.

This is useful in samples/tests so that the user can simply use the
PSA_WANT symbol to ask for AES support in PSA crypto and then tune
the AES features (ex: CONFIG_MBEDTLS_AES_ROM_TABLES) without the need
to also define CONFIG_MBEDTLS_CIPHER_AES_ENABLED.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2024-11-20 15:59:40 -05:00
Tarang Raval
31eee15fcd dts: arm: rpi_pico: remove #define from dts
Removing direct #define usage in the DTSI file and converting these
definitions to use a dt-bindings header instead.

Relocates the RPI_PICO_DEFAULT_IRQ_PRIORITY definition to a DTSI file and
introduces an override.dtsi file. The override file is used when no other
override file is present, allowing for better flexibility and compliance
with Zephyr’s DTS structure.

Fixes: #79719

Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
2024-11-20 15:59:03 -05:00
Declan Snyder
9863dc9fd8 drivers: nxp_enet: Add get_config for ipv6 chksum
Previously, ipv6 being disabled was a dependency of the hw acceleration
of the checksums for the nxp enet driver, because this ethernet has an
errata causing icmpv6 checksum to not be supported. Now, there is a new
config type in ethernet api for checksum types, so we can re-enable
hardware acceleration for ipv6 by implementing this type in the
get_config api in this driver.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-11-20 15:58:47 -05:00
Marvin Ouma
91749dfeb3 tests: posix: common: separate posix xsi streams to standalone test
posix.common contains testsuites that can be separated into smaller
groups of tests. This change moves stropts into a singular
testsuite at tests/posix/xsi_streams app directory.

Signed-off-by: Marvin Ouma <pancakesdeath@protonmail.com>
2024-11-20 15:58:26 -05:00
Daniel Leung
55ad66a30c tests: ztest/base: fix incorrect userspace filtering
The filter here should be used to filter for capability:
whether the platform configuration supports userspace. And if
it does support userspace, we then enable CONFIG_TEST_USERSPACE
(and thus CONFIG_USERSPACE) for testing. We should not be
filtering for whether userspace is enabled, but should really
be filtering for whether userspace is supported.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-11-20 15:58:15 -05:00
Daniel Leung
df4883ad23 tests: thread_error_case: fix incorrect userspace filtering
The filter here should be used to filter for capability:
whether the platform configuration supports userspace. And if
it does support userspace, we then enable CONFIG_TEST_USERSPACE
(and thus CONFIG_USERSPACE) for testing. We should not be
filtering for whether userspace is enabled, but should really
be filtering for whether userspace is supported.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-11-20 15:58:15 -05:00
Marek Matej
98d0a2bb34 soc: espressif: esp32c6 split cached area
Split the cached area and assign both parts IROM and DROM meaning. This
is necessary to overcome the esptool section merging issues.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-11-20 15:58:07 -05:00
James Roy
aeaf32aada stm32: Fix wrong binding target for RTC_SEL in stm32u0
Change the stm32u0 clock from CSR_REG to BDCR_REG.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2024-11-20 15:57:52 -05:00
Marcin Niestroj
538753d51b boards: st: nucleo_h533re: configure SPI on Arduino headers
This allows to use the board right away with samples and shields depending
on Arduino SPI.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-11-20 15:57:34 -05:00
Martin Stumpf
50509c34cc lvgl: Flush thread can have preemptive priority
The LVGL flush thread was hard-coded to be cooperative.
For long-running actions like data transfer to the display,
this is problematic as it might block high-frequency actions like
USB or input events.

Hence, make it configurable to be preemptive, and rename it to match the
similar Kconfig values like CONFIG_SDL_THREAD_PRIORITY.

Signed-off-by: Martin Stumpf <finomnis@gmail.com>
2024-11-20 15:57:21 -05:00
Chaitanya Tata
0f1f01f9f4 net: l2: wifi: Fix the minimum value
802.11 doesn't have specific constraints, it just says that listen
interval should be >=0 and it a 2 byte field.

3 as a typical DTIM value from nRF chipsets, so, remove the hardware
specific line and just set a failure.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-11-20 15:57:06 -05:00
Chaitanya Tata
c5585af4c4 wifi: Add units to listen interval
Listen interval as per 802.11 has units as "beacon intervals" i.e., 1
means 1 beacon interval duration (or short beacon interval duration if
short beacon is enabled).

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-11-20 15:57:06 -05:00
Dhruv Menon
e6ea761cd7 doc: nxp: Update image of mimxrt1062_fmurt6
The prior image was of poor quality, making it difficult to interpret.
Updated the image with a higher-quality version.

Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
2024-11-20 15:56:55 -05:00
Alberto Escolar Piedras
f79d879d50 tests: Thread-Metric: Fix filter description
Correct the description of why we exclude the POSIX arch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-11-20 15:56:16 -05:00
Anas Nashif
c1b8cd7db1 ci: twister_prep: do not double check for event
We already do the check for the job.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-20 15:53:58 -05:00
Anas Nashif
5b51632103 ci: twister: fix setting of output for workflow_call
Fix setting of output variables of workflow_call.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-20 15:53:58 -05:00
Anas Nashif
0c88010d0d Reapply "ci: twister: use workflow_call for prep job"
This reverts commit fd4c7bbbc2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-20 15:53:58 -05:00
Anas Nashif
dc14a212eb ci: twister: check event using correct context
Check for event using correct github context.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-20 15:53:58 -05:00
Yong Cong Sin
6843240196 drivers: intc: plic: use per-instance spinlock
Instead of doing an `irq_lock()`, use per-instance spinlock instead.

Refactored out an unlocked version of `local_irq_is_enabled`
from `riscv_plic_irq_is_enabled()` to achieve that.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-11-20 08:26:02 -05:00
Volodymyr Fialko
1310856348 tests: riscv: test PMP stack guards
Test if PMP protected regions prevents write access.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
2024-11-20 08:25:49 -05:00
Volodymyr Fialko
9eee2eaee6 riscv: pmp: enable stackguard without multithreading
Without multithreading only two stacks present: ISR and main.
As any stack they also could overflow, so it make sense to add stack
guard for them also.

Remove stack guard dependency on multithreading and mark
`Z_RISCV_STACK_GUARD_SIZE` bytes at the beginning of stack as read-only
region with PMP entry.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
2024-11-20 08:25:49 -05:00
Noemie Gillet
2253a26c10 drivers: nsos: support for AF_PACKET
Handle AF_PACKET family.

Signed-off-by: Noemie Gillet <ngillet@sequans.com>
2024-11-20 08:24:08 -05:00
Noemie Gillet
10bb61ee7d drivers: nsos: support for AF_UNIX
Handle AF_UNIX family sockets for NSOS offloaded driver
Note that the size of struct sockaddr_un is done conditionnaly based on
CONFIG_NET_NATIVE_OFFLOADED_SOCKETS
Also, NET_SOCKADDR_PTR_MAX_SIZE needs to be updated only if
CONFIG_NET_SOCKETS_PACKET is not set. Otherwise, for a AF_PACKET socket,
a struct net_context variable can be corrupted, as local would have be on
16 bytes instead of 20 bytes.

Signed-off-by: Noemie Gillet <ngillet@sequans.com>
2024-11-20 08:24:08 -05:00
cyliang tw
355d032baa boards: nuvoton: numaker: Drop PINCTRL from board defconfig
To remove CONFIG_PINCTRL from board side for numaker boards.
The Drivers using Pinctrl should be turning Pinctrl on
instead of the responsibility of the board.

Fixes #78619

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2024-11-20 08:23:58 -05:00
Andi Gerl
9c2421444b net: lwm2m: add set_socketoptions cb to pull context LwM2M context
The pull context LwM2M client's set_socketoptions callback is currently
unused and can't be set by a user. Add a public API to set the
pull context's client's set_socketoptions callback.

Signed-off-by: Andi Gerl <andi.gerl@exacttechnology.com>
2024-11-20 08:23:44 -05:00
Jerzy Kasenberg
e6c9e9a2dd i2c: target: eeprom_target: Fix buffer write
When larger buffer index was introduced only function:
eeprom_target_write_received() was updated to handle
address-width = 16

This adds the same functionality when buffered API is used,
enabled by CONFIG_I2C_TARGET_BUFFER_MODE.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-11-20 08:23:37 -05:00
Mahesh Mahadevan
2894c765a2 github: Update security page for v4.0.0 release
Updates the GitHub security page with the current supported versions
after the v4.0.0 release.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-11-20 08:23:14 -05:00
Anas Nashif
1c596b8b77 boards: mps3_corstone300_fvp_ns: disable twister
Disable board temporarily as it fetches code from external repositories.

Related issue #81656

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-20 08:22:52 -05:00
Guennadi Liakhovetski
cbb6199e67 LLEXT: no repeated linking with inline relocations
When linking and relocations are performed on the ELF object itself
with no copying, also global binding linking can break references.
Disable linking globally for such cases.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-11-20 10:17:06 +00:00
Guennadi Liakhovetski
827909b7b9 LLEXT: Xtensa: don't generate FLIX commands
The LLEXT linker for Xtensa cannot relocate FLIX commands, disable
them in extensions only until we have a solution. Note, that this
only affects extensions, the main Zephyr binary is still built with
FLIX commands.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-11-20 10:17:06 +00:00
Mara Furland
30fa48558e boards: qorvo: add DWM3001CDK support
Add support for the decawave DWM3001C board from qorvo

Signed-off-by: Mara Furland <mara@fur.land>
2024-11-20 10:16:58 +00:00
Lingao Meng
6d6d4565d3 kernel: workq: Fix function format to avoid CI Warning
formating

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2024-11-20 10:15:20 +00:00
Lingao Meng
836fa88cbd kernel: work: Add missing ASSERT for args
Add missing ASSERT for dwork & queue.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2024-11-20 10:15:20 +00:00
Lingao Meng
2a3b28a3f5 kernel: work: Remove meanless foreach for work
Since call this function both in
```C
	k_spinlock_key_t key = k_spin_lock(&lock);

	bool need_flush = work_flush_locked(work, flusher);

	k_spin_unlock(&lock, key);
```

So, there are no flag_get change.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2024-11-20 10:15:20 +00:00
Jakub Wasilewski
8e881959a4 boards: hifive_unmatched: add support for S7 and U74 targets
Add `hifive_unmatched//s7` (earlier selected by default, using
`hifive_unmatched`) and `hifive_unmatched//u74` targets.

Define work-area for other 4 cores in openocd.cfg

Update twister platform white/black lists, to support new targets

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
Jakub Wasilewski
2423c87d54 boards: hifive_unleashed: add support for E51 and U54 targets
Add `hifive_unleashed//e51` (earlier selected by default, using
`hifive_unleashed`) and `hifive_unleashed//u54` targets.

Define work-area for other 4 cores in openocd.cfg

Update twister platform white/black lists, to support new targets

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
Jakub Wasilewski
84434ba006 arch: riscv: add Kconfig option for imprecise FPU state tracking
According to the RISC-V Instruction Set Manual: Volume II, Version 20240411
(Section 3.1.6.6), some implementations may choose to track the dirtiness
of the floating-point register state imprecisely by reporting the state to
be dirty even when it has not been modified. This option reflects that.

Also add a filter in `tests/arch/riscv/fpu_sharing/` based on imprecise
FPU state tracking

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
Jakub Wasilewski
939e94076d boards: hifive_unleashed: switch zephyr SRAM region from DDR to L2LIM
Switch from `ram0` to `l2lim` in `zephyr, sram` in board DTS

Add `l2lim` in `support/hifive_unleashed.resc` and targets l2lim
as a work-area in `openocd_hifive_unleashed.cfg`

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00