Commit graph

56,286 commits

Author SHA1 Message Date
Erwin Rol
c792db6b32 drivers: ethernet: stm32: add name to rx thread
Give a name to the rx thread so it can be more easily identified
in tracers like SystemView.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2020-08-17 13:37:24 -04:00
Gerson Fernando Budke
36f2d64f73 boards: shields: atmel_rf2xx: Improve documentation
Removes redundancy on atmel_rf2xx.overlay message. Clarifies supported
variations section and notes about network on index.rst.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-08-17 13:36:29 -04:00
Rihards Skuja
4bd247af70 net: bt: fix C++ link errors
Signed-off-by: Rihards Skuja <rihardssk@mikrotik.com>
2020-08-17 10:45:03 +03:00
David Leach
85cad85077 tests: kernel: Fix coverity warning CIDs 211474 and 211479
Added assert tests around two of the k_mutex_locks() that
did not have them.

Fixes #26997
Fixes #26998

Signed-off-by: David Leach <david.leach@nxp.com>
2020-08-16 09:29:41 -04:00
David Leach
1ab90044f2 kernel/timeout: Fix coverity warning CID 211045
The dticks field was changed from a signed to an unsigned
value so now the assert test to ensure it isn't negative
is no longer needed.

fixes #26355

Signed-off-by: David Leach <david.leach@nxp.com>
2020-08-16 09:29:41 -04:00
David Leach
c5f3da22ae tests: net: Fixes coverity issue CID 210552
Function scope of 'socket' was not closed before exiting
the function.

Fixes #25792

Signed-off-by: David Leach <david.leach@nxp.com>
2020-08-16 09:29:41 -04:00
David Leach
c16711c7e6 tests: net: Fix coverity issue CID 211047
Assert check that the net_ipv6_nbr_lookup() did  not return NULL

fixes #26359

Signed-off-by: David Leach <david.leach@nxp.com>
2020-08-16 09:29:41 -04:00
David Leach
90c113b4df tests: settings: Fix coverity issue CID 211044
Check the return value of settings_subsys_init() call.

Fixes #26358

Signed-off-by: David Leach <david.leach@nxp.com>
2020-08-16 09:29:41 -04:00
Anas Nashif
e927f62c21 drivers: mcux_iuart: use new device structure member names
device structure members were renamed, update driver to use new names.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-15 11:54:58 -04:00
Christian Taedcke
819f4e00e6 logging: net: Modify ipv4 init code, so it compiles if ipv4 is disabled
In the function do_net_init() the paths for ipv6 and ipv4 now use the
same api to determine the source address.

Fixes #27428

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-08-14 18:51:28 -04:00
Christian Taedcke
61415581a5 samples: net: syslog: Add configs for ipv4- and ipv6-only
This checks if the net logger backend compiles if either ipv4 or ipv6 is
enabled.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-08-14 18:51:28 -04:00
Parthiban Nallathambi
352e2a7ad4 drivers: wifi: eswifi: Coverity fix
Fix https://github.com/zephyrproject-rtos/zephyr/issues/27325
unchecked return value

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-08-14 18:50:17 -04:00
Anas Nashif
74f4891a8f requirements: add anytree
Needed now by both ram and rom report targets.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-14 18:49:26 -04:00
Anas Nashif
239d175eff scripts: size_report: fix path prepending
Fixes potential issue on windows.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-14 18:49:26 -04:00
Anas Nashif
f420c7bb8d cmake: generate json file for ram/rom reports
Create a json file from the output of ram/rom report targets.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-14 18:49:26 -04:00
Anas Nashif
ac215a570c size_report: use anytree
Use anytree module to display tree and to allow easy exporting into
json.
Add option to export results into a json file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-14 18:49:26 -04:00
Manivannan Sadhasivam
79a62a4f47 CODEOWNERS: Add myself as the codeowner for imx8m evk and uart driver
Add myself as the codeowner for imx8m evk and uart driver.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
708ae15bc5 west: Update NXP HAL
Update NXP HAL to use the i.MX8M SDK support.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
bf44740e30 boards: arm: Add NXP i.MX8M Mini EVK board support
Add board support for NXP i.MX8M Mini EVK. This board has the following
features:

Processor    : i.MX8M Mini Quad applications processor
Memory       : 32-bit LPDDR4 w/2 GB
               eMMC 5.0/5.1 w/16 GB
               SD/MMC connector
               QSPI w/32 MB
Connectivity : MIMO 1x1 Wi-Fi 802.11a/b/g/n/ac and BT4.1
               Ethernet
               PCIe M.2
USB          : 2x USB 3.0 Type C
Debug        : JTAG connector
               MicroUSB for debug console

More information about this board can be found in NXP website: https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/evaluation-kit-for-thebr-i.mx-8m-mini-applications-processor:8MMINILPD4-EVK

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
1118428abb drivers: clock_control: Add support for MCUX CCM IUART clock
Add support for controlling the MCUX CCM IUART clock.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
0533d4eae1 drivers: serial: Add NXP IUART driver
Add IUART driver based on MCUX SDK. This driver is used to provide
serial console support on i.MX8M Mini SoC.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
2aae0b7b5b soc: arm: nxp_imx: Add i.MX8M Mini SoC support
Add SoC support for the NXP i.MX8M Mini series MIMX8MM6 SoC. This SoC
has a quad Cortex-A53 cluster and a single core Cortex-M4 core. Zephyr
support is added to the Cortex-M4 core for running at 800MHz.

More information about the SoC can be found here: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i.mx-applications-processors/i.mx-8-processors/i.mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
8ab4d7d53e dts: arm: nxp: Add i.MX8M Mini devicetree support
Add devicetree support for NXP i.MX8M Mini SoC for utilizing cortex M4
core.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Manivannan Sadhasivam
75449602bc modules: Add RDC module for MCUX family
RDC module is used by i.MX8MM SoC, so let's create a Kconfig symbol
which will be used to enable the module in SDK.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Meng xianglin
21638f054f test: fs: Test cases for file system interfaces
Focus on file system interfaces implemented in file system core,
not specific file system.

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2020-08-14 15:44:06 -04:00
Henrik Brix Andersen
80a3c8c763 tests: arch: arm: irq_advanced_features: add support for Arty Cortex-M1
Add support for the Cortex-M1 ARM DesignStart FPGA reference design
running on the Digilent Arty development board.

This board uses IRQ 7 (the last IRQ) as a level-detect non-interrupt
signal to determine whether the V2C-DAPLINK shield is installed. This
IRQ line is always pending when the shield is not installed. Use IRQ 6
instead.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
75713c39a1 boards: arm: arty: add board definition Cortex-M1 on the Digilent Arty
Add board definition for the ARM DesignStart FPGA Cortex-M1 reference
design on the Digilent Arty FPGA development board.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
6ac911d585 drivers: gpio: add driver for the Xilinx AXI GPIO IP
Add driver for the Xilinx AXI GPIO v2 IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
d8b5a81c67 dts: bindings: gpio: add bindings for Xilinx AXI GPIO IP
Add devicetree bindings for the Xilinx AXI GPIO v2 IP. This GPIO
controller has an optional "GPIO2" port, which is not always present.

The Xilinx specific devicetree property names and their meaning match a
subset of what can automatically be generated based on the FPGA logic
design using https://github.com/Xilinx/device-tree-xlnx. These
properties are also used by the Linux kernel.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
1cde72a35d drivers: serial: add driver for the Xilinx UART Lite IP
Add serial driver for the Xilinx UART Lite IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
a3758eceae dts: bindings: serial: add devicetree binding for the Xilinx UART Lite IP
Add devicetree binding for the Xilinx UART Lite IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
8c8d2d4b40 dts: bindings: arm: itcm: add devicetree binding the ARM ITCM
Add devicetree binding for the ARM Cortex-M Instruction Tightly Coupled
Memory (ITCM).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
12205abd53 dts: bindings: arm: dtcm: ARM DTCM is not Cortex-M7 specific
Change the documentation for the arm,dtcm (Data Tightly Coupled Memory)
to reflect that it is not specific to the Cortex-M7 (but also present
on e.g. the Cortex-M1).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
f9aee9f8dc soc: arm: add Cortex-M1 ARM DesignStart FPGA SoC support
Add support for the Cortex-M1 ARM DesignStart FPGA SoC. This is not an
SoC in the traditional sense but more of a base to build an SoC upon.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
7d49a73f0e tests: kernel: context: add ARM Cortex-M1 support
The Wait For Interrupt (WFI) instruction ARM Cortex-M1 CPU does not
operate as a powersave instruction. It is always executed as a NOP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
7c2ef1b3c8 tests: arch: arm: ramfunc: add support for the Arty Cortex-M1 board
The Data Tightly Coupled Memory (DTCM) of the Cortex-M1 present in the
Cortex-M1 ARM DesignStart FPGA implementation is No-Execute (NX), so
__ramfunc linked in the DTCM will cause a hard fault when executed.

Use the Xilinx Block RAM (bram0) present in the reference design for
demonstrating __ramfunc instead.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
7675c4ff50 tests: arch: arm: no_multithreading: check that irq is not always pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
6984f15d46 tests: arch: arm: interrupt: check that irq is not always pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
a115e44246 tests: kernel: interrupt: check that irq is not constantly pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
f04f2e4278 tests: kernel: interrupt: add support for the ARM Cortex-M1
Add support for the ARM Cortex-M1 CPU to the kernel interrupt test case.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
e7f51fa918 arch: arm: aarch32: add support for Cortex-M1
Add support for the ARM Cortex-M1 CPU.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
8acd7966af cmake: gcc: add support for compiling for the ARM Cortex-M1
Add support for compiling for the ARM Cortex-M1 CPU via GCC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
661f2d49f2 dts: bindings: add devicetree binding for the ARM Cortex-M1 CPU
Add devicetree binding for the ARM Cortex-M1 CPU.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Greg Leach
e44f04d4f9 boards: Add BT510 support
Add support for the Laird Connectivity BT510 sensor

Signed-off-by: Greg Leach <greg.leach@lairdconnect.com>
2020-08-14 12:58:03 -05:00
Jukka Rissanen
13c8b110e5 net: socketpair: Check NULL value
When verifying the parameters check NULL value separately.
This will avoid nasty warning message to be printed.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-08-14 09:47:51 -07:00
Jukka Rissanen
a5f4b44ab8 tests: net: socketpair: Fix debug logging
Only one LOG_MODULE_REGISTER() is allowed in the files that are
linked together. The other files must use LOG_MODULE_DECLARE()

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-08-14 09:47:51 -07:00
Jukka Rissanen
d0d041d833 net: getsockname: Call via vtable instead of ioctl
Add function pointer to vtable and use that directly instead of
routing via ioctl() call. This is done as we are trying to get
rid of ioctl() calls in the system.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-08-14 09:47:51 -07:00
Jukka Rissanen
2ed6b6a8ed lib: fdtable: Add callback for close() calls
Do not route close() calls via ioctl() as that is error prone
and quite pointless. Instead create a callback for close() in
fdtable and use it directly.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-08-14 09:47:51 -07:00
Alexandre Bourdiol
4f34d90c8c tests: drivers: gpio: gpio_basic_api: add some STM32 boards overlay
Add overlay for boards:
* nucleo_f429zi
* nucleo_g474re
* nucleo_l152re
* nucleo_l4r5zi
* stm32f3_disco
* nucleo_f091rc
* nucleo_l073rz

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-08-14 18:07:06 +02:00
Richard Osterloh
702e8d0a31 drivers: pinmux: Fix NSS definitions for SPI
Complete hardware NSS multiplexing definitions for SPI

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2020-08-14 18:02:28 +02:00