drivers: serial: Add NXP IUART driver
Add IUART driver based on MCUX SDK. This driver is used to provide serial console support on i.MX8M Mini SoC. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
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6 changed files with 376 additions and 0 deletions
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@ -13,6 +13,7 @@ zephyr_library_sources_ifdef(CONFIG_LEUART_GECKO leuart_gecko.c)
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zephyr_library_sources_ifdef(CONFIG_UART_LPC11U6X uart_lpc11u6x.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX uart_mcux.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_FLEXCOMM uart_mcux_flexcomm.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_IUART uart_mcux_iuart.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPUART uart_mcux_lpuart.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPSCI uart_mcux_lpsci.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MIV uart_miv.c)
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@ -70,6 +70,8 @@ source "drivers/serial/Kconfig.mcux"
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source "drivers/serial/Kconfig.mcux_flexcomm"
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source "drivers/serial/Kconfig.mcux_iuart"
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source "drivers/serial/Kconfig.mcux_lpsci"
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source "drivers/serial/Kconfig.mcux_lpuart"
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12
drivers/serial/Kconfig.mcux_iuart
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12
drivers/serial/Kconfig.mcux_iuart
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@ -0,0 +1,12 @@
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# MCUXpresso SDK IUART
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# Copyright (c) 2020, Manivannan Sadhasivam <mani@kernel.org>
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# SPDX-License-Identifier: Apache-2.0
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config UART_MCUX_IUART
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bool "MCUX IUART driver"
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depends on HAS_MCUX && CLOCK_CONTROL
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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help
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Enable the MCUX IUART driver.
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332
drivers/serial/uart_mcux_iuart.c
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332
drivers/serial/uart_mcux_iuart.c
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@ -0,0 +1,332 @@
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/*
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* Copyright (c) 2019, Manivannan Sadhasivam <mani@kernel.org>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_imx_iuart
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#include <device.h>
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#include <drivers/uart.h>
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#include <drivers/clock_control.h>
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#include <errno.h>
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#include <fsl_uart.h>
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#include <soc.h>
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struct mcux_iuart_config {
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UART_Type *base;
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const char *clock_name;
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clock_control_subsys_t clock_subsys;
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uint32_t baud_rate;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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void (*irq_config_func)(struct device *dev);
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#endif
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};
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struct mcux_iuart_data {
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t callback;
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void *cb_data;
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#endif
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};
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#define DEV_CFG(dev) \
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((const struct mcux_iuart_config * const)(dev)->config_info)
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static int mcux_iuart_poll_in(struct device *dev, unsigned char *c)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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int ret = -1;
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if (UART_GetStatusFlag(config->base, kUART_RxDataReadyFlag)) {
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*c = UART_ReadByte(config->base);
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ret = 0;
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}
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return ret;
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}
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static void mcux_iuart_poll_out(struct device *dev, unsigned char c)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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while (!(UART_GetStatusFlag(config->base, kUART_TxReadyFlag))) {
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}
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UART_WriteByte(config->base, c);
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}
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static int mcux_iuart_err_check(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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int err = 0;
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if (UART_GetStatusFlag(config->base, kUART_RxOverrunFlag)) {
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err |= UART_ERROR_OVERRUN;
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UART_ClearStatusFlag(config->base, kUART_RxOverrunFlag);
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}
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if (UART_GetStatusFlag(config->base, kUART_ParityErrorFlag)) {
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err |= UART_ERROR_PARITY;
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UART_ClearStatusFlag(config->base, kUART_ParityErrorFlag);
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}
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if (UART_GetStatusFlag(config->base, kUART_FrameErrorFlag)) {
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err |= UART_ERROR_FRAMING;
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UART_ClearStatusFlag(config->base, kUART_FrameErrorFlag);
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}
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return err;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int mcux_iuart_fifo_fill(struct device *dev, const uint8_t *tx_data,
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int len)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint8_t num_tx = 0U;
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while ((len - num_tx > 0) &&
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(UART_GetStatusFlag(config->base, kUART_TxEmptyFlag))) {
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UART_WriteByte(config->base, tx_data[num_tx++]);
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}
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return num_tx;
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}
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static int mcux_iuart_fifo_read(struct device *dev, uint8_t *rx_data,
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const int len)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint8_t num_rx = 0U;
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while ((len - num_rx > 0) &&
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(UART_GetStatusFlag(config->base, kUART_RxDataReadyFlag))) {
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rx_data[num_rx++] = UART_ReadByte(config->base);
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}
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return num_rx;
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}
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static void mcux_iuart_irq_tx_enable(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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UART_EnableInterrupts(config->base, kUART_TxEmptyEnable);
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}
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static void mcux_iuart_irq_tx_disable(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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UART_DisableInterrupts(config->base, kUART_TxEmptyEnable);
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}
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static int mcux_iuart_irq_tx_complete(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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return (UART_GetStatusFlag(config->base, kUART_TxEmptyFlag)) != 0U;
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}
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static int mcux_iuart_irq_tx_ready(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint32_t mask = kUART_TxEmptyEnable;
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return (UART_GetEnabledInterrupts(config->base) & mask)
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&& mcux_iuart_irq_tx_complete(dev);
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}
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static void mcux_iuart_irq_rx_enable(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint32_t mask = kUART_RxDataReadyEnable;
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UART_EnableInterrupts(config->base, mask);
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}
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static void mcux_iuart_irq_rx_disable(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint32_t mask = kUART_RxDataReadyEnable;
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UART_DisableInterrupts(config->base, mask);
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}
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static int mcux_iuart_irq_rx_full(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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return (UART_GetStatusFlag(config->base, kUART_RxDataReadyFlag)) != 0U;
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}
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static int mcux_iuart_irq_rx_ready(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint32_t mask = kUART_RxDataReadyEnable;
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return (UART_GetEnabledInterrupts(config->base) & mask)
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&& mcux_iuart_irq_rx_full(dev);
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}
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static void mcux_iuart_irq_err_enable(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint32_t mask = kUART_RxOverrunEnable | kUART_ParityErrorEnable |
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kUART_FrameErrorEnable;
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UART_EnableInterrupts(config->base, mask);
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}
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static void mcux_iuart_irq_err_disable(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uint32_t mask = kUART_RxOverrunEnable | kUART_ParityErrorEnable |
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kUART_FrameErrorEnable;
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UART_DisableInterrupts(config->base, mask);
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}
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static int mcux_iuart_irq_is_pending(struct device *dev)
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{
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return mcux_iuart_irq_tx_ready(dev) || mcux_iuart_irq_rx_ready(dev);
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}
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static int mcux_iuart_irq_update(struct device *dev)
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{
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return 1;
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}
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static void mcux_iuart_irq_callback_set(struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct mcux_iuart_data *data = dev->driver_data;
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data->callback = cb;
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data->cb_data = cb_data;
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}
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static void mcux_iuart_isr(void *arg)
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{
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struct device *dev = arg;
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struct mcux_iuart_data *data = dev->driver_data;
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if (data->callback) {
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data->callback(dev, data->cb_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static int mcux_iuart_init(struct device *dev)
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{
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const struct mcux_iuart_config *config = DEV_CFG(dev);
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uart_config_t uart_config;
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struct device *clock_dev;
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uint32_t clock_freq;
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clock_dev = device_get_binding(config->clock_name);
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if (clock_dev == NULL) {
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return -EINVAL;
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}
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if (clock_control_get_rate(clock_dev, config->clock_subsys,
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&clock_freq)) {
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return -EINVAL;
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}
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UART_GetDefaultConfig(&uart_config);
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uart_config.enableTx = true;
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uart_config.enableRx = true;
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uart_config.baudRate_Bps = config->baud_rate;
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UART_Init(config->base, &uart_config, clock_freq);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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config->irq_config_func(dev);
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#endif
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return 0;
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}
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static const struct uart_driver_api mcux_iuart_driver_api = {
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.poll_in = mcux_iuart_poll_in,
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.poll_out = mcux_iuart_poll_out,
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.err_check = mcux_iuart_err_check,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = mcux_iuart_fifo_fill,
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.fifo_read = mcux_iuart_fifo_read,
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.irq_tx_enable = mcux_iuart_irq_tx_enable,
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.irq_tx_disable = mcux_iuart_irq_tx_disable,
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.irq_tx_complete = mcux_iuart_irq_tx_complete,
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.irq_tx_ready = mcux_iuart_irq_tx_ready,
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.irq_rx_enable = mcux_iuart_irq_rx_enable,
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.irq_rx_disable = mcux_iuart_irq_rx_disable,
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.irq_rx_ready = mcux_iuart_irq_rx_ready,
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.irq_err_enable = mcux_iuart_irq_err_enable,
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.irq_err_disable = mcux_iuart_irq_err_disable,
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.irq_is_pending = mcux_iuart_irq_is_pending,
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.irq_update = mcux_iuart_irq_update,
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.irq_callback_set = mcux_iuart_irq_callback_set,
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#endif
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};
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#define MCUX_IUART_IRQ_INIT(n, i) \
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do { \
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, i, irq), \
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DT_INST_IRQ_BY_IDX(n, i, priority), \
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mcux_iuart_isr, DEVICE_GET(uart_##n), 0); \
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\
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irq_enable(DT_INST_IRQ_BY_IDX(n, i, irq)); \
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} while (0)
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#define IUART_MCUX_CONFIG_FUNC(n) \
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static void mcux_iuart_config_func_##n(struct device *dev) \
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{ \
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MCUX_IUART_IRQ_INIT(n, 0); \
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\
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IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 1), \
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(MCUX_IUART_IRQ_INIT(n, 1);)) \
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}
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#define IUART_MCUX_IRQ_CFG_FUNC_INIT(n) \
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.irq_config_func = mcux_iuart_config_func_##n
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#define IUART_MCUX_INIT_CFG(n) \
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IUART_MCUX_DECLARE_CFG(n, IUART_MCUX_IRQ_CFG_FUNC_INIT(n))
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#else
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#define IUART_MCUX_CONFIG_FUNC(n)
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#define IUART_MCUX_IRQ_CFG_FUNC_INIT
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#define IUART_MCUX_INIT_CFG(n) \
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IUART_MCUX_DECLARE_CFG(n, IUART_MCUX_IRQ_CFG_FUNC_INIT)
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#endif
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#define IUART_MCUX_DECLARE_CFG(n, IRQ_FUNC_INIT) \
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static const struct mcux_iuart_config mcux_iuart_##n##_config = { \
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.base = (UART_Type *) DT_INST_REG_ADDR(n), \
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.clock_name = DT_INST_CLOCKS_LABEL(n), \
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.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
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.baud_rate = DT_INST_PROP(n, current_speed), \
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IRQ_FUNC_INIT \
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}
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#define IUART_MCUX_INIT(n) \
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\
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static struct mcux_iuart_data mcux_iuart_##n##_data; \
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\
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static const struct mcux_iuart_config mcux_iuart_##n##_config;\
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\
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DEVICE_AND_API_INIT(uart_##n, DT_INST_LABEL(n), \
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&mcux_iuart_init, \
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&mcux_iuart_##n##_data, \
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&mcux_iuart_##n##_config, \
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PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&mcux_iuart_driver_api); \
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\
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IUART_MCUX_CONFIG_FUNC(n) \
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\
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IUART_MCUX_INIT_CFG(n);
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DT_INST_FOREACH_STATUS_OKAY(IUART_MCUX_INIT)
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@ -66,6 +66,19 @@
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label = "CCM";
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#clock-cells = <3>;
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};
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/*
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* For now only UART4 is supported and
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* tested with the serial driver
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*/
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uart4: uart@30a60000 {
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compatible = "nxp,imx-iuart";
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reg = <0x30a60000 0x10000>;
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interrupts = <29 3>;
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clocks = <&ccm IMX_CCM_UART_CLK 0x6c 24>;
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label = "UART_4";
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status = "disabled";
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};
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};
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};
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16
dts/bindings/serial/nxp,imx-iuart.yaml
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16
dts/bindings/serial/nxp,imx-iuart.yaml
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description: >
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This binding gives a base representation of the NXP iMX IUART
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compatible: "nxp,imx-iuart"
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include: uart-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: false
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clocks:
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required: true
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