Instead of busy wait until completed transaction, the constraint set
is used before enabling tx interrupt to not allow system to enter
suspend when tx is transmitting.
Application defined policy should use the pm_constraint_get function
to check if given state is enabled and could be used.
TEST=Test on hayato board(soc:it8xxx2), the logs print normally before
system enters suspend.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
DT_INST_NODE_HAS_PROP() returns true always since the boolean
tag is valid. Use DT_INST_PROP_OR() to get the real value.
Fixes: baecd7e55a drivers: uart_ns16550: Remove CMake-based templating
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Refactors all of the serial drivers to use a shared driver class
initialization priority configuration, CONFIG_SERIAL_INIT_PRIORITY, to
allow configuring serial drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The one
exception is uart_lpc11u6x.c which previously used
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS.
This change was motivated by an issue on the frdm_k64f board where the
serial driver was incorrectly initialized before the clock control
driver.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
In some configurations (e.g. edge interrupt triggers),
an interruptible event occurs during ISR and the host interrupt
controller does not see the new event due to IIR is constantly
asserting interrupts. For example, the callback handles RX and
then TX. If another character comes in before end of TX processing
(TX interrupt still asserts while raising RX interrupt), the host
interrupt controller may not see this new event. So if needed,
the IER is being toggled to re-assert interrupts at the end of ISR
to nudge the host interrupt controller to fire the ISR again.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Put the maximum number of bytes into Tx FIFO in the fill_fifo routine
to reduce CPU usage.
Previously, the THRE bit was checked in a loop, but, according to doc -
"In the FIFO mode, it is set when the XMIT FIFO is empty, and is
cleared when at least one byte is written to XMIT FIFO.", so only one
byte was transferred every interrupt. That was generating a big amount
of interrupts, which consumes CPU time.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Do not set DLAB bit in Line Control Register when the access to
the baud rate divisor registers is not needed.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
So far pcie_get_mbar() has been the only way to retrieve a MBAR. But
it's logic does not fit all uses cases as we will see further.
The meaning of its parameter "index" is not about BAR index but about
a valid Base Address count instead. It's an arbitrary way to index
MBARs unrelated to the actual BAR index.
While this has proven to be just the function we needed so far, this has
not been the case for MSI-X, which one (through BIR info) needs to
access the BAR by their actual index. Same as ivshmem in fact, though
that one did not generate any bug since it never has IO BARs nor 64bits
BARs (so far?).
So:
- renaming existing pcie_get_mbar() to pcie_probe_mbar(), which is a
more relevant name as it indeed probes the BARs to find the nth valid
one.
- Introducing a new pcie_get_mbar() which this time really asks for the
BAR index.
- Applying the change where relevant. So all use pcie_probe_mbar() now
but MSI-X and ivshmem.
Fixes#37444
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This kconfig option enables runtime configuration of UART
controllers. This allows application to call uart_configure()
to configure the UART controllers and calling uart_config_get()
to retrieve configuration. If this is disabled, UART controllers
rely on UART driver's initialization function to properly
configure the controller. The main use of this option is mainly
code size reduction.
Fixes#16231
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
With some additional macro-magic we can remove the CMake-based header
file template feature, and instead take advantage of the usual
DT_INST_FOREACH_STATUS_OKAY() macro.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Instead of having a hard-coded maximum instance count, introduce a
Kconfig variable for it. The inclusion of the per-instance header
files is solved by having them chain-include each other with a
pre-processor condition that checks if the current header file is the
last one or not.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The reg-shift support was quite broken in that the code only looked
for this property on instance 0. Now we support the property on any
node which might declare it.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Take advantage of DT_INST_FOREACH_STATUS_OKAY() to look for DLF and
PCP properties on any matching nodes with "okay" status.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The existing method of testing for any of the first four DT instances
having the pcie property feels a bit clumsy and will get more so when
support for more than four UARTs is added. A much more cleaner way to
do this (and more correct probably as well) is to list any PCIe-based
UART nodes under a pcie bus in the Device Tree hierarchy.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
currently pcie_get_mbar only returns the physical address.
This changes the function to return the size of the mbar and
the flags (IO Bar vs MEM BAR).
Signed-off-by: Maximilian Bachmann <m.bachmann@acontis.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This gets a little complicated as the driver could be
using PCI-E MMIO, MMIO specified by DTS, or I/O ports.
This driver doesn't use struct uart_device_config any
more.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
PCI devices on 64 bit systems can be mapped anywhere, not just in the
lower 4G of memory. Remove pointer size assumptions.
Also this removes the use of a struct uart_device_config to store the
(runtime) BAR address. That struct has other stuff in it, and the
only thing we need is the single MMIO address. It's also REALLY
confusing to have two "devconf" fields in the device storing values of
the same struct type, some fields of which are used from one of them
but some from the other!
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When PCIe is enabled for UART, the port address is probed during
initialization and is written back into the device config struct.
However, the device config struct is supposed to be const and
read only. This results in page faults when MMU is enabled as
the struct cannot be written into. So fix this by storing port
address in device data struct if a particular UART instance is
of PCIE.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The init function returns successful even if the first
configuration function call fails. This may leave
a non-usable UART to be discoverable with
device_get_binding() which will definitely result
in lots of head scratching. So change the init function
to return properly.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The existing uart driver ns16550 did not have ISR locking that
effected IO APIC working in fixed delivery mode in SMP system
x86_64. This commit adds ISR locking mechanism using spinlock
for the interrupt related services.
The CONFIG_IPM_CONSOLE_STACK_SIZE is increased to lift
limitation of stack size experienced in IPM driver test with
this spinlock impelentation.
Fixes#23026
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
This reverts commit 8739517107.
Pull Request #23437 was merged by mistake with an invalid manifest.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
Update device data with the activated configuration, so that it
will be remembered for follow up configuration get requests.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
The sole purpose of init options has been to enable hardware flow
control on NS16750 when asked. Use the proper DTS tags for this.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
There is only one possible command, so just use if instead of switch
to avoid several MISRA-C violations and also avoid set dev_data wrongly
unused when UART_NS16550_DLF_ENABLED is defined.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The NS16550 UART driver is currently hard-coded as 8-n-1
with no flow control. The baud rate is set by what is in DTS.
This commit moves away from hard-coded and strictly DTS to
configurable using the UART configure API. Requires commit #bcb807.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
The UART configure API was added to uart.h and this commit
implements the initial framework for the configure API for
the ns16550 uart. This includes the configure() and config_get()
functions and uart device configuration structures of the uart
configure API for the ns16550.
Note this commit does not resolve the pre-existing hard-coded
8-n-1 implementation.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
Several macros were documented as deprecated but lacked the
infrastructure to produce deprecation warnings. Add the deprecation
marker, and fix the in-tree references to the deprecated spellings.
Note that one non-deprecated macro should have been deprecated, and
is, referring to a newly added line control bit.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
In some hardware,e.g. ARC HS Development kit,the
peripheral space of ns16550 only allowes WORD
access, byte acess will raise bus error.
This commit adds support for this case
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The per-UART configuration is boilerplate that is becoming a maintenance
nightmare as it grows. A template file is created, and instances are
created as needed by cmake at build time.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
