drivers/uart_ns16550: move UART configuration boilerplate to template
The per-UART configuration is boilerplate that is becoming a maintenance nightmare as it grows. A template file is created, and instances are created as needed by cmake at build time. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
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f16f7fc491
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3 changed files with 86 additions and 245 deletions
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@ -17,7 +17,6 @@ zephyr_library_sources_if_kconfig(uart_miv.c)
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zephyr_library_sources_if_kconfig(uart_msp432p4xx.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_UART_PERIPHERAL uart_nrfx_uart.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_UARTE_PERIPHERAL uart_nrfx_uarte.c)
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zephyr_library_sources_if_kconfig(uart_ns16550.c)
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zephyr_library_sources_if_kconfig(uart_nsim.c)
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zephyr_library_sources_if_kconfig(uart_qmsi.c)
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zephyr_library_sources_if_kconfig(uart_sam.c)
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@ -32,6 +31,19 @@ zephyr_library_sources_if_kconfig(uart_rv32m1_lpuart.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE uart_handlers.c)
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if(CONFIG_UART_NS16550)
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zephyr_library_sources(uart_ns16550.c)
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foreach(NUM RANGE 0 3)
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if (CONFIG_UART_NS16550_PORT_${NUM})
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configure_file(
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uart_ns16550_port_x.h
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${PROJECT_BINARY_DIR}/include/generated/uart_ns16550_port_${NUM}.h
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@ONLY
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)
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endif()
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endforeach(NUM)
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endif()
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if(CONFIG_UART_NATIVE_POSIX)
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zephyr_library_compile_definitions(NO_POSIX_CHEATS)
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zephyr_library_sources(uart_native_posix.c)
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@ -777,257 +777,17 @@ static const struct uart_driver_api uart_ns16550_driver_api = {
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};
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#ifdef CONFIG_UART_NS16550_PORT_0
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_0(struct device *port);
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#include <uart_ns16550_port_0.h>
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#endif
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_0 = {
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.sys_clk_freq = DT_UART_NS16550_PORT_0_CLK_FREQ,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = irq_config_func_0,
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#endif
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#ifdef DT_UART_NS16550_PORT_0_PCP
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.pcp = DT_UART_NS16550_PORT_0_PCP,
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#endif
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#if DT_UART_NS16550_PORT_0_PCIE
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.pcie = true,
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.pcie_bdf = DT_UART_NS16550_PORT_0_BASE_ADDR,
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.pcie_id = DT_UART_NS16550_PORT_0_SIZE,
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#endif
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};
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_0 = {
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.port = DT_UART_NS16550_PORT_0_BASE_ADDR,
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.baud_rate = DT_UART_NS16550_PORT_0_BAUD_RATE,
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.options = CONFIG_UART_NS16550_PORT_0_OPTIONS,
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#ifdef DT_UART_NS16550_PORT_0_DLF
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.dlf = DT_UART_NS16550_PORT_0_DLF,
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#endif
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};
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DEVICE_AND_API_INIT(uart_ns16550_0, DT_UART_NS16550_PORT_0_NAME, &uart_ns16550_init,
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&uart_ns16550_dev_data_0, &uart_ns16550_dev_cfg_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_ns16550_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_0(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_UART_NS16550_PORT_0_IRQ,
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DT_UART_NS16550_PORT_0_IRQ_PRI,
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uart_ns16550_isr, DEVICE_GET(uart_ns16550_0),
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DT_UART_NS16550_PORT_0_IRQ_FLAGS);
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#ifdef UART_NS16550_PCIE_ENABLED
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if (DEV_CFG(dev)->pcie) {
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pcie_irq_enable(DT_UART_NS16550_PORT_0_BASE_ADDR,
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DT_UART_NS16550_PORT_0_IRQ);
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} else {
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irq_enable(DT_UART_NS16550_PORT_0_IRQ);
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}
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#else
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irq_enable(DT_UART_NS16550_PORT_0_IRQ);
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#endif
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}
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#endif
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#endif /* CONFIG_UART_NS16550_PORT_0 */
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#ifdef CONFIG_UART_NS16550_PORT_1
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_1(struct device *port);
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#include <uart_ns16550_port_1.h>
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#endif
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_1 = {
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.sys_clk_freq = DT_UART_NS16550_PORT_1_CLK_FREQ,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = irq_config_func_1,
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#endif
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#ifdef DT_UART_NS16550_PORT_1_PCP
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.pcp = DT_UART_NS16550_PORT_1_PCP,
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#endif
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#if DT_UART_NS16550_PORT_1_PCIE
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.pcie = true,
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.pcie_bdf = DT_UART_NS16550_PORT_1_BASE_ADDR,
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.pcie_id = DT_UART_NS16550_PORT_1_SIZE,
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#endif
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};
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_1 = {
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.port = DT_UART_NS16550_PORT_1_BASE_ADDR,
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.baud_rate = DT_UART_NS16550_PORT_1_BAUD_RATE,
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.options = CONFIG_UART_NS16550_PORT_1_OPTIONS,
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#ifdef DT_UART_NS16550_PORT_1_DLF
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.dlf = DT_UART_NS16550_PORT_1_DLF,
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#endif
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};
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DEVICE_AND_API_INIT(uart_ns16550_1, DT_UART_NS16550_PORT_1_NAME, &uart_ns16550_init,
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&uart_ns16550_dev_data_1, &uart_ns16550_dev_cfg_1,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_ns16550_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_1(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_UART_NS16550_PORT_1_IRQ,
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DT_UART_NS16550_PORT_1_IRQ_PRI,
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uart_ns16550_isr, DEVICE_GET(uart_ns16550_1),
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DT_UART_NS16550_PORT_1_IRQ_FLAGS);
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#ifdef UART_NS16550_PCIE_ENABLED
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if (DEV_CFG(dev)->pcie) {
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pcie_irq_enable(DT_UART_NS16550_PORT_1_BASE_ADDR,
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DT_UART_NS16550_PORT_1_IRQ);
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} else {
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irq_enable(DT_UART_NS16550_PORT_1_IRQ);
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}
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#else
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irq_enable(DT_UART_NS16550_PORT_1_IRQ);
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#endif
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}
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#endif
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#endif /* CONFIG_UART_NS16550_PORT_1 */
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#ifdef CONFIG_UART_NS16550_PORT_2
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_2(struct device *port);
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#include <uart_ns16550_port_2.h>
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#endif
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_2 = {
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.sys_clk_freq = DT_UART_NS16550_PORT_2_CLK_FREQ,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = irq_config_func_2,
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#endif
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#ifdef DT_UART_NS16550_PORT_2_PCP
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.pcp = DT_UART_NS16550_PORT_2_PCP,
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#endif
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#if DT_UART_NS16550_PORT_2_PCIE
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.pcie = true,
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.pcie_bdf = DT_UART_NS16550_PORT_2_BASE_ADDR,
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.pcie_id = DT_UART_NS16550_PORT_2_SIZE,
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#endif
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};
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_2 = {
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.port = DT_UART_NS16550_PORT_2_BASE_ADDR,
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.baud_rate = DT_UART_NS16550_PORT_2_BAUD_RATE,
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.options = CONFIG_UART_NS16550_PORT_2_OPTIONS,
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#ifdef DT_UART_NS16550_PORT_2_DLF
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.dlf = DT_UART_NS16550_PORT_2_DLF,
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#endif
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};
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DEVICE_AND_API_INIT(uart_ns16550_2, DT_UART_NS16550_PORT_2_NAME, &uart_ns16550_init,
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&uart_ns16550_dev_data_2, &uart_ns16550_dev_cfg_2,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_ns16550_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_2(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_UART_NS16550_PORT_2_IRQ,
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DT_UART_NS16550_PORT_2_IRQ_PRI,
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uart_ns16550_isr, DEVICE_GET(uart_ns16550_2),
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DT_UART_NS16550_PORT_2_IRQ_FLAGS);
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#ifdef UART_NS16550_PCIE_ENABLED
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if (DEV_CFG(dev)->pcie) {
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pcie_irq_enable(DT_UART_NS16550_PORT_2_BASE_ADDR,
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DT_UART_NS16550_PORT_2_IRQ);
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} else {
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irq_enable(DT_UART_NS16550_PORT_2_IRQ);
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}
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#else
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irq_enable(DT_UART_NS16550_PORT_2_IRQ);
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#endif
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}
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#endif
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#endif /* CONFIG_UART_NS16550_PORT_2 */
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#ifdef CONFIG_UART_NS16550_PORT_3
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_3(struct device *port);
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#include <uart_ns16550_port_3.h>
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#endif
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_3 = {
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.sys_clk_freq = DT_UART_NS16550_PORT_3_CLK_FREQ,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = irq_config_func_3,
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#endif
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#ifdef DT_UART_NS16550_PORT_3_PCP
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.pcp = DT_UART_NS16550_PORT_3_PCP,
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#endif
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#if DT_UART_NS16550_PORT_3_PCIE
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.pcie = true,
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.pcie_bdf = DT_UART_NS16550_PORT_3_BASE_ADDR,
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.pcie_id = DT_UART_NS16550_PORT_3_SIZE,
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#endif
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};
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_3 = {
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.port = DT_UART_NS16550_PORT_3_BASE_ADDR,
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.baud_rate = DT_UART_NS16550_PORT_3_BAUD_RATE,
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.options = CONFIG_UART_NS16550_PORT_3_OPTIONS,
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#ifdef DT_UART_NS16550_PORT_3_DLF
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.dlf = DT_UART_NS16550_PORT_3_DLF,
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#endif
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};
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DEVICE_AND_API_INIT(uart_ns16550_3, DT_UART_NS16550_PORT_3_NAME, &uart_ns16550_init,
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&uart_ns16550_dev_data_3, &uart_ns16550_dev_cfg_3,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_ns16550_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_3(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_UART_NS16550_PORT_3_IRQ,
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DT_UART_NS16550_PORT_3_IRQ_PRI,
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uart_ns16550_isr, DEVICE_GET(uart_ns16550_3),
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DT_UART_NS16550_PORT_3_IRQ_FLAGS);
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#ifdef UART_NS16550_PCIE_ENABLED
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if (DEV_CFG(dev)->pcie) {
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pcie_irq_enable(DT_UART_NS16550_PORT_3_BASE_ADDR,
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DT_UART_NS16550_PORT_3_IRQ);
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} else {
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irq_enable(DT_UART_NS16550_PORT_3_IRQ);
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}
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#else
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irq_enable(DT_UART_NS16550_PORT_3_IRQ);
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#endif
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}
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#endif
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#endif /* CONFIG_UART_NS16550_PORT_3 */
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69
drivers/serial/uart_ns16550_port_x.h
Normal file
69
drivers/serial/uart_ns16550_port_x.h
Normal file
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@ -0,0 +1,69 @@
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/*
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* Copyright (c) 2010, 2012-2015 Wind River Systems, Inc.
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* Copyright (c) 2019 Intel Corp.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* This file is a template for cmake and is not meant to be used directly!
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*/
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_@NUM@(struct device *port);
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#endif
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_@NUM@ = {
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.sys_clk_freq = DT_UART_NS16550_PORT_@NUM@_CLK_FREQ,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = irq_config_func_@NUM@,
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#endif
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#ifdef DT_UART_NS16550_PORT_@NUM@_PCP
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.pcp = DT_UART_NS16550_PORT_@NUM@_PCP,
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#endif
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#if DT_UART_NS16550_PORT_@NUM@_PCIE
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.pcie = true,
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.pcie_bdf = DT_UART_NS16550_PORT_@NUM@_BASE_ADDR,
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.pcie_id = DT_UART_NS16550_PORT_@NUM@_SIZE,
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#endif
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};
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_@NUM@ = {
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.port = DT_UART_NS16550_PORT_@NUM@_BASE_ADDR,
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.baud_rate = DT_UART_NS16550_PORT_@NUM@_BAUD_RATE,
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.options = CONFIG_UART_NS16550_PORT_@NUM@_OPTIONS,
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#ifdef DT_UART_NS16550_PORT_@NUM@_DLF
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.dlf = DT_UART_NS16550_PORT_@NUM@_DLF,
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#endif
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};
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DEVICE_AND_API_INIT(uart_ns16550_@NUM@, DT_UART_NS16550_PORT_@NUM@_NAME,
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&uart_ns16550_init,
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&uart_ns16550_dev_data_@NUM@, &uart_ns16550_dev_cfg_@NUM@,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_ns16550_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_@NUM@(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_UART_NS16550_PORT_@NUM@_IRQ,
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DT_UART_NS16550_PORT_@NUM@_IRQ_PRI,
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uart_ns16550_isr, DEVICE_GET(uart_ns16550_@NUM@),
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DT_UART_NS16550_PORT_@NUM@_IRQ_FLAGS);
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#ifdef UART_NS16550_PCIE_ENABLED
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if (DEV_CFG(dev)->pcie) {
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pcie_irq_enable(DT_UART_NS16550_PORT_@NUM@_BASE_ADDR,
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DT_UART_NS16550_PORT_@NUM@_IRQ);
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} else {
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irq_enable(DT_UART_NS16550_PORT_@NUM@_IRQ);
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}
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#else
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irq_enable(DT_UART_NS16550_PORT_@NUM@_IRQ);
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#endif
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}
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#endif
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