Commit graph

59863 commits

Author SHA1 Message Date
Piotr Pryga
f6f1ab9071 Bluetooth: Controller: Add storage for remote CTE request data
There are data received from peer device with CTE request.
These data are not part of local CTE request procedure and
they don't belong to CTE response configuration, hence separate
storage was provided.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
e25380b59f Bluetooth: Controller: Remove unused members from llcp_df_rsp_cfg
ant_sw_len and ant_ids members of the structure llcp_df_rsp_cfg
were not used. These data are stored in lll_df_conn_tx_cfg
that is member of lll_conn. Unused members are removed.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
6587336a5b Bluetooth: Controller: llcp: Make remote CTE REQ to compile with CTE RSP
Part of the CTE request procdure that is related with handling of
remote request should be compiled when CTE RSP is enabled.
Withouth it CTE response will not work. Local CTE request does not
need code reponsible for handling of remote reques.

The commit changes conditional compilation guards.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
e3eb224cd0 Bluetooth: Controller: Add init CTE REQ and RSP variables on conn create
There were missing initialization for CTX request and response conotrol
procedure related variables. The variables were zeored on system
startup but not initialized when a connection is established.
In case of re-use of connection instance for new connection it was not
possible to setup procedures again.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
0086e86153 Bluetooth: hci: Fix wrong CTE request interval type
Request interval is a number of connection events that
is used to periodically run CTE request control procedure.
BT 5.3 Core Specification defines it as 2 octets long.
It had wrong type uint8_t. Changed to correct one uint16_t.

The commit also changes type of cte_rsp_en field of lll_df_conn_tx_cfg
to state that it is a boolean flag.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
5e2211fa3c Bluetooth: Controller: df: Use PDUs CTEInfo to config radio TX
CTE type and length parameters in connected mode are dependent
on remote CTE request procedure. These parameters are required
to setup radio to correctly transmit CTE. The same parameters
are also included in CTEInfo byte of data channel PDU header.
The parameters were provided to LLL with PDU to be transmitted
and by lll_conn::df_tx_cfg, hence it was redundant.
The PDUs CTEInfo has to be set before transmission anyway.
The contents of the PDU are set in ULL by CTE RSP control
procedure. To remove redundancy CTE length and type from lll_df_-
conn_tx_cfg were removed from ll_df_conn_tx_cfg. It was better
option becuse it saves instructions in LLL.

Radio in connected mode was configured by lll_df_conn_cte_tx_enable.
The function just unpacked the lll_df_conn_tx_cfg mebmers and
called static function df_cte_tx_configure.
Instead of extending parameters list of lll_df_conn_cte_tx_enable,
the function was removed and df_cte_tx_configure was changed to
be global function - lll_df_cte_tx_configure.
Now LLL directly passes all parameters from pdu_data::cte_info
and ll_df_conn_tx_cfg to lll_df_cte_tx_configure.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
569cdaa58d Bluetooth: Controller: llcp: setting of CTE related content in pdu_data
The llcp_pdu_encode_cte_rsp functio didn't set pdu_data fields related
with CTE transmission. The commit fixes that.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
c50b474e01 BLuetooth: Controller: llcp: Fix wrong conditions in remote CTE req
There were wrong conditions in rp_comm_tx function for CTE request
that vefiry if:
- PHY is allowed one,
- CTE length is within allowed value.

The commit fixes it.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
c5812bab5e Bluetooth: Controller: Add Kconfig to enable CTE RX in conn mode
The CTE reception and sampling in connected mode was enabled
with CONFIG_BT_CTLR_DF_CONN_CTE_REQ. This is a separate fearure
tha can be enabled when CTE reqest procedure is disabled.
What more the CONFIG_BT_CTLR_DF_CONN_CTE_REQ is dependent
on CONFIG_BT_CTLR_DF_CONN_CTE_RX, not other way around.

The commit adds separate Kconfig to provide such possibility.
Also changes compilation guards for code related with the
CTE reception and sampling.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
4080b03b0b Bluetooth: Controller: ull: df: use new LLCP structus in conn CTE req
The implementation of the ll_df_set_conn_cte_req_enable function was
based on former implementation of LLCPs. The CTE request and response
control procedures are not implemented in former LLCPs framework.
The code has been updated to use data structues from refactored
implementation of LLCPs.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Piotr Pryga
b379bf99aa Bluetooth: Controller: ULL: Add impl for HCI connection CTE rsp enable
There were missing code responsible for execution of HCI_LE_Connection_-
CTE_Response_Enable HCI command.

The commit adds missing implementation into hci and upper link layer.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-01-21 09:30:23 -05:00
Emil Gydesen
eb2ae4c5a9 Bluetooth: ISO: Fix missing ISO type for peripheral ISO
For the peripheral ISO role, the iso->type was never set,
causing setup data path to fail.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-01-21 15:46:01 +02:00
Nazar Palamar
29eec8b3f7 Bluetooth: H4: added support for HCI vendor-specific Setup feature.
Updated H4 driver to initialize setup function. Finally bt_h4_vnd_setup
function must be implemented in vendor-specific HCI extension module if
CONFIG_BT_HCI_SETUP is enabled.

BT_HCI_SETUP feature is useful when the BT Controller requires execution
of the vendor-specific commands sequence to initialize the BT Controller
before the BT Host executes a Reset sequence.
To enable this feature the CONFIG_BT_HCI_SETUP should be enable.

Fixes #41140

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-01-21 15:04:15 +02:00
Nazar Palamar
db1538e7cf Bluetooth: host: Update hci_init function to call setup function.
Updated hci_init function to call HCI vendor-specific Setup function
(bt_dev.drv->setup()) on beginning of HCI initialization.

This feature need when the BT Controller requires execution of the
vendor-specific commands sequence to initialize the BT Controller before
the BT Host executes a Reset sequence. To enable this feature the
CONFIG_BT_HCI_SETUP should be enable.

Fixes #41140

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-01-21 15:04:15 +02:00
Nazar Palamar
c77a546f14 Bluetooth: hci: added HCI vendor-specific Setup function feature
- Added config BT_HCI_SETUP to enable HCI vendor-specific Setup feature,
- Added pointer to 'setup' function in bt_hci_driver structure.

BT_HCI_SETUP feature is useful when the BT Controller requires execution
of the vendor-specific commands sequence to initialize the BT Controller
before the BT Host executes a Reset sequence. To enable this feature the
CONFIG_BT_HCI_SETUP should be enable.

Fixes #41140

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-01-21 15:04:15 +02:00
Anas Nashif
76ac2dc478 doc: update list of supported architectures
- Add MIPS to the list.
- Update ARC entry with ARCv3 support.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-21 07:27:07 -05:00
Milind Paranjpe
25e6803705 drivers: flash: Eliminate warning when compiling with GCC
Address the issue mentioned in zephyrproject-rtos#7412

Using printf() with "%x" to print an off_t value produces the
following warning:

format '%x' expects 'unsigned int', argument has type 'long int'
  228 |  LOG_DBG("Erasing sector at 0x%08x", offset);
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~  ~~~~~~
      |                                      |
      |                                      off_t {aka long int}

In newlib off_t is long. Even though both int and long are 4 bytes wide
in the architecture in use, GCC wants to see "%lx" to printf() a long.
Using "%"PRIx32 still produces the same warning because PRIx32
(from inttypes.h) still expands to simply an "x" and not "lx".

PR zephyrproject-rtos#40004 has solved this by casting offset to
ssize_t. The same solution is emulated here.

Signed-off-by: Milind Paranjpe <milind@whisper.ai>
2022-01-20 13:42:35 -06:00
Martin Koehler
d176158273 drivers: gpio: Fix NO_PINT_INT
Fixed #41945
NO_PINT_INT can have the same value as a specific pin.
E.G. For 1 byte pint_pin_int_t it equaled interrupt1.
Now is instead always 1 higher than the highest pin.
Expects fsl to keep setting values from 0 to
(number of connected outputs - 1)

Signed-off-by: Martin Koehler <koehler@metratec.com>
2022-01-20 13:40:18 -06:00
Andy Ross
50a9c29d08 arch/xtensa: Fix xcc regression with ZSR
Turns out that xt-xcc will bail when faced with a real core-isa.h (it
wants you to rely on the builtins in the compiler).  Undefine __XCC__
to force it to actually parse and emit declarations for its own
header.

(Also adds a newline to the generated one-line C file to silence a warning)

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 14:37:13 -05:00
Yuval Peress
9c0b970bc2 ztest: run before function in test thread
A lot of tests need to be able to get their current tid and do some
action with it. It makes sense for the `before` function/rule to be
able to run in the same thread as the test. Note that the `after`
function does not run in the same thread because we need to guarantee
that it will run.

Signed-off-by: Yuval Peress <peress@google.com>
2022-01-20 14:20:03 -05:00
Jay Vasanth
4495f43dca soc arm: MEC172x soc.h - Include custom IRQn_Type
Fix for issue #41012 to allow compiler to treat
IRQn_Type to be more than 8-bit. This will ensure NVIC numbers
more than 127 (required for MEC172x device) will work
correctly with irq_enable() API

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-01-20 13:42:16 -05:00
Sylvio Alves
eec068b8a5 soc: esp32c3: fix cpu vendor name
Build shows warning due to incompatible
CPU vendor name. This fixes it and applies
necessary changes in files.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-01-20 13:33:29 -05:00
Sylvio Alves
16f9674049 soc: esp32c3: fix timer address case warning
DTSI address is case sensitive and timer address
isn't folowing that rule.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-01-20 13:33:29 -05:00
Andy Ross
d175c18cbb arch/xtensa: Use ZSR assignments for interrupt return
We had a similar sequence for interrupt return, where we were
selecting (actually only for the benefit of qemu) the highest priority
EPCn/EPSn registers for our RFI instruction.  That works much better
in python the preprocessor.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 12:58:00 -05:00
Andy Ross
642fc7ad54 arch/xtensa: Use ZSR assignments for stack flush markers
The kernel coherence cache flush code was using a scratch register to
mark the top of the stack.  Likewise a good candidate for ZSR use.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 12:58:00 -05:00
Andy Ross
3c7905b916 arch/xtensa: Use ZSR assignments for the alloca exception
This is actually Cadence-authored code, but its use of EXCSAVE1 as a
sideband input to the exception handler is very much in the same
family of tricks.  Use ZSR assignments here too.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 12:58:00 -05:00
Andy Ross
ca7024e1d6 arch/xtensa: Use ZSR assignments for the CPU pointer
Use the zsr.h assignments for the special register containing the
current CPU pointer.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 12:58:00 -05:00
Andy Ross
82071be443 arch/xtensa: Add special register allocation generator
Zephyr likes to use the various Xtensa scratch registers for its own
purposes in several places.  Unfortunately, owing to the
configurability of the architecture, we have to use different
registers for different platforms.  This has been done so far with a
collection of different tricks, some... less elegant than others.

Put it all in one place.  This is a python script that emites a
"zsr.h" header with register assignments for all the existing users.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 12:58:00 -05:00
Andy Ross
aa825d77b0 doc: Clarify k_poll() behavior with respect to signal synchronization
Bug #40189 tripped over an interesting synchronization scenario that
wasn't called out in the docs.  Poll signals are level triggered, and
if you're adjusting the level from a racing context (e.g. resetting it
before the next "event" from an ISR or another thread) the polling
thread might wake up but then miss the event.  Mention this case
explicitly in documentation.

Fixes #40189

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-20 10:57:31 -05:00
Krzysztof Chruscinski
18165b1d49 logging: Fix tracking of buffered messages
Algorithm was failing in case when overflow mode was enabled
but allocation of new message failed. It could happen if message
size exceeded buffer size. Losing track of buffered messages
can lead to logging processing freeze.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-20 08:52:08 -05:00
Gerard Marull-Paretas
20d0260753 drivers: dma: mcux_lpc: fix variable name clash
data was already used by the struct call_back, rename device data to
`dev_data`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-20 07:41:26 -06:00
Peter Mitsis
11f8f6697f kernel: Update CPU runtime stats of non-idle time
Updates sched_cpu_update_usage() such that the CPU runtime stats
only update the its non-idle time when the current thread is not the
idle thread. This is necessary as otherwise the CPUs idle-time will
be double counted in k_thread_runtime_stats.execution_cycles.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2022-01-20 08:22:01 -05:00
Nicolas Pitre
019a1e13f4 cbprintf_packaged: code cleanups
- Abstract buffer offset computation for better code clarity.

- Rework the logic around rw/ro strings to simplify the logic and
  to guard against overflows even when only computing the needed buffer
  size.

- Use modulus to simplify alignment tests (generated assembly is
  the same).

- Avoid CBPRINTF_ prefixes for local macro names

- Better pointer types to reduce cast usage.

- Add more comments.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-01-20 08:21:33 -05:00
Tom Burdick
f08c44def5 boards: mec17xxevb_assy6906 i2c alias fix
Adds missing i2c-0 alias to board dts so that the i2c tests may be
built.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-01-19 17:24:38 -05:00
Tom Burdick
913fe5bb91 board: mec15xxevb_assy6853 i2c alias fix for tests
Added a missing an i2c-0 alias in the board dts so the i2c tests
may build.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-01-19 17:24:38 -05:00
Jeremy Wood
9d346cc2b2 boards: arm: add can1 to nucleo_h743/753.
* Enable and configure can1 for nucleo_h743/753.
* Update documentation.

Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
2022-01-19 16:07:54 -05:00
Jeremy Wood
c13ff7505c dts: add stm32h7 can binding and node
* Add can peripheral to stm32h7.dtsi.
* Add binding for m_can stm32h7 driver.

Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
2022-01-19 16:07:54 -05:00
Jeremy Wood
1caa7f6cb9 drivers: can: m_can variant for STM32H7
* New m_can driver variant for STM32H7, as it uses the complete m_can
register set.
* Fix definitions for CAN_MCAN_RXF0S_F0FL, CAN_MCAN_TXEFC_EFSA_POS.

Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
2022-01-19 16:07:54 -05:00
Julien Massot
03135f4604 drivers: pinctrl: pfc_rcar: fix bank and bit parsing
Bank and Bit has been inverted at some point.
Fix that !

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2022-01-19 16:06:46 -05:00
Andy Ross
8d13be016a tests/kernel/fatal/exception: Remove legacy irq_lock() usage
The irq_lock() API is a legacy API not to be used for synchronization
by new code, and in any case is only being used in cargo-cult fashion
here.  These test cases all do synchronous exceptions, there's
literally nothing to synchronize against.

    (And in this case they're exposing a legacy wart.  On platforms where:

    1. SMP=y, which causes irq_lock() to be implemented as a somewhat
       complicated global lock

    2. No ARCH_EXCEPT() macro is defined, which causes the kernel to
       use a fallback that simply aborts the current thread.

    ...this test will then abort a thread holding the lock, which will
    cause it to be orphaned (if it weren't a legacy API, the kernel
    should probably attempt to clean it up in k_thread_abort(), but it
    is, and it doesn't), so the next attempt to lock it will hang.
    And it's even worse, because this test builds with SMP=y and
    MP_NUM_CPUS=1, so the hand will happen with interrupts masked on a
    system with only one CPU, and everything will lock up solid.)

Fixes #41877

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-19 15:10:55 -05:00
Mahesh Mahadevan
27cf263673 tests: arch: arm_irq_vector_table: Update to run on MXRT595
Update the custom vector table to add the OS Event timer
interrupt which is used on RT595 as the kernel system timer

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Mahesh Mahadevan
aeabe6c70c driver: clock: Update MCUX Syscon clock control driver
1. Update to add support for Flexcomm8-13.
2. Fix the clock control driver, the enclosing #define
   was incorrect.
3. Identify HS_SPI port using the appropriate Register
   define

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Mahesh Mahadevan
83af6e6374 boards: Add support for NXP board mimxt595_evk
Add support for mimxrt595_evk

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Mahesh Mahadevan
a7998f4cff dts: Add support for NXP MXRT5xx
Add support for MXRT595S

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Mahesh Mahadevan
f4163ba596 dts: Update GPIO port numbers
Add more GPIO port numbers to the enum list

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Mahesh Mahadevan
a62ff8906d soc: Add support for MXRT595
Add support for MXRT595

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Mahesh Mahadevan
eb7d95cd48 west.yml: Update NXP HAL to add support for MIMXRT595
Add support for MIMXRT595

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Flavio Ceolin
06bdd1001c pm: Better name for cpus state variable
A better name for array tracking cpus pm state.
s/z_power_states/z_cpus_pm_state/g

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-01-19 14:22:08 -05:00
Flavio Ceolin
baf50b5cdb pm: Proper initialize cpu power states
Do not make assumptions about the enum value for ACTIVE state and
explicitly set it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-01-19 14:22:08 -05:00
Lukasz Maciejonczyk
253c59c0e5 drivers: ieee802154_nrf5: fix condition for mac keys and frame counter
For multicore devices like nRF53, shim layer part of setting mac keys
and frame counters is called on application core where
CONFIG_NRF_802154_ENCRYPTION is disabled (the define concerns radio
driver for net core). This commit replaces
CONFIG_NRF_802154_ENCRYPTION with CONFIG_IEEE802154_2015.

Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
2022-01-19 14:16:23 -05:00