Commit graph

266 commits

Author SHA1 Message Date
Eugeniy Paltsev
c2bb7db3fd ARC: linker: implement linker related definition for MWDT
Implement linker related definitions and macros for MWDT
toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
0a7b65ef5e linker: tweak section naming to feet all linkers
MWDT toolchain adds additional suffix to sections name in case of
ffunction-sections / fdata-sections are enabled.

As proposed by Andy Ross let's pick a single set of rules
and syntax that work.

Suggested-by: Andy Ross <andy@plausible.org>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Jett Rink
1972f0b7f4 ec_host_cmd: add ec host command handler framework
Add a generic host command handler framework that allows users to
declare new host command handlers with the HOST_COMMAND_HANDLER macro
at build time. The framework will handle incoming messages from the
host command peripheral device and forwards the incoming data to the
appropriate host command handler, which is looked up by id.

The framework will also send the response from the handler back to the
host command peripheral device. The device handles sending the data on
the physical bus.

This type of host command communication is typically done on an embedded
controller for a notebook or computer. The host would be the main
application processor (aka AP, CPU, SoC).

Signed-off-by: Jett Rink <jettrink@google.com>
2020-09-04 14:50:45 -04:00
Tomasz Bursztyka
aac9e2c5e3 device: Revise how initialization status is being handled
In order to make all device instances constant, driver_api pointer is
not set to NULL anymore if initialization failed.

Instead, have a bitfield dedicated to it.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Simon Glass
302d671ea2 emul: Create an emulation implementation
Create a header file and implementation for emulators. Set up a linker
list so that emulators can be found and initialised at start-up.

Emulators are used to emulate hardware devices, to support testing of
various subsystems. For example, it is possible to write an emulator
for an I2C compass such that it appears on the I2C bus and can be used
just like a real hardware device.

Emulators often implement special features for testing. For example a
compass may support returning bogus data if the I2C bus speed is too
high, or may return invalid measurements if calibration has not yet
been completed. This allows for testing that high-level code can
handle these situations correctly. Test coverage can therefore
approach 100% if all failure conditions are emulated.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-01 14:30:46 -04:00
Andrew Boie
8ce260d8df kernel: introduce supervisor-only stacks
These stacks are appropriate for threads that run purely in
supervisor mode, and also as stacks for interrupt and exception
handling.

Two new arch defines are introduced:

- ARCH_KERNEL_STACK_GUARD_SIZE
- ARCH_KERNEL_STACK_OBJ_ALIGN

New public declaration macros:

- K_KERNEL_STACK_RESERVED
- K_KERNEL_STACK_EXTERN
- K_KERNEL_STACK_DEFINE
- K_KERNEL_STACK_ARRAY_DEFINE
- K_KERNEL_STACK_MEMBER
- K_KERNEL_STACK_SIZEOF

If user mode is not enabled, K_KERNEL_STACK_* and K_THREAD_STACK_*
are equivalent.

Separately generated privilege elevation stacks are now declared
like kernel stacks, removing the need for K_PRIVILEGE_STACK_ALIGN.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-07-30 21:11:14 -04:00
Andrew Boie
59a75dd3a8 arches: centralize noinit linker defintiions
This had been copy-pasted between linker scripts, create
a central header for it.

The linker scripts for xtensa and posix have very different
structure and have been left alone.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-07-30 21:11:14 -04:00
Jukka Rissanen
62580748e5 net: Use section foreach macros
Use system provided Z_STRUCT_SECTION_FOREACH() and
Z_STRUCT_SECTION_ITERABLE() macros instead of manually coding
everything for network sections.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-07-20 08:32:46 -07:00
Rafał Kuźnia
89bf746ebe arch/arm/aarch32: add IRQ relay mechanism to ARMv7/8-M
This patch allows the `SW_VECTOR_RELAY` and
`SW_VECTOR_RELAY_CLIENT` pair to be
enabled on the ARMv7-M and ARMv8-M architectures
and covers all additional interrupt vectors.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-07-14 16:17:30 +02:00
Andrew Boie
45979dafb4 linker: add iterable section macros
For iterable areas defined with Z_STRUCT_SECTION_ITERABLE(),
the corresponding output section in the linker script is just
boilerplate. Add macros to make these definitions simpler.

Unfortunately, we have a fair number of iterable sections not
defined with Z_STRUCT_SECTION_ITERABLE(), this patch does not
address this.

The output sections are all named <struct name>_area, update
sanitylib.py with this.

sys_sem with no userspace, and k_lifo/k_fifo are special cases
where different data types that are all equivalent need to be
put in the same iterable area. Add
Z_STRUCT_SECTION_ITERABLE_ALTERNATE() for this special case.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-24 17:09:22 -04:00
Andrew Boie
9ee56e7195 linker-defs: remove KEXEC_PGALIGN_PAD
This has been unused for ages, delete it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-10 18:37:28 -04:00
Andrew Boie
038c9584b3 linker-defs: remove x86 code
This should never have been here. This is already specified
in x86's linker script anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-10 18:37:28 -04:00
Andrew Boie
02df2a4f96 linker: un-abstract some definitions
These made sense before we had the common-rom/common-ram
files, as the same boilerplate was repeated for every arch's
linker script, but this is no longer necessary.

Move these inline for simplicity.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-10 18:37:28 -04:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Martí Bolívar
6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
Tomasz Bursztyka
8d7bb8ffd8 device: Refactor device structures
When the device driver model got introduced, there were no concept of
SYS_INIT() which can be seen as software service. These were introduced
afterwards and reusing the device infrastructure for simplicity.
However, it meant to allocate a bit too much for something that only
required an initialization function to be called at right time.

Thus refactoring the devices structures relevantly:
- introducing struct init_entry which is a generic init end-point
- struct deviceconfig is removed and struct device owns everything now.
- SYS_INIT() generates only a struct init_entry via calling
  INIT_ENTRY_DEFINE()
- DEVICE_AND_API_INIT() generates a struct device and calls
  INIT_ENTRY_DEFINE()
- init objects sections are in ROM
- device objects sections are in RAM (but will end up in ROM once they
  will be 'constified')

It also generate a tiny memory gain on both ROM and RAM, which is nice.

Perhaps kernel/device.c could be renamed to something more relevant.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Kumar Gala
fdd85d5ad7 dts: Rename DT_HAS_NODE macro to DT_HAS_NODE_STATUS_OKAY
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear.  As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-06 05:25:41 -05:00
Stephanos Ioannidis
8b27d5c6b9 linker: Clean up section name definitions
This commit cleans up the section name definitions in the linker
sections header file (`include/linker/sections.h`) to have the uniform
format of `_(SECTION)_SECTION_NAME`.

In addition, the scope of the short section reference aliases (e.g.
`TEXT`, `DATA`, `BSS`) are now limited to the ASM code, as they are
currently used (and intended to be used) only by the ASM code to
specify the target section for functions and variables, and these short
names can cause name conflicts with the symbols used in the C code.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-30 13:42:36 -04:00
Kumar Gala
9b4298c20d arm: Convert DT_CCM_* to new devicetree.h macros
Convert various DT_CCM_* macros to use DT_CHOSEN(zephyr_ccm) and
associated macros from devicetree.h.

We remove CCM references from cortex_a and cortex_r linker scripts as
its only a feature on Cortex-M STM32 SoCs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-26 06:04:46 -05:00
Kumar Gala
a49817d17e arm: Convert DT_DTCM_* to new devicetree.h macros
Convert various DT_DTCM_* macros to use DT_CHOSEN(zephyr_dtcm) and
associated macros from devicetree.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-26 06:04:46 -05:00
Krzysztof Chruscinski
8a63c9c8c8 shell: Add dedicated section for shell instances
Addded dedicated section for shell instances.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-04-17 11:34:01 +02:00
Jukka Rissanen
420b195b5e drivers: console: uart_mux: Initial UART muxing support
Create support for muxed UARTs which are attached to a real
UART and which use GSM 07.10 muxing protocol to create virtual
channels that can be run on top of the real UART.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-04-17 10:15:54 +03:00
Vincent van der Locht
c6fb9c3d31 include: linker: section_tags.h: Add __nocache fallback
Some drivers support NOCACHE_MEMORY sections. To have a default
fallback for systems where this isn't available or disabled a
fallback define is added.

Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-04-17 09:23:33 +03:00
Andy Ross
0dd83b8c2e kernel: Add k_heap synchronized memory allocator
This adds a k_heap data structure, a synchronized wrapper around a
sys_heap memory allocator.  As of this patch, it is an alternative
implementation to k_mem_pool() with somewhat better efficiency and
performance and more conventional (and convenient) behavior.

Note that commit involves some header motion to break dependencies.
The declaration for struct k_spinlock moves to kernel_structs.h, and a
bunch of includes were trimmed.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-04-14 10:05:55 -07:00
Jukka Rissanen
02fe85d5e0 net: Remove leftovers for obsolete net stacks shell command
The "net stacks" shell command support was just removed, but
the net_stacks linker section was left around.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-04-01 10:41:58 -04:00
Daniel Leung
4e1637b54e kernel: add sys init level for SMP
This adds a sys init level which allows device and sys_init
to be done after SMP initialization, z_smp_init(), when all
cores are up and running.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Andrew Boie
28be793cb6 kernel: delete separate logic for priv stacks
This never needed to be put in a separate gperf table.
Privilege mode stacks can be generated by the main
gen_kobject_list.py logic, which we do here.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-03-17 20:11:27 +02:00
Andrew Boie
2f3a89fa8d kernel: rename _k_object_assignment
Private structure, rename to z_object_assignment

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-03-17 20:11:27 +02:00
Stephanos Ioannidis
e816ac7124 isr_tables: Support hardware interrupt vector table-only configuration.
The existing isr_tables implementation does not allow enabling only
hardware interrupt vector table without software isr table.

This commit ensures that CONFIG_GEN_IRQ_VECTOR_TABLE can be used
without setting CONFIG_GEN_SW_ISR_TABLE.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-13 12:02:03 +01:00
Wentong Wu
8ccc04de6a tracing: add infrastructure for collection of tracing data
First, this commit adds user interface in tracing_format.h which
can trace both string format and data format packet.

Second, it adds method both for asynchronous and synchronous way.
For asynchronous method, tracing packet will be buffered in tracing
buffer first, tracing thread will output the stream data with the
help of tracing backend when tracing thread get scheduled.

Third, it adds UART and USB tracing backend for asynchronous
tracing method, and adds POSIX tracing backend for synchronous
tracing way.

Also it can receive command from host to dynamically enable and
disable tracing to have host capture tracing data conveniently.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-02-05 23:54:26 -05:00
Carlo Caione
87d8a035dd arch: arm64: Support aarch64-gcc compiler
To be able to successfully compile the kernel for the ARM64 architecture
we have to tweak the compiler-related files to be able to use the
AArch64 GCC compiler.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Daniel Leung
b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Jan Van Winkel
ff36fc7d67 linker: cxx: Include .gcc_except_table sections
Include .gcc_except_table (sub-)sections in linker files to support C++
with exceptions enabled. If these sections are not mapped warnings will
be generated for orphaned sections at link time.

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-09-19 09:26:42 -05:00
Charles E. Youse
3cf1bff71c arch/x86: complete 64-bit linker script
The previous linker script was barebones and non-standard. It is
replaced with a script conforms to the rest of the Zephyr arches,
utilizing include/linker headers and standard macros.

link-tool-gcc.h is updated to account for the "i386:x86-64" arch and
the generation of 64-bit ELF binaries.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Nicolas Pitre
70c4aa4293 sys_sem: straighten build time definition macros
Commit db48d3e22a ("sys_sem: add build time definition macros")
recently introduced SYS_SEM_DEFINE() and defined it in terms of
Z_DECL_ALIGN() and __in_section() to force the _k_sem linker section.

It is however cleaner and less obscur to use Z_STRUCT_SECTION_ITERABLE()
and list the _sys_sem linker section alongside the _k_sem one.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-09-14 22:14:51 +08:00
Charles E. Youse
6767563f94 arch/x86: remove support for IAMCU ABI
This ABI is no longer required by any targets and is deprecated.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-07 10:07:42 -04:00
Nicolas Pitre
cd4e7893ea LOG_BACKEND_DEFINE(): use Z_STRUCT_SECTION_ITERABLE()
Replace the open coded section attribute by Z_STRUCT_SECTION_ITERABLE()
to properly align structure instances on 64-bit targets.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-06 10:03:13 +02:00
Nicolas Pitre
1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Nicolas Pitre
2bdfede0f8 cpp: support for 64-bit constructors
Make constructors work in a 64-bit build.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-30 18:55:34 -07:00
Jukka Rissanen
f95938da0f net: ppp: Initial support for point-to-point protocol
This implements ppp L2 component, LCP and IPCP modules.

Fixes #14034

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-07-29 10:24:46 +03:00
Yasushi SHOJI
51bc0a065c linker: Make alignment size for sw_isr_table configurable
sw_isr_table has two entries, an argument and an ISR function.  The
comment on struct _isr_table_entry in include/sw_isr_table.h says that
"This allows a table entry to be loaded [...] with one ldmia
instruction, on ARM [...]".  Some arch, e.g. SPARC, also has a double
word load instruction, "ldd", but the instruct must have address align
to double word or 8 bytes.

This commit makes the table alignment configurable.  It allows each
architecture to specify it, if needed.  The default value is 0 for no
alignment.

Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
2019-07-24 10:09:02 -07:00
Alexander Wachter
b4c5f4b32b linker: Add dtcm section for Cortex M7 MCUs
This commit adds a DTCM (Device Tightly Coupled Memory) section for
Cortex F7 MCUs. The Address and length is defined in the corresponding
device tree file.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-07-19 10:05:46 +02:00
Peter A. Bigot
a66a036a8f subsys/cfb: correct font definition macro for linker script
This macro provides the required alignment directives to ensure that the
font definitions are placed properly for iteration as members of an
array object.

Closes #17581

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-07-17 15:29:42 -07:00
Luiz Augusto von Dentz
4e8ddfd640 Bluetooth: L2CAP: Make use of Z_STRUCT_SECTION_ITERABLE
This makes use of Z_STRUCT_SECTION_ITERABLE to define fixed channel
sections.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-07-04 17:00:09 +03:00
Luiz Augusto von Dentz
8b9920fd77 Bluetooth: GATT: Make use of Z_STRUCT_SECTION_ITERABLE
This makes use of Z_STRUCT_SECTION_ITERABLE to define static service
sections.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-07-04 17:00:09 +03:00
Nicolas Pitre
66045b5db0 net/socket: use the iterable section object constructor/iterator
The handcrafted allocation falls victim of misaligned structures due to
toolchain padding which crashes the socket test code on 64-bit targets.
Let's move it to the iterable section utility where those issues are
already taken care of.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-04 11:36:52 +03:00
Anas Nashif
a2fd7d70ec cleanup: include/: move misc/util.h to sys/util.h
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Laczen JMS
5f19c8160a subsys/settings: Update bluetooth module
Updated the bluetooth module to use static handlers. Removed the
old bt specific static registration.

The routine bt_settings_init() is still calling settings_init() which
IMO is not needed anymore.

Updates:

changed SETTINGS_REGISTER_STATIC() to SETTINGS_STATIC_HANDLER_DEFINE()
changed settings_handler_stat type to settings_handler_static type
removed NULL declarations
renamed bt_handler to bt_settingshandler, as bt_handler already exists.
renamed all bt_XXX_handler to bt_xxx_settingshandler to avoid any
overlap.
changed SETTINGS_STATIC_HANDLER_DEFINE() to create variable names from
_hname by just prepending them with settings_handler_.
updated all bt_xxx_settings_handler to just bt_xxx.

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2019-06-26 16:31:01 +02:00
Laczen JMS
c20ff1150f subsys/settings: Enable handler ROM registration
Add the possibility to register handles to ROM using a new macro
SETTINGS_REGISTER_STATIC(handler), the handler is of type
settings_handler_stat and has to be declared as const:

```
const struct settings_handler_stat test_handler = {
	.name = "test", /* this can also be "ps/data"
	.h_get = get,
	.h_set = set,
	.h_commit = NULL, /* NULL defines can be ommited */
	.h_export = NULL  /* NULL defines can be ommited */
};
SETTINGS_REGISTER_STATIC(test_handler);
```

To maintain support for handlers stored in RAM (dynamic handlers)
`CONFIG_SETTINGS_DYNAMIC_HANDLERS`must be enabled, which is by default.

When registering static handlers there is no check if this handler has
been registered earlier, the latest registered static handler will be
considered valid for any set/get routine, while the commit and export
routines will be executed for both registered handlers.

When a dynamic handler is registered a check is done to see if there was
an earlier registration of the name as a static or dynamic handler
registration will fail.

To get to the lowest possible RAM usage it is advised to set
`CONFIG_SETTINGS_DYNAMIC_HANDLERS=n`.

Updates:

a. Changed usage of RAM to DYNAMIC/dynamic, ROM to STATIC/static
b. Updated settings.h to remove added #if defined()
c. Make static handlers always enabled
d. Corrected error introduced in common-rom.ld.
e. Changed return value of settings_parse_and_lookup to
   settings_handler_stat type to reduce stack usage.
f. Updated the name generated to store a handler item in ROM. It now
   uses the name used to register in combination with the line where
   SETTINGS_REGISTER_STATIC() is called.
g. renamed settings_handler_stat type to settings_handler_static
h. renamed SETTINGS_REGISTER_STATIC to SETTINGS_STATIC_HANDLER_DEFINE()

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2019-06-26 16:31:01 +02:00
Ioannis Glaropoulos
f15c12d482 arch: arm: expose start/end limits of the thread priv stack section
We introduce linker symbols to hold the start and end address of
the memory area holding the thread privilege stack buffers,
applicable when building with support for User Mode.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00