arch: arm64: Support aarch64-gcc compiler

To be able to successfully compile the kernel for the ARM64 architecture
we have to tweak the compiler-related files to be able to use the
AArch64 GCC compiler.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2019-11-10 17:06:13 +00:00 committed by Anas Nashif
commit 87d8a035dd
6 changed files with 54 additions and 35 deletions

View file

@ -23,4 +23,6 @@ zephyr_ld_options(
${ARCH_FLAG}
)
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-little${ARCH}) # BFD format
add_subdirectory(core/aarch32)

View file

@ -1,3 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf64-littleaarch64) # BFD format
add_subdirectory(core/aarch64)

View file

@ -1,33 +1,42 @@
# SPDX-License-Identifier: Apache-2.0
list(APPEND TOOLCHAIN_C_FLAGS
-mthumb
-mcpu=${GCC_M_CPU}
)
list(APPEND TOOLCHAIN_LD_FLAGS
-mthumb
-mcpu=${GCC_M_CPU}
)
# Defines a mapping from GCC_M_CPU to FPU
if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION)
set(PRECISION_TOKEN)
if(CONFIG_ARM64)
list(APPEND TOOLCHAIN_C_FLAGS
-mcpu=${GCC_M_CPU}
)
list(APPEND TOOLCHAIN_LD_FLAGS
-mcpu=${GCC_M_CPU}
)
else()
set(PRECISION_TOKEN sp-)
endif()
list(APPEND TOOLCHAIN_C_FLAGS
-mthumb
-mcpu=${GCC_M_CPU}
)
list(APPEND TOOLCHAIN_LD_FLAGS
-mthumb
-mcpu=${GCC_M_CPU}
)
set(FPU_FOR_cortex-m4 fpv4-${PRECISION_TOKEN}d16)
set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16)
set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16)
# Defines a mapping from GCC_M_CPU to FPU
if(CONFIG_FLOAT)
list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}})
list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}})
if (CONFIG_FP_SOFTABI)
list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=softfp)
list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=softfp)
elseif(CONFIG_FP_HARDABI)
list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=hard)
list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=hard)
if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION)
set(PRECISION_TOKEN)
else()
set(PRECISION_TOKEN sp-)
endif()
set(FPU_FOR_cortex-m4 fpv4-${PRECISION_TOKEN}d16)
set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16)
set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16)
if(CONFIG_FLOAT)
list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}})
list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}})
if (CONFIG_FP_SOFTABI)
list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=softfp)
list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=softfp)
elseif(CONFIG_FP_HARDABI)
list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=hard)
list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=hard)
endif()
endif()
endif()

View file

@ -26,6 +26,8 @@ if("${ARCH}" STREQUAL "arm")
set(GCC_M_CPU cortex-r4)
elseif(CONFIG_CPU_CORTEX_R5)
set(GCC_M_CPU cortex-r5)
elseif(CONFIG_CPU_CORTEX_A53)
set(GCC_M_CPU cortex-a53)
else()
message(FATAL_ERROR "Expected CONFIG_CPU_CORTEX_x to be defined")
endif()

View file

@ -16,11 +16,15 @@
#define ZEPHYR_INCLUDE_LINKER_LINKER_TOOL_GCC_H_
#if defined(CONFIG_ARM)
#if defined(CONFIG_BIG_ENDIAN)
#define OUTPUT_FORMAT_ "elf32-bigarm"
#else
#define OUTPUT_FORMAT_ "elf32-littlearm"
#endif
#if defined(CONFIG_ARM64)
#define OUTPUT_FORMAT_ "elf64-littleaarch64"
#else
#if defined(CONFIG_BIG_ENDIAN)
#define OUTPUT_FORMAT_ "elf32-bigarm"
#else
#define OUTPUT_FORMAT_ "elf32-littlearm"
#endif
#endif
OUTPUT_FORMAT(OUTPUT_FORMAT_)
#elif defined(CONFIG_ARC)
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")

View file

@ -217,7 +217,7 @@ do { \
#if defined(_ASMLANGUAGE)
#ifdef CONFIG_ARM
#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
#if defined(CONFIG_ISA_THUMB2)
@ -370,7 +370,7 @@ do { \
#define GEN_ABS_SYM_END }
#if defined(CONFIG_ARM)
#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
/*
* GNU/ARM backend does not have a proper operand modifier which does not
@ -385,7 +385,7 @@ do { \
",%B0" \
"\n\t.type\t" #name ",%%object" : : "n"(~(value)))
#elif defined(CONFIG_X86) || defined(CONFIG_ARC)
#elif defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_ARM64)
#define GEN_ABSOLUTE_SYM(name, value) \
__asm__(".globl\t" #name "\n\t.equ\t" #name \