Commit graph

59695 commits

Author SHA1 Message Date
Daniel Leung
e783e3c12b drivers: introduce memory management driver APIs
This introduces new APIs for memory management hardware which
are not traditionally associated with an architecture (e.g.
MMU on ARM and x86) and thus not implemented in architecture
code.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00
Daniel Leung
7c6b016ce7 kernel: introduce hidden CONFIG_KERNEL_VM_SUPPORT
Introduce a hidden kconfig CONFIG_KERNEL_VM_SUPPORT which
enables some kconfigs that are required for virtual memory
support. CONFIG_KERNEL_VM_BASE, CONFIG_KERNEL_VM_OFFSET,
and CONFIG_KERNEL_VM_SIZE are moved under this new kconfig
so these can be enabled independent of CONFIG_MMU.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00
Daniel Leung
2e5501a3fe kernel: move CONFIG_MMU into kernel Kconfig
This moves CONFIG_MMU and its children from arch/Kconfig into
kernel/Kconfig. These are used to enable kernel support of MMU
so they should be under kernel/.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00
Daniel Leung
88cfd3343d kernel: arch: no need for #ifdef MMU in header
There is no need to use conditional compilation for the function
prototypes in the kernel architecture header file. So remove it.
Added bouns is that these functions can appear in documentation
without explicitly enabled in pre-defines during doc build.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00
Andy Ross
4796037cf7 tests/kernel/queue: Coherence fixes for tests/kernel/queue
When CONFIG_KERNEL_COHERENCE=y, it's not legal to place shared data
(like the queue elements in this test case) on the stack, because that
memory is incoherent with respect to other CPUs in the system.

Make them static (another option would have been to mark the test case
1cpu).

Fixes #41860

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-01-18 19:18:09 -05:00
Anas Nashif
4cf9ce6988 manifest: update fatfs revision
Use updated fatfs module. We were pointing to a deprecated header.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-18 19:17:50 -05:00
Anas Nashif
01b7800bc8 include: remove deprecated headers
Remove all deprecated headers which were moved to a different location.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-18 19:17:50 -05:00
Henrik Brix Andersen
5598ae85c0 drivers: can: fix can_set_state_change_callback() API function
Remove "return" statement from can_set_state_change_callback() API
wrappper function (which is a void function).

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-01-18 15:26:17 -05:00
Torbjörn Leksell
e955b6540d Tracing: Fixed TraceRecorder inclusion problem
Moved conditional inclusion of tracing_tracerecorder.h
from the start of tracing.h to the bottom. This was the
initial placement of this include but it was moved as
part of PR #40126. If this file is included at the
start of tracing.h the TraceRecorder module hooks
will not map correctly and completely breaks
that module.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2022-01-18 14:15:54 -05:00
Daniel DeGrasse
48434ee1dd soc: mimxrt1170: Add power state defintions for RT1170
Adds power state definitions for RT1170. Min residency times are loosely
derived from transition times into similar power states in the datasheet

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-01-18 14:09:45 -05:00
Daniel DeGrasse
93c003fdc9 soc: mimxrt1160: Add power state definitions for RT1160
Adds power state definitions for RT1160. Min residency times are loosely
derived from transition times into similar power states in the datasheet

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-01-18 14:09:45 -05:00
Daniel DeGrasse
19bb8e2ec8 soc: rt11xx: Enable power management for RT11xx series SOCs
Enables basic power management for the RT11xx series SOCs. The following
power saving measures are currently implemented:

- system reduces core voltage during sleep
- core clock can be gated in deep sleep

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-01-18 14:09:45 -05:00
Daniel DeGrasse
59f9dfae58 drivers: timer: mcux_gpt: Enable GPT timer to run in doze mode
GPT timer must continue running in low power modes, as it is the system
wakeup source. Set configuration to ensure peripheral will not stop
running in low power modes.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-01-18 14:09:45 -05:00
Daniel DeGrasse
f5ebc30087 soc: imx_rt: Enable IMX.RT General Power Controller Driver
GPC driver is used for power management operations on RT series SoCs.
Enable inclusion of the driver into the build.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-01-18 14:09:45 -05:00
Anas Nashif
c025abd035 ci: remove .buildkite
We do not use buildkite since 11/2021. Remove the folder with buildkite
specific files.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-18 13:24:42 -05:00
Enjia Mai
e61e63e33f tests: interrupt: refine the interrupt testcases
This PR include 2 changes to refine the testcases:
1. Now we using IPI to trigger interrupt in testing instead of INT
   instruction, this means we don't need to hardcode the vector
   number. That can avoid some problem.

Fixes: #40374

2. Refined the test cases. Tigger interrupt by INT instruction and
   IPI cannot be masked by irq_disabled(). Unless it's a external
   interrupt, such as a timer. Now remove those incorrect part of
   these testcases.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2022-01-18 13:24:28 -05:00
Enjia Mai
db3fa50916 testsuite: utils: use IPI instead of int instruction for testing on x86
For x86, make the testing purpose trigger_irq() function to send
interrupt processor interrupt to CPU by APIC, instead of executing
INT instruction. Doing this because:
1. It can be controlled by irq lock, more close to trigger irq.
2. We don't need to hardcode the interrupt vector.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2022-01-18 13:24:28 -05:00
Carlo Caione
993cb4cd62 sample: openamp: Add OpenAMP performance test.
Add a simple sample that tries to answer the silly question: how fast
can I move data from one core to another using OpenAMP?

It depends on a lot of factors but at least we can use this sample as a
skeleton to build tests on top.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-01-18 13:23:43 -05:00
Bartosz Bilas
ca96286c22 drivers: ethernet: dsa_ksz8xxx: remove duplicated headers
drivers/spi.h header is included when CONFIG_DSA_SPI
is enabled so there is no necessity to do that once again.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-01-18 13:23:16 -05:00
Bartosz Bilas
8779972955 drivers: ethernet: dsa_ksz8xxx: convert to spi_dt_spec
Convert dsa_ksz8xxx driver to use `spi_dt_spec` helpers.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-01-18 13:23:16 -05:00
Andrei Emeltchenko
b565683aec tests: ibecc: Fix using global device pointer
Removing global device pointer fixes issues with uninitialized device.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-01-18 13:22:53 -05:00
Andrei Emeltchenko
69ac4b29de edac: ibecc: Refactor error inject code
Refactor code removing duplicated parts.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-01-18 13:22:53 -05:00
Andrei Emeltchenko
c493825ac1 edac: ibecc: Add LOG_INF for indication initialization
Add LOG_INF() to indicate that IBECC driver is initialized.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-01-18 13:22:53 -05:00
Tomasz Bursztyka
d02ef74d86 tests/ivshmem: Make sure it enters usermode before testing the driver
So it will also test the ivhmem usermode handlers.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-18 13:22:25 -05:00
Yasushi SHOJI
91970adb75 boards: Add Space Cubics OBC Module 1
This is a single board computer for spacecraft OBC (On-board Computer).
It has a Xilinx FPGA with Cortex ARM M3 core with peripherals, UART, CAN
and others.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2022-01-18 13:21:50 -05:00
Yasushi SHOJI
2e3aeaaac8 dts: Add Space Cubics as "sc"
Add Space Cubics, LLC as "sc".

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2022-01-18 13:21:50 -05:00
Yasushi SHOJI
611230f80e soc/arm/designstart: Make XIP optional
Arm Cortex-M3 DesignStart FPGA-Xilinx edition doesn't have to use XIP.
Our board doesn't need it.  Make it optional by replacing "select" with
"imply".

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2022-01-18 13:21:50 -05:00
Emil Gydesen
20264174b8 Bluetooth: ISO: Remove double dereferencing in init functions
Remove the double dereferencing in the big_init_bis and
cig_init_cis functions.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-01-18 13:19:47 -05:00
Emil Gydesen
0785e9479d Bluetooth: ISO: Add function to get info of ISO channel
The application may want to want the type of an
ISO channel, and take action based on what the type is.

It has been implemented as a get_info to be
consistent with other get_info functions in the
Bluetooth subsystem.

The bt_iso_info struct can be expanded with more information
later as required.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-01-18 13:19:47 -05:00
Emil Gydesen
c6b78b93d9 Bluetooth: ISO: Add ISO channel type
Add a enum for the ISO channel type instead of using
a boolean for just bis/cis.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-01-18 13:19:47 -05:00
Andrew Hedin
7f004f1b35 net: lwm2m: Add LwM2M gateway object
Add support for the gateway object [EXPERIMENTAL] used by the
MG100, BT510, and BT610 LwM2M demo.

Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
2022-01-18 13:19:12 -05:00
Francois Ramu
1b8d2d3dad soc: arm: stm32 mcus should execute stm32_power_init in PRE_KERNEL_1
Change the stm32_power_init to be executed PRE_KERNEL_1
for all the devices with the low power mode (power.c)
When GPIO and UART are not yet up and running.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-18 13:17:39 -05:00
Emil Gydesen
28a133cf6d Bluetooth: ISO: Fix bad chan pointer for disconnect
If a central disconnects an ISO, then the `chan` pointer
will become NULL before attempting to call the
disconnect callback.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-01-18 13:16:30 -05:00
Dominik Ermel
b36f29243e doc/guides/mgmt: Mcumgr fixes backporting process
The commit adds guide on backporting mcumgr fixes to Zephyr 2.7.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Co-Authored-By: Francesco Servidio <francesco.servidio@nordicsemi.no>
2022-01-18 13:15:38 -05:00
Henrik Brix Andersen
296d368047 drivers: can: mcan: remove unused NUM_TX_EVENT_FIFO_ELEMENTS macro
Remove the unused NUM_TX_EVENT_FIFO_ELEMENTS helper macro. There is no
dts property for setting the TX event FIFO size.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-01-18 13:15:05 -05:00
Gerard Marull-Paretas
ab64a67008 doc: conf: specify which variable is used for output directory
This is needed so that it can be re-used by other Doxygen configuration
entries.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-18 13:14:05 -05:00
Gerard Marull-Paretas
7e88a29a7e doc: extensions: doxyrunner: add doxyrunner_outdir_var option
The doxyrunner_outdir_var option allows to specify which variable (if
any) is used to represent the output directory (as used by
OUTPUT_DIRECTORY). This makes sure that other options referencing it are
processed correctly, since the output directory is not passed as a
variable.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-18 13:14:05 -05:00
Krzysztof Chruscinski
1e74821896 tests: logging: log_api: Fix test suite setup
After switching to new ztest suite was wrongly setup and
no tests were run. Replaced ## with macro that resolves
and concatenates.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-18 13:12:38 -05:00
Krzysztof Chruscinski
57a893dc0d testsuite: ztest: Use STRINGIFY in ZTEST_SUITE
Using macro which will resolve complex SUITE_NAME. Without
it wrong name was assigned when SUITE_NAME was consists of
concatenated defines.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-18 13:12:38 -05:00
Krzysztof Chruscinski
50c7c7b1e4 sys: time_units: Add Kconfig option for algorithm selection
Add maximum timeout used for conversion to Kconfig. Option is used
to determine which conversion algorithm to use: faster but overflowing
earlier or slower without early overflow.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-18 13:11:52 -05:00
Krzysztof Chruscinski
fb5334d2cf sys: time_units: Increase range of z_tmcvt
Avoid result overflow due to intermediate product overflow.
Algorithm was multiplying input value by target frequency
before dividing it by source frequency. If target frequency was
high (e.g. conversion to nanoseconds) it could easily lead to
overflow even though final result would not overflow. Adjusting
algorithm to avoid that.

Note, that typically this code is resolved at compile time so
it will not impact performance as long as it can be resolved.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-18 13:11:52 -05:00
Jim Shu
e2d67d60ba tests: mem_protect: enlarge heap size of RISCV64
Because k_thread size in RISCV64 is near 512 bytes, (num_of_thread *
256) bytes heap size is not enough. Enlarge heap size in RISCV64
to the (num_of_thread * 1024) bytes like x86_64 and ARM64.

Signed-off-by: Jim Shu <cwshu09@gmail.com>
2022-01-18 13:11:36 -05:00
Jim Shu
fd2c07682e arch: riscv: pmp: Fix is_user_mode in RV64
Currently, is_user_mode is 8-byte in riscv64 and it breaks a 4-byte PMP
region protecting it. Because is_user_mode is a single flag, we could
just fix it's size to 4-byte in both riscv32 and riscv64.

Signed-off-by: Jim Shu <cwshu09@gmail.com>
2022-01-18 13:11:36 -05:00
Jim Shu
10e618ff33 arch: riscv: pmp: Fix RV64 compatibility of register size
In RV64, all general-purpose registers and pmpcfg CSR are 64-bit
instead of 32-bit. Fix these registers and related C variables/literals
to be 32/64-bit compatible.

Signed-off-by: Jim Shu <cwshu09@gmail.com>
2022-01-18 13:11:36 -05:00
Jim Shu
595b01fc1d arch: riscv: pmp: Fix 64-bit compatibility of pointer size
Fix 64-bit compatibility of pointer size of RISC-V PMP/userspace code.

Signed-off-by: Jim Shu <cwshu09@gmail.com>
2022-01-18 13:11:36 -05:00
Jim Shu
03d1e9b52a boards: riscv: qemu_riscv64: Enable RISC-V PMP
Enable PMP and Userspace on RV64 QEMU to improve CI coverage

Signed-off-by: Jim Shu <cwshu09@gmail.com>
2022-01-18 13:11:36 -05:00
Przemyslaw Bida
00ef3d2fa7 net: openthread: Add openthread CSL clock uncert
This commit adds OPENTHREAD_PLATFORM_CSL_UNCERToption to Kconfig.
This option will allow user to configure openthreads CSL clock
uncertianity during build time.

Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
2022-01-18 13:11:08 -05:00
Emil Gydesen
f8c20ec76a Bluetooth: Add reference to BT_HCI_ERR_* for disconnect reason
Add reference to BT_HCI_ERR_* for ACL and ISO disconnect
reason.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-01-18 13:10:40 -05:00
Aymeric Aillet
37f5fe5e82 drivers: serial: RCar add pinctrl support
Get pin configuration from device tree to
set alternate pin function.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2022-01-18 13:04:53 -05:00
Aymeric Aillet
873607c6fb boards: arm: rcar_h3ulcb: add scif1 pins definition
Add pins definitions for SCIF1.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2022-01-18 13:04:53 -05:00