Domain clock selection is going to be moved from Kconfig
to devicetree, therefore make sure the same default clock
is selected on this board.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
-Enable the die-temp capabilities of ADC in each dts file of stm32
boards where it is available.
-Execute the testcase running the samples/sensor/stm32_temp_sensor on each
available target board.
Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
Add alias to boards with watchdog enabled to facilitate the
move of samples/drivers/watchdog to use DT_ALIAS.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Increase the size of the flash storage partition from 2KB (one page) to
4KB (two pages) in order to support NVS.
Fixes: #44977
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Most LEDs had 0 or 4 nanoseconds set as a period, a value that doesn't
make sense for a PWM signal driving an LED. A period of 20ms (50Hz) is a
frequently used value as it is above the flicker fusion threshold. All
STM32 based boards have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If more information is required on anything, one should look at
documentation, no point to add a specific comment about it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This adds the pwm feature to the nucleo_f091rc and nucleo_l073rz
and change the pin for nucleo_g474re from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Unify the CAN controller configuration done in Zephyr devicetrees:
- Specify a resynchronization jump width (sjw) of 1 time quanta in SoC
devicetrees as this is the most common. Boards can override this if
needed.
- Specify a sample point of 87.5% as recommended by CAN in Automation
(CiA) in SoC devicetrees. Boards can override this if needed.
- Specify a bus speed of 125 kbits/second (arbitration phase) and 1
Mbits/second (CAN-FD data phase) in board devicetrees as this is what
is used by all Zephyr CAN samples.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add the pinctrl state name (default) for the PWM peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the CAN peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the I2C peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the ADC peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the UART/USART/LPUART
peripherals. Changes performed using the following Python script run
from the repository root:
```
from pathlib import Path
import re
for fpath in Path(".").glob("boards/arm/**/*.dts"):
lines = open(fpath).readlines()
is_stm32 = False
for line in lines:
if "stm32" in line:
is_stm32 = True
break
if not is_stm32:
continue
with open(fpath, "w") as f:
for line in lines:
f.write(line)
m = re.match(r"(\s+)pinctrl-0.*us?art.*", line)
if m:
f.write(m.group(1) + "pinctrl-names = \"default\";\n")
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Rename the Zephyr chosen property for specifying the default CAN bus
controller from "zephyr,can-primary" to "zephyr,canbus".
The "zephyr,can-primary" property name was selected in antipation of
adding support for redundant CAN networks, which we have yet to
add. Meanwhile, the "primary" term causes confusion for non-redundant
CAN bus configurations (and the "can" term doesn't match the name of the
Zephyr CAN bus subsystem).
The CAN in Automation (CiA) 302-6, which deals with CANopen network
redundancy, uses the terms "default interface" and "redundant
interface". If/when we add support for redundant CAN networks, the
"zephyr,canbus" chosen property can be supplemented with a
"zephyr,canbus-redundant" chosen property.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
nucleo_g0b1re:
removes spi2 from arduino header pins to ST morpho pins in order to
free pins for other peripherals.
Adds tim15 with pwm on pb14, changes tim3 pwm to pb4.
As a result timers are available on arduino pins D5 and D6.
nucleo g474re:
Adds timer 3 with pwm pin on pb4 and changes tim2 pwm pin
from pa5 to pb10.
As a result timers are available on arduino pins D5 and D6.
Use default prescaler (==1) for 32-bit timer and
10.001 for 16-bit timers as these are commonly used.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Update PWM pinctrl signal names of all non-F1 STM32 boards.
`pwm` variant is not available anymore on non-F1 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
There is no user USB port available on these boards.
Remove support and remove files when no more needed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move SPI pin configuration to device tree for all STM32 based
boards.
This should not bring any change in pin configuration.
Though, some adjuments have been made on following boards for
coherency:
* b_l4s5i_iot01a1: Removed "very-high-speed" on SPI3 MOSI pin.
Tested with no impact.
* black_f407zg_pro: SPI1 pins configured but not SPI1 node.
Removed pin config as not documented neither.
* sensortile_box: SPI2 pins configured but not SPI2 node.
Removed pin config as not documented neither.
* nucleo_g431rb/nucleo_g474re/nucleo_l476rg/nucleo_l4r5zi:
SPI2 and SPI3 pins were configured but missing.
Added since they were documented.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new DT facilities to configure ADC pinmux on all boards with
STM32 MCUs currently supporting the ADC.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add support for the polarity flag in the STM32 PWM driver.
STM32 boards using PWM have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Following other drivers, Kconfig based instances are now entirely
removed. In order to do this change, PWM nodes in board DT files have
been given a pwm{N} label so that both:
- DT API checks such as #if DT_HAS_NODE(DT_NODELABEL(pwmN)) can be
used (N being PWM instance number).
- DT references can be written as pwms = <&pwmN x y>; instead of
pwms = <&{/soc/timers@XXXXXXXX/pwm} x y>;
This approach is also used on the Linux Kernel.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Remove the USART 2 definition from the nucleo_g474re board
as it could cause a pin conflict on LPUART1 TX pin (PA2).
The USART2 is not present on this nucleo hardware and then
the g474re board definition is aligned with the nucleo_g431rb.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
