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boards: stm32: Move STM32 boards SPI pin configuration to device tree

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Move SPI pin configuration to device tree for all STM32 based
boards.
This should not bring any change in pin configuration.

Though, some adjuments have been made on following boards for
coherency:

* b_l4s5i_iot01a1: Removed "very-high-speed" on SPI3 MOSI pin.
Tested with no impact.
* black_f407zg_pro: SPI1 pins configured but not SPI1 node.
Removed pin config as not documented neither.
* sensortile_box: SPI2 pins configured but not SPI2 node.
Removed pin config as not documented neither.
* nucleo_g431rb/nucleo_g474re/nucleo_l476rg/nucleo_l4r5zi:
SPI2 and SPI3 pins were configured but missing.
Added since they were documented.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2020-10-15 17:03:11 +02:00 • committed by Kumar Gala
commit 0edf368baa
111 changed files with 217 additions and 685 deletions
Download patch file Download diff file Expand all files Collapse all files

13
boards/arm/96b_aerocore2/96b_aerocore2.dts
View file

@ -70,19 +70,32 @@
status = "okay";
};
&spi1_nss_pa4 { slew-rate = "very-high-speed"; };
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2_nss_pb12 { slew-rate = "very-high-speed"; };
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&spi3 {
pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
status = "okay";
};
&spi4_nss_pe11 { slew-rate = "very-high-speed"; };
&spi4 {
pinctrl-0 = <&spi4_nss_pe11 &spi4_sck_pe12
&spi4_miso_pe13 &spi4_mosi_pe14>;
status = "okay";
};

36
boards/arm/96b_aerocore2/pinmux.c
View file

@ -14,42 +14,6 @@
/* pin assignments for board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
{STM32_PIN_PC10, STM32F4_PINMUX_FUNC_PC10_SPI3_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PC11, STM32F4_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32F4_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi4), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PE11, STM32F4_PINMUX_FUNC_PE11_SPI4_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PE12, STM32F4_PINMUX_FUNC_PE12_SPI4_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PE13, STM32F4_PINMUX_FUNC_PE13_SPI4_MISO},
{STM32_PIN_PE14, STM32F4_PINMUX_FUNC_PE14_SPI4_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

8
boards/arm/96b_argonkey/96b_argonkey.dts
View file

@ -52,11 +52,19 @@
status = "okay";
};
&spi1_nss_pa4 { slew-rate = "very-high-speed"; };
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2_nss_pb12 { slew-rate = "very-high-speed"; };
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
/* ST Microelectronics LSM6DSL accel/gyro sensor */

20
boards/arm/96b_argonkey/pinmux.c
View file

@ -14,26 +14,6 @@
/* pin assignments for 96boards Argonkey board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s5), okay) && CONFIG_I2S
{STM32_PIN_PB0, STM32F4_PINMUX_FUNC_PB0_I2S5_CK},
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2S5_SD},

2
boards/arm/96b_carbon/96b_carbon.dts
View file

@ -101,6 +101,8 @@
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

8
boards/arm/96b_carbon/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for 96boards Carbon board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

2
boards/arm/96b_neonkey/96b_neonkey.dts
View file

@ -87,6 +87,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/96b_neonkey/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for 96boards Neonkey board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

12
boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts
View file

@ -95,15 +95,27 @@
status = "okay";
};
&spi1_nss_pa4 { slew-rate = "very-high-speed"; };
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2_nss_pb9 { slew-rate = "very-high-speed"; };
&spi2 {
pinctrl-0 = <&spi2_nss_pb9 &spi2_sck_pd3
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&spi4_nss_pe11 { slew-rate = "very-high-speed"; };
&spi4 {
pinctrl-0 = <&spi4_nss_pe11 &spi4_sck_pe12
&spi4_miso_pe13 &spi4_mosi_pe14>;
status = "okay";
};

30
boards/arm/96b_stm32_sensor_mez/pinmux.c
View file

@ -14,36 +14,6 @@
/* pin assignments for 96b_stm32_sensor_mez board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi4), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PE11, STM32F4_PINMUX_FUNC_PE11_SPI4_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PE12, STM32F4_PINMUX_FUNC_PE12_SPI4_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PE13, STM32F4_PINMUX_FUNC_PE13_SPI4_MISO},
{STM32_PIN_PE14, STM32F4_PINMUX_FUNC_PE14_SPI4_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s2), okay) && CONFIG_I2S
{STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_I2S2_CK},
{STM32_PIN_PC1, STM32F4_PINMUX_FUNC_PC1_I2S2_SD},

1
boards/arm/96b_wistrio/96b_wistrio.dts
View file

@ -63,6 +63,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
cs-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;

6
boards/arm/96b_wistrio/pinmux.c
View file

@ -14,12 +14,6 @@
#include <pinmux/stm32/pinmux_stm32.h>
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L1X_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L1X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
/* RF_CTX_PA */
{STM32_PIN_PA4, STM32_PUSHPULL_PULLUP},
/* RF_CRX_RX */

5
boards/arm/adafruit_feather_stm32f405/adafruit_feather_stm32f405.dts
View file

@ -46,7 +46,11 @@
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1_nss_pa15 { slew-rate = "very-high-speed"; };
&spi1 {
pinctrl-0 = <&spi1_nss_pa15 &spi1_sck_pb3
&spi1_miso_pb4 &spi1_mosi_pb5>;
status = "okay";
cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
gd25q16: gd25q16c@0 {
@ -64,6 +68,7 @@
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

15
boards/arm/adafruit_feather_stm32f405/pinmux.c
View file

@ -14,21 +14,6 @@
/* pin assignments for Feather STM32F405 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32F4_PINMUX_FUNC_PA15_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

4
boards/arm/b_l072z_lrwan1/b_l072z_lrwan1.dts
View file

@ -76,6 +76,8 @@ arduino_i2c: &i2c1 {};
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa15 &spi1_sck_pb3
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
@ -100,6 +102,8 @@ arduino_i2c: &i2c1 {};
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

16
boards/arm/b_l072z_lrwan1/pinmux.c
View file

@ -14,22 +14,6 @@
/* pin assignments for STMicroelectronics B-L072Z-LRWAN1 Discovery board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L0_PINMUX_FUNC_PA15_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB3, STM32L0_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L0_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32L0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32L0_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32L0_PINMUX_FUNC_PA12_USB_DP},

2
boards/arm/b_l4s5i_iot01a/b_l4s5i_iot01a.dts
View file

@ -102,10 +102,12 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi3 {
pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
status = "okay";
cs-gpios = <&gpiod 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>,

12
boards/arm/b_l4s5i_iot01a/pinmux.c
View file

@ -14,18 +14,6 @@
/* pin assignments for B_L4S5I_IOT01A board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
/* SPI3 is used for BT/WIFI, Sub GHZ communication */
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO | \
STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID},
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM},

2
boards/arm/black_f407ve/black_f407ve.dts
View file

@ -98,6 +98,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pb5>;
status = "okay";
cs-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
w25q16cv: w25q16cv@0 {
@ -115,5 +116,6 @@
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb10 &spi2_miso_pc2 &spi2_mosi_pc3>;
status = "okay";
};

10
boards/arm/black_f407ve/pinmux.c
View file

@ -18,16 +18,6 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK},
{STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO},
{STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI},
#endif
};
static int pinmux_black_f407ve_init(const struct device *port)

1
boards/arm/black_f407zg_pro/black_f407zg_pro.dts
View file

@ -98,5 +98,6 @@
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb10 &spi2_miso_pc2 &spi2_mosi_pc3>;
status = "okay";
};

10
boards/arm/black_f407zg_pro/pinmux.c
View file

@ -18,16 +18,6 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK},
{STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO},
{STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI},
#endif
};

2
boards/arm/blackpill_f411ce/blackpill_f411ce.dts
View file

@ -100,6 +100,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_nss_pa4
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

9
boards/arm/blackpill_f411ce/pinmux.c
View file

@ -14,15 +14,6 @@
/* pin assignments for Black Pill V2.0 board */
static const struct pin_config pinconf[] = {
#if (DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI)
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
/* V2.0 routes flash DO to PB4, V2.1+ uses PA6 */
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

1
boards/arm/disco_l475_iot1/disco_l475_iot1.dts
View file

@ -118,6 +118,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

5
boards/arm/disco_l475_iot1/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for Disco L475 IOT1 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID},
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM},

2
boards/arm/mikroe_mini_m4_for_stm32/mikroe_mini_m4_for_stm32.dts
View file

@ -50,6 +50,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/mikroe_mini_m4_for_stm32/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for MINI-M4 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

4
boards/arm/nucleo_f030r8/nucleo_f030r8.dts
View file

@ -72,10 +72,14 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

16
boards/arm/nucleo_f030r8/pinmux.c
View file

@ -15,22 +15,6 @@
/* pin assignments for NUCLEO-F030R8 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f070rb/nucleo_f070rb.dts
View file

@ -67,10 +67,12 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

10
boards/arm/nucleo_f070rb/pinmux.c
View file

@ -15,16 +15,6 @@
/* pin assignments for NUCLEO_F070RB board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f091rc/nucleo_f091rc.dts
View file

@ -66,10 +66,12 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

10
boards/arm/nucleo_f091rc/pinmux.c
View file

@ -14,16 +14,6 @@
/* pin assignments for NUCLEO-F091RC board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

4
boards/arm/nucleo_f103rb/nucleo_f103rb.dts
View file

@ -59,10 +59,14 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_master_pa4 &spi1_sck_master_pa5
&spi1_miso_master_pa6 &spi1_mosi_master_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_master_pb12 &spi2_sck_master_pb13
&spi2_miso_master_pb14 &spi2_mosi_master_pb15>;
status = "okay";
};

16
boards/arm/nucleo_f103rb/pinmux.c
View file

@ -14,22 +14,6 @@
/* pin assignments for NUCLEO-F103RB board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f302r8/nucleo_f302r8.dts
View file

@ -49,6 +49,8 @@
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

8
boards/arm/nucleo_f302r8/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for NUCLEO-F302R8 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f334r8/nucleo_f334r8.dts
View file

@ -66,6 +66,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_f334r8/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for NUCLEO-F334RB board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

4
boards/arm/nucleo_f401re/nucleo_f401re.dts
View file

@ -71,10 +71,14 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

16
boards/arm/nucleo_f401re/pinmux.c
View file

@ -14,22 +14,6 @@
/* pin assignments for NUCLEO-F401RE board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f411re/nucleo_f411re.dts
View file

@ -71,6 +71,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

6
boards/arm/nucleo_f411re/pinmux.c
View file

@ -14,11 +14,9 @@
/* pin assignments for NUCLEO-F411RE board */
static const struct pin_config pinconf[] = {
#if (DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI) || \
(DT_NODE_HAS_STATUS(DT_NODELABEL(i2s1), okay) && CONFIG_I2S)
#ifdef CONFIG_SPI_STM32_USE_HW_SS
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s1), okay) && CONFIG_I2S
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

2
boards/arm/nucleo_f412zg/nucleo_f412zg.dts
View file

@ -71,6 +71,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_f412zg/pinmux.c
View file

@ -18,14 +18,6 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f413zh/nucleo_f413zh.dts
View file

@ -71,6 +71,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_f413zh/pinmux.c
View file

@ -18,14 +18,6 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_f429zi/nucleo_f429zi.dts
View file

@ -66,6 +66,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_f429zi/pinmux.c
View file

@ -27,14 +27,6 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PG13, STM32F4_PINMUX_FUNC_PG13_ETH},
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_ETH},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

2
boards/arm/nucleo_f446re/nucleo_f446re.dts
View file

@ -73,6 +73,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_f446re/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for stm32F446RE Nucleo board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

4
boards/arm/nucleo_f746zg/nucleo_f746zg.dts
View file

@ -92,9 +92,11 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
/*
* WARNING: The pin PA7 will conflict on selection of SPI_1 and
* ETH_STM32_HAL. See pinmux.c for further details.
* ETH_STM32_HAL.
*/
status = "okay";
};

8
boards/arm/nucleo_f746zg/pinmux.c
View file

@ -35,14 +35,6 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
#endif
};
static int pinmux_stm32_init(const struct device *port)

4
boards/arm/nucleo_f756zg/nucleo_f756zg.dts
View file

@ -92,9 +92,11 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
/*
* WARNING: The pin PA7 will conflict on selection of SPI_1 and
* ETH_STM32_HAL. See pinmux.c for further details.
* ETH_STM32_HAL.
*/
status = "okay";
};

8
boards/arm/nucleo_f756zg/pinmux.c
View file

@ -35,14 +35,6 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
#endif
};
static int pinmux_stm32_init(const struct device *port)

4
boards/arm/nucleo_f767zi/nucleo_f767zi.dts
View file

@ -95,9 +95,11 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
/*
* WARNING: The pin PA7 will conflict on selection of SPI_1 and
* ETH_STM32_HAL. See pinmux.c for further details.
* ETH_STM32_HAL.
*/
status = "okay";
};

8
boards/arm/nucleo_f767zi/pinmux.c
View file

@ -35,14 +35,6 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
#endif
};
static int pinmux_stm32_init(const struct device *port)

15
boards/arm/nucleo_g431rb/nucleo_g431rb.dts
View file

@ -69,6 +69,21 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pb3
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
status = "okay";
};

28
boards/arm/nucleo_g431rb/pinmux.c
View file

@ -14,34 +14,6 @@
/* pin assignments for NUCLEO-G431RB board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
/* SPI1 on the Arduino connectors pins A2, D3, D11, D12 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32G4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
/* SPI1_SCK should output on PA5, but is used for LD2 */
{STM32_PIN_PB3, STM32G4X_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PA6, STM32G4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32G4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32G4X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32G4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32G4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32G4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32G4X_PINMUX_FUNC_PA15_SPI3_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PC10, STM32G4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32G4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32G4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32G4X_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32G4X_PINMUX_FUNC_PA12_USB_DP},

15
boards/arm/nucleo_g474re/nucleo_g474re.dts
View file

@ -69,6 +69,21 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pb3
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
status = "okay";
};

28
boards/arm/nucleo_g474re/pinmux.c
View file

@ -14,34 +14,6 @@
/* pin assignments for NUCLEO-G474RE board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
/* SPI1 on the Arduino connectors pins A2, D3, D11, D12 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32G4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
/* SPI1_SCK should output on PA5, but is used for LD2 */
{STM32_PIN_PB3, STM32G4X_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PA6, STM32G4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32G4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32G4X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32G4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32G4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32G4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32G4X_PINMUX_FUNC_PA15_SPI3_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PC10, STM32G4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32G4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32G4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32G4X_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32G4X_PINMUX_FUNC_PA12_USB_DP},

5
boards/arm/nucleo_l011k4/pinmux.c
View file

@ -13,11 +13,6 @@
/* pin assignments for NUCLEO-L011K4 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

1
boards/arm/nucleo_l053r8/nucleo_l053r8.dts
View file

@ -66,6 +66,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

5
boards/arm/nucleo_l053r8/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for NUCLEO-L053R8 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

1
boards/arm/nucleo_l073rz/nucleo_l073rz.dts
View file

@ -60,6 +60,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

5
boards/arm/nucleo_l073rz/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for NUCLEO-L073RZ board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_l432kc/nucleo_l432kc.dts
View file

@ -45,6 +45,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_l432kc/pinmux.c
View file

@ -15,14 +15,6 @@
/* pin assignments for NUCLEO-L432KC board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/nucleo_l452re/nucleo_l452re_common.dtsi
View file

@ -46,6 +46,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_l452re/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for NUCLEO-L452RE board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

16
boards/arm/nucleo_l476rg/nucleo_l476rg.dts
View file

@ -72,9 +72,25 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pb3
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
status = "okay";
};
&timers2 {
status = "okay";

28
boards/arm/nucleo_l476rg/pinmux.c
View file

@ -15,34 +15,6 @@
/* pin assignments for NUCLEO-L476RG board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
/* SPI1_SCK should output on PA5, but is used for LD2 */
{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

1
boards/arm/nucleo_l496zg/nucleo_l496zg.dts
View file

@ -114,6 +114,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

5
boards/arm/nucleo_l496zg/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for NUCLEO-L496ZG board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

15
boards/arm/nucleo_l4r5zi/nucleo_l4r5zi.dts
View file

@ -84,6 +84,21 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
status = "okay";
};

27
boards/arm/nucleo_l4r5zi/pinmux.c
View file

@ -14,33 +14,6 @@
/* pin assignments for NUCLEO-L4R5ZI board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID},
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM},

2
boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts
View file

@ -85,6 +85,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};

8
boards/arm/nucleo_wb55rg/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for NUCLEO-WB55RG board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32WBX_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32WBX_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32WBX_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32WBX_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb), okay)
{STM32_PIN_PA11, STM32WBX_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32WBX_PINMUX_FUNC_PA12_USB_DP},

4
boards/arm/olimex_stm32_h103/olimex_stm32_h103.dts
View file

@ -70,10 +70,14 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_master_pa4 &spi1_sck_master_pa5
&spi1_miso_master_pa6 &spi1_mosi_master_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_master_pb12 &spi2_sck_master_pb13
&spi2_miso_master_pb14 &spi2_mosi_master_pb15>;
status = "okay";
};

16
boards/arm/olimex_stm32_h103/pinmux.c
View file

@ -14,22 +14,6 @@
/* pin assignments for OLIMEX-STM32-H103 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F1_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F1_PINMUX_FUNC_PA12_USB_DP},

4
boards/arm/olimexino_stm32/olimexino_stm32.dts
View file

@ -80,10 +80,14 @@ uext_serial: &usart1 {};
};
&spi1 {
pinctrl-0 = <&spi1_nss_master_pa4 &spi1_sck_master_pa5
&spi1_miso_master_pa6 &spi1_mosi_master_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_master_pb12 &spi2_sck_master_pb13
&spi2_miso_master_pb14 &spi2_mosi_master_pb15>;
status = "okay";
cs-gpios = <&gpiod 2 GPIO_ACTIVE_HIGH>;

16
boards/arm/olimexino_stm32/pinmux.c
View file

@ -15,22 +15,6 @@
/* pin assignments for OLIMEXINO-STM32 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F1_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F1_PINMUX_FUNC_PA12_USB_DP},

19
boards/arm/sensortile_box/pinmux.c
View file

@ -14,25 +14,6 @@
/* pin assignments for SensorTile.box board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PE12, STM32L4X_PINMUX_FUNC_PE12_SPI1_NSS},
{STM32_PIN_PE13, STM32L4X_PINMUX_FUNC_PE13_SPI1_SCK},
{STM32_PIN_PE14, STM32L4X_PINMUX_FUNC_PE14_SPI1_MISO},
{STM32_PIN_PE15, STM32L4X_PINMUX_FUNC_PE15_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi3), okay) && CONFIG_SPI
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI3_SCK},
{STM32_PIN_PB4, STM32L4X_PINMUX_FUNC_PB4_SPI3_MISO},
{STM32_PIN_PB5, STM32L4X_PINMUX_FUNC_PB5_SPI3_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_OTG_FS_DP},

4
boards/arm/sensortile_box/sensortile_box.dts
View file

@ -93,6 +93,8 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pe12 &spi1_sck_pe13
&spi1_miso_pe14 &spi1_mosi_pe15>;
status = "okay";
cs-gpios = <&gpioe 11 GPIO_ACTIVE_LOW>, <&gpioe 12 GPIO_ACTIVE_LOW>, <&gpioe 10 GPIO_ACTIVE_LOW>;
@ -123,6 +125,8 @@
};
&spi3 {
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pb3
&spi3_miso_pb4 &spi3_mosi_pb5>;
status = "okay";
cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;

16
boards/arm/stm32_min_dev/pinmux.c
View file

@ -14,22 +14,6 @@
/* pin assignments for STM32_MIN_DEV board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F1_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F1_PINMUX_FUNC_PA12_USB_DP},

4
boards/arm/stm32_min_dev/stm32_min_dev.dtsi
View file

@ -64,10 +64,14 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_master_pa4 &spi1_sck_master_pa5
&spi1_miso_master_pa6 &spi1_mosi_master_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_master_pb12 &spi2_sck_master_pb13
&spi2_miso_master_pb14 &spi2_mosi_master_pb15>;
status = "okay";
};

5
boards/arm/stm32f072b_disco/pinmux.c
View file

@ -15,11 +15,6 @@
/* pin assignments for STM32F072B-DISCO board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PB3, STM32F0_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PB4, STM32F0_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F0_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

1
boards/arm/stm32f072b_disco/stm32f072b_disco.dts
View file

@ -76,6 +76,7 @@
};
&spi1 {
pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pb5>;
status = "okay";
};

16
boards/arm/stm32f3_disco/pinmux.c
View file

@ -14,22 +14,6 @@
/* pin assignments for STM32F3DISCOVERY board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},

4
boards/arm/stm32f3_disco/stm32f3_disco.dts
View file

@ -110,10 +110,14 @@
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

8
boards/arm/stm32f429i_disc1/pinmux.c
View file

@ -14,14 +14,6 @@
/* pin assignments for STM32F429I-DISC1 board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi5), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PF6, STM32F4_PINMUX_FUNC_PF6_SPI5_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PF7, STM32F4_PINMUX_FUNC_PF7_SPI5_MASTER_SCK},
{STM32_PIN_PF8, STM32F4_PINMUX_FUNC_PF8_SPI5_MASTER_MISO},
{STM32_PIN_PF9, STM32F4_PINMUX_FUNC_PF9_SPI5_MASTER_MOSI},
#endif
};
static int pinmux_stm32_init(const struct device *port)

2
boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts
View file

@ -83,6 +83,8 @@
&spi5 {
pinctrl-0 = <&spi5_nss_pf6 &spi5_sck_pf7
&spi5_miso_pf8 &spi5_mosi_pf9>;
status = "okay";
cs-gpios = <&gpioc 2 GPIO_ACTIVE_LOW>;
ili9340@0 {

5
boards/arm/stm32f469i_disco/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for STM32F469I-DISCO board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},

1
boards/arm/stm32f469i_disco/stm32f469i_disco.dts
View file

@ -79,6 +79,7 @@ arduino_serial: &usart6 {};
};
&spi2 {
pinctrl-0 = <&spi2_sck_pd3 &spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

5
boards/arm/stm32f723e_disco/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for STM32F723E-DISCO board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
{STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PB4, STM32F7_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F7_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP},

1
boards/arm/stm32f723e_disco/stm32f723e_disco.dts
View file

@ -83,6 +83,7 @@ arduino_serial: &usart2 {};
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pb4 &spi1_mosi_pb5>;
status = "okay";
};

8
boards/arm/stm32f746g_disco/pinmux.c
View file

@ -27,14 +27,6 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH},
{STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_ETH},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PI1, STM32F7_PINMUX_FUNC_PI1_SPI2_SCK},
{STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP},

2
boards/arm/stm32f746g_disco/stm32f746g_disco.dts
View file

@ -64,6 +64,8 @@
};
&spi2 {
pinctrl-0 = <&spi2_nss_pi0 &spi2_sck_pi1
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};

5
boards/arm/stm32f769i_disco/pinmux.c
View file

@ -14,11 +14,6 @@
/* pin assignments for STM32F769I-DISCO board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
{STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_SPI2_SCK},
{STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET
{STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH},
{STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH},

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