Due to erratum ERR011573, speculative accesses might be performed
to normal memory unmapped in the MPU. This can be avoided by using
MPU region 0 to cover all unmapped memory and make this region
execute-never and inaccessible.
Fixes#89852
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The ROM bootloader has the option to boot from external QSPI flash on
the FlexSPI instead of internal flash. Adds
CONFIG_NXP_FLEXSPI_BOOT_HEADER to include the FlexSPI boot ROM header
in the image.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
Some drivers need header file soc.h, according to Zephyr SoC Porting Guide
soc.h must be provided for each SoC, so created an empty one.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
When PM2 is enabled, it will disable many of the devices, so need to
enable PM policy constraints for this mode also so that device drivers
can work.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Replace incorrect call to memc_flexram_dt_partition() with
flexram_dt_partition() to resolve build error on
IMXRT10xx and IMXRT11xx.
Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
Configures AHBSC MASTER_SEC_LEVEL register for the cpu1 before cpu1 is
enabled. By default, this gives CPU1 secure and privileged access to
the rest of the SOC, same as CPU0.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
Use `defaut y if` instead of `depends on` as the related Kconfig
should be user configurable even when standby mode is not used.
Signed-off-by: Axel Le Bourhis <axel.lebourhis@nxp.com>
Moved to: include/zephyr/drivers/misc/flexram/memc_nxp_flexram.h
This change makes it so that the .h file does not need to be pulled in
using the CMakeLists.txt file, and can be included like other public
includes.
Removes drivers/memc/memc_nxp_flexram.h
Add memc_nxp_flexram.h to include/zephyr/drivers/misc/flexram
Modify drivers/memc/memc_nxp_flexram.c to use the new include path.
Modifies the mimxrt1170 magic_addr sample to include the driver using
the new include path.
Modify the soc file: soc/nxp/imxrt/imxrt11xx/soc.c to use the new path.
Add relevant information to migration-guide-4.2.rst.
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
As well described in a previous PR [1], the GNU ld and LLVM lld linkers
treat the location counter (`.`) differently. lld always inteprets the
location counter as an absolute address whereas ld interprets it as an
offset from the start of the current object.
The NXP boot header linker script files use `.` assignment to specify an
offset within the rom_start region (ld-style). This causes lld to error
out since it interprets this as the location counter moving backwards.
To fix this, re-use the idea from the previous PR [1]:
replace `. = FOO` with `. += FOO - (. - __rom_start_address)`
This sets the location counter in a way that works with both ld and lld.
[1] https://github.com/zephyrproject-rtos/zephyr/pull/58315
Signed-off-by: Kesavan Yogeswaran <hikes@google.com>
Current code configures the higher bits ahead of drive strength
to be "1", this patch fix this issue.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Lei Xu <lei.xu@nxp.com>
if CONFIG_PM=y, board will enter low power,
which will cause problem for debugger.
So for ztest cases, we need enable this to avoid problem.
This used to apply to soc/platform level, now remove them.
Signed-off-by: Hake Huang <hake.huang@nxp.com>
Add .resource_table section to the linker script for the
i.MX95. This section is used by intercore communication to
publish features and configurations to the remote
Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
This maps to Zephyr power state Standby. In this power
state the OS Timer cannot be used as a wakeup source as
it will be powered off. Hence the counter is enabled
and RTC is used to keep track of system ticks and wakeup
the system.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Since the clock source when running in PM mode 3 is the
slower 1KHx clock, we adjust the SYS_CLOCK_TICKS_PER_SEC
value to get better accuracy.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This clock is used for certain peripherals such
as RTC.
On certain RW612 boards such as rd_rw612_bga, XTAL32K
and ENET share pins. Add code to check if ENET and
XTAL32 are enabled at the same time.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
These socs were missing a config line to disable SYSTICK if the LPTMR is
configured for the system timer, similar to how other SOCs do this for
alternative system timers than systick.
This fixes build errors in the case where that lptmr kconfig is enabled.
Also, the LPTMR kconfig should be default no because it is a secondary
option for the system timer, being lower resolution than systick. This
also resolves build errors.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is a configuration of the DCDC in the clock_init for the RT10xx.
The RT11xx has a kconfig flag ADJUST_DCDC to enable or disable DCDC
adjust code. This flag is now also used for the RT10xx to be able to
enable or disable the DCDC adjust code.
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
In spi loopback test, high bandrate is 16Mbps while some source of lpspi
are too low to support this bandrate. According the reference mannual,
to support 16Mbps, Input frequency at least should be 2*16MHz.
Update LPSPI input freq to maximum to get more accurate band rate
because band rate must be divisible by input freq.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
Currently, coex application is enable the mbedtls and PAS feature,
this causes BT_LONG_WQ thread to use more stack size.
Signed-off-by: Author You <author.you@nxp.com>
The part numbers for MCXC141VLH and MCXC142VFM
have all been set to MCXC141VFM, which lead to
build errors.
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
