This patch fixes the unused parameter warning found at the
arch/arm/core/fault.c and arch/arm/soc/st_stm32/stm32f1/soc_gpio.c
files.
Change-Id: I5b3013c1514cff30f4e98feb31169fb28546c534
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This patch fixes the unused parameter warning found at the
Arduino 101 and Galileo pinmux code.
Change-Id: If67538e955ca1c2d12d4b8378f451bd88b4a52ff
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
I notice that many of the other boards here use 1msec for the tick.
I notice also that when switching to unified kernel, scheduling based
on time has a lot more jitter with a 5msec tick.
I think a better default is 1000 ticks per second for em_starterkit.
Change-Id: Icc93345762dbea7d71ca9f4735bcf73f75cde273
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Memory access could be reorderd around sleep. Add memory
in clobber list.
Jira: ZEP-1408
Change-Id: I49df2542e0059ba76a262fbda58eb46b86e89bea
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
The email for Ruud in the maintainers file actually matches his gerrit
ID.
This reverts commit 2a4e2173fd.
Change-Id: I6739c9c383f485460d8ad72563c25e847ee04c57
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add function return value check. This was caught by
Coverity.
Coverity-CID: 157124
Change-Id: I93b23325d657dc787300908b9117b6976617fdba
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Memory accesses could be reordered before an irq_lock() or
after an irq_unlock() without the memory barriers.
See commit 15bc537712 for the
ARM fix for a complete description of the issue and fix.
Change-Id: I1d96fe0088d90150f0888c2893d017155fc0a0a7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
A build error was resulting if CONFIG_ARC_STACK_CHECKING is enabled.
There is a breq that was too far. Adding conditional code to
re-arrange the branching so that it can be done.
See ZEP-1116.
Change-Id: Idea85817b2e05617bbaa4450437aa74c5737e213
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Memory accesses could be reordered before an irq_lock() or after an
irq_unlock() without the memory barriers.
See commit 15bc537712 for the ARM fix for
a complete description of the issue and fix.
Change-Id: I056afb0406cabe0e1ce2612904e727ccce5f6308
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Memory accesses could be reordered before an irq_lock() or after an
irq_unlock() without the memory barriers.
See commit 15bc537712 for the ARM fix for
a complete description of the issue and fix.
Change-Id: Ic92a6b33f62a938d2252d68eccc55a5fb07c9114
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Use standard library calls like memset/memcpy for setting up BSS and DATA
sections during system initialization, this helps to take advantage of
architecture specific optimizations from standard library.
Change-Id: Ia72b42aa65b44d1df7c22dd1fbc39a44fa001be9
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Make boot banner more informative by adding kernel version string
Change-Id: I21865ea3a001fba2c30fe58e6e052aae59fef3e2
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Add the missing memory clobber to irq_unlock() in order to prevent the
compiler reordering memory operations over the unlock.
Change-Id: If1d664079796618ed247ff5b33b8b3f85fb7e680
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The inline asm definition of irq_lock() on the ARM architecture marks
the ASM as volatile which prevents the compiler from removing the
isntruction but does provide any information to the compiler to
prevent the inline ASM instruction being re-ordered relative to other
instructions. The instruction used in irq_lock() do not touch memory,
however in order to acheive their intended purpose they must be
ordered relative to other memory access instruction. This is acheived
by adding the "memory" clobber.
Instances of the compiler inappropriately re-ordering irq_lock() calls
relative to other instructions without this patch can be observed in
the code generated for k_sleep() on NRF51 target boards.
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Change-Id: I9d42d54cd9a50e8150c10ce6715af7ca2f5cfe51
This patch introduces a test that verifies the behavior of
CONFIG_RUNTIME_NMI at runtime.
The test is meant to be only for ARM Cortex-M targets.
Change-Id: I805a88e67fe47d396ac9e29e1275e5452a4b8a36
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Zephyr is always setting irqs to be level triggered as
required by the core. It is unnecessary to set it to
level again while entering sleep states.
Change-Id: I10f919d619af2e1ab05dc85a67766929b6ae9402
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
If delayed work is already submitted or completed, then subsequent
cancel should return -EINVAL as return status.
Fixes ZEP-1373.
Change-Id: I16bbacca7e31a5a5d8e5a89e729d70302ada6223
Signed-off-by: Mahavir Jain <mjain@marvell.com>
getenv() returns an string of unknown size, so Coverity warns that it
might be used to overflow the stack in the call chain off
conf_read_simple().
To avoid that, wisdom says copy to an string of known size and pass
that.
Change-Id: I9e468de0ae66429062027f58fe0a0a4e1197218f
Coverity-ID: 150819
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
(cherry picked from commit 0307d6ea5fa361abe5c9fb1872f9dc8256208ee0)
Certain structures and defines in this file are from
from mbed's implementation. The file header is updated
as per this.
Change-Id: I688917cdd17cfc8b27d5b78181ced90df73c9efd
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
The current ARC GCC compiler used in Zephyr SDK v0.8.2 generates
incorrect code when using the "-fno-omit-frame-pointer" option. This bug
should have been fixed in the 2016.03 release of the compiler.
Jira: ZEP-1243, ZEP-1403
Change-Id: I0901f55973c1ea37491b07bf625d0d1918803f3e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Added new option to make sanitycheck script error on deprecation
warnings, to use:
sanitycheck --error-on-deprecations
For example, to find usage of legacy APIs in master, run the following:
sanitycheck -e legacy --error-on-deprecations
Change-Id: Ib83c266c8357475840dea03d62ceefed72b73f27
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The reversal of the meaning of a value of 0 from k_sem_take vs
nano_sem_take has caused some issue when porting code from the legacy
API to the new API, so put some emphasis on this difference.
- Add a note in the API description.
- Put the call to k_sem_take and the reversal of the return value inside
of nano_sem_take on one line so that grepping on it shows the
reversal.
Change-Id: I2f4ba58dc087176d68b55371fa6e367b72559e70
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This implements a modified version of CDC ACM class driver
in a WebUSB compatible way. It adds the WebUSB descriptors,
custom and vendor requests handlers so that the host OS and
browsers can get the required BOS descriptor and supported
origins from the device. It also adds a custom interface
class so that the interface will not be claimed by the host
CDC ACM driver.
A simple echo app also included in this commit to demonstrate
how to create and use a WebUSB interface, as well as the
communication between browser and WebUSB enabled device.
WebUSB Spec: https://wicg.github.io/webusb/
Origin: Based on CDC ACM device class driver in Zephyr
Jira: ZEP-744
Change-Id: I2eac10bd718e8fce35cda52e7c2ac425c3210e23
Signed-off-by: Sudarsana Nagineni <sudarsana.nagineni@intel.com>
Revise the document to reflect the latest changes including
the updated concept of SOC interface instead of PMA. Simplified
and enhanced areas that were known to cause confusion. Added
descriptions of new APIs and usages.
Jira: ZEP-1386
Change-Id: I5fa74d85245924f512c22d9d977dd0c9ea62b6ce
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Interrupt must be locked before inserting a timeout in the timeout
queue.
Change-Id: Iab0bf01f393e66a6403d2f85e899dbf737da4afc
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Having CONFIG_ASSERT=y and CONFIG_DEBUG=y was causing these tests to
overflow their stacks and crash.
Change-Id: Ibcd57abe044a2203d1a954a4c5755218af48f302
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Too much code might run with a stale icache, before _PrepC(), so move
the invalidation/disabling code earlier. The asm code does the exact
same thing disable_icache() and invalidate_dcache() were doing.
Change-Id: If52f4e4a1de546fb82873c91ead95614a44b106d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
If a particular project needs to add additional data to the
binary image, in most cases the entire linker script needs to
forked into the project space, causing maintenance issues if
the main linker script is changed.
Now we add some Kconfig options to allow a project to specify
some additional linker scripts which get included by the main
one in a few key areas:
1) In the definition to the 'rodata' section, which can allow
additional data to be included in this ROM section.
2) In the definition to the 'datas' section, which allows
additional data to be included in this RAM section.
3) Arbitrary additional sections to be included at the end of
the binary.
For 1 and 2, this is useful to include data generated outside of
the normal C compilation, such as data structures that are created
by special build tools.
3 is useful for including arbitrary binary blobs inside the final
image, such as for peripheral or co-processor firmware.
Change-Id: I5738d3d6da25f5bc96cda8ae806bf1a3fb34bd5d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Tag all legacy kernel tests and samples as such.
Change-Id: I43b24acb71c282ed14ff6e6ef06c9542bad86f6a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch refactors the main Kconfig file in order to align it with the
Zephyr code style and to make sure that each Kconfig configuration
portion is easily identifiable.
Change-Id: Ib226aaa9a98e9b08a47d9d1c329f18f4f6936620
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
