arc: move disabling/invalidation of caches earlier
Too much code might run with a stale icache, before _PrepC(), so move the invalidation/disabling code earlier. The asm code does the exact same thing disable_icache() and invalidate_dcache() were doing. Change-Id: If52f4e4a1de546fb82873c91ead95614a44b106d Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
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2 changed files with 29 additions and 3 deletions
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@ -34,6 +34,8 @@
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#include <nano_internal.h>
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/* XXX - keep for future use in full-featured cache APIs */
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#if 0
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/**
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*
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* @brief Disable the i-cache if present
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@ -79,7 +81,7 @@ static void invalidate_dcache(void)
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}
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_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
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}
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#endif
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/**
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*
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@ -121,8 +123,6 @@ extern FUNC_NORETURN void _Cstart(void);
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void _PrepC(void)
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{
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disable_icache();
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invalidate_dcache();
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adjust_vector_table_base();
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_bss_zero();
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_data_copy();
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@ -73,6 +73,32 @@ SECTION_FUNC(TEXT,__start)
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/* lock interrupts: will get unlocked when switch to main task */
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clri
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mov r1, 1
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invalidate_and_disable_icache:
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lr r0, [_ARC_V2_I_CACHE_BUILD]
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and.f r0, r0, 0xff
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bz.nd invalidate_dcache
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mov_s r2, 0
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sr r2, [_ARC_V2_IC_IVIC]
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/* writing to IC_IVIC needs 3 NOPs */
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nop
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nop
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nop
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sr r1, [_ARC_V2_IC_CTRL]
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invalidate_dcache:
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lr r3, [_ARC_V2_D_CACHE_BUILD]
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and.f r3, r3, 0xff
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bz.nd done_cache_invalidate
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sr r1, [_ARC_V2_DC_IVDC]
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done_cache_invalidate:
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#ifdef CONFIG_INIT_STACKS
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/*
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* use the main stack to call memset on the interrupt stack and the
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