To check security of connection in read_value() we need to actually
pass connection not NULL.
This is affecting GATT/SR/GAR/BI-11-C
Signed-off-by: Krzysztof Kopyściński <krzysztof.kopyscinski@codecoup.pl>
The commit adds CONFIG_IMG_MGMT_DIRECT_IMAGE_UPLOAD that allows
to turn on the direct image upload.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The val2 calculation was done using (1000000 / 40960) as
multiplying factor, which was sometimes leading to a
int32 overflow. So, let's use the equivalent (but smaller)
(3125 / 128).
Fix#38090
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Enables the mcux ethernet driver and pin muxes on the
mimxrt1024_evk board in the same way as is done on the
mimxrt1020_evk and mimxrt1050_evk.
Documentation updated accordingly.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
cte_info_clear function is responsible for remove of CTE from
periodic advertising PDUs, including remove from optional chained
PDUs. The function uses subortinate function rem_cte_info_from_per_-
adv_chain to remove CTE from chained PDUs.
The rem_cte_info_from_per_adv_chain had pdu_prev and pdu as arguments.
After return from the function the pdu_prev should point to last
PDU from previously used periodic advertising data and pdu should
point to last new periodic advertising data.
The rem_cte_info_from_per_adv_chain function removes CTEInfo from
all but last one PDU. Last PDU must have removed AuxPtr field also.
Remove of CTEInfo and AuxPtr from last PDU is done explicitly in
the cte_info_clear function.
Unfortunately rem_cte_info_from_per_adv_chain had wrong type of
parameters for pdu_prev and pdu. These parameters were pointers
instead od double pointers.
That caused cte_info_clear function to remove CTEInfo and AuxPtr
from first PDU in a chain, which is AUX_SYNC_IND.
Changed parameters pdu_prev and pdu in the rem_cte_info_from_per_adv_-
chain to be double pointers.
Added small corrections in comments.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Co-authored-by: Emil Gydesen <Thalley@users.noreply.github.com>
There was a change in parameters list of function ull_adv_sync_pdu_-
alloc. There was a call in commmon.c file in connectionless_cte_chains
unit tests with use of former parameters list. That caused a compilation
error.
The commit fixes the compilation issue.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
We shouldn't use swapping with an interrupt lock held
as it works incorrectly on SMP platforms.
Fix that by replacing irq_lock with spinlock for pthread
subsystem.
NOTE: we fix that in a simple way with single spinlock
for mutex / cond_var / barrier. That could be improved
later (i.e. split it for several spinlocks).
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
In some cases the 'reschedule' code path is executed when the current
thread is the same as the next thread in the ready Q. If this happens,
the swap_return_value of the thread is ifalsely being reset to -EAGAIN.
This commit prevents the rescheduling code to run if the current thread
is the same as the thread in the ready Q.
Signed-off-by: Wolfgang Reißnegger <gnagflow@fb.com>
According to the rule MISRAC-2012 21.4.a the standard header
file <setjmp.h> shall not be used. Suppress it, because it raises
violation in a testcode, not in a runtime code.
Tag suppresses reporting of violation for the current file,
starting from the line where the suppression is located.
It is a deliberate deviation.
Found as a coding guideline violation (MISRA R21.4.a) by static
coding scanning tool.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
The driver code for the Maxim DS3231 has repeated code for bit
manipulation to transform time data between binary and binary coded
decimal. Use the new BCD header functions instead.
Signed-off-by: Jake Swensen <jake@swensen.io>
Some devices (such as RTCs) have data formats that expect BCD values
instead of binary. These routines allow for converting between binary
and BCD formats.
Signed-off-by: Jake Swensen <jake@swensen.io>
Low power modes entry on stm32wb depends on requests coming from both
cores, with no consideration of the fact that C2 is booted or not.
By default, set C2 power mode to shutdown at C1 start up.
If required, it will be updated by C2.
In case C2 is not started, this will allow C1 to enter any power mode
with no dependency on C2.
Fixes#38173
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This adds arch_float_enable() and arch_float_disable() to x86-64.
As x86-64 always has FP/SSE enabled, these operations are basically
no-ops. These are added just for the completeness of arch interface.
Fixes#38022
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some architectures already returns -ENOTSUP when these functions
are called. So add this return value to the API doc.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds public API documentation for the thread bit
K_SSE_REGS. It was previously a single line comment.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Setting this bit will wake up CPU if it is in low power mode
and an interrupt is pending.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This adds shell support for FPGA drivers.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This adds driver for EOS_S3 SoC FPGA.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This adds new FPGA controller which allow to control FPGA chips.
FPGA controller has been created to enable bitstream loading
into the reprogrammable logic. It adds completely new API,
which enables to check status of the FPGA chip, power it on
or off and reset it.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
The HiFive Unleashed and HiFive Unmatched boards do not enable the
SPI0 controller that the flash is connected to. This test will not
build on these platforms because SPI0 bus controller is missing.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch adds new support for SiFive HiFive Unmatched which has
SiFive FU740 SoC, DDR and some peripherals.
This is first version so not support all features on the board.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch adds support for SiFive Freedom U740 SoC.
First version is minimum only using UART, SPI and L2-LIM area.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch adds new support for SiFive HiFive Unleashed which has
SiFive FU540 SoC, DDR and some peripherals.
This is first version so not support all features of the board.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch adds support for SiFive Freedom U540 SoC.
First version is minimum only using UART, SPI and DDR memory area.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch changes condition of 'depends on' of sifive UART driver
to support other SoCs of SiFive Freedom series.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch fixes printf format specifier "%u" -> "%zu" for printing
an argument of size_t on 64bit environment.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
add board support for Dragino NBSN95 NB-IoT sensor
node. Initial support only includes UART (with followup
patches on BC95 and other peripherals)
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
