Commit graph

589 commits

Author SHA1 Message Date
Fabio Baltieri
794893315a intc: loapic: convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE
Convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE, this allows the build
system to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
ceb02b3f31 intc: intc_nxp_pint: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Adjust some DT_INST macro as well while at it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
e9a67aabf7 intc: swerv_pic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
aea618ebc0 intc: nuclei_eclic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
a7e0cb0c80 intc: vexriscv_litex: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Fix an incorrectly declared compatible and adjust some DT macros as
well.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
6fbe62bdb5 intc: arcv2: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
17ae9a7680 intc: gic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
1539ca906e intc: irqmp: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
843f66f52d intc: plic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Yong Cong Sin
7afbcdc619 drivers: intc: plic: fix the calculation of trig register
trig register should be independent of the `riscv,max-priority` property.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-09-18 20:35:22 +02:00
Huifeng Zhang
2c22e83dfb include: arch: arm: Remove aarch32 directory
This commit follows the parent commit work.

This commit introduces the following major changes.

  1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
    to the 'include/zephyr/arch/arm' directory.

  2. Change the path string which is influenced by the changement 1.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-09-13 10:08:05 +01:00
Fabio Baltieri
a1afaa8b47 drivers: ioapic: declare the device with DEVICE_DT_INST_DEFINE
Use DEVICE_DT_INST_DEFINE instead of DEVICE_DEFINE to declare the device
structure. This ensures that the device gets an ordinal and is
initialized before any device depending on it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-12 10:56:46 +02:00
Najumon B.A
a68204d8b8 arch: x86: update with new acpica lib interface
The old acpi implimentation is replaced with acpica interface
and updated x86 arch porting with the new interface.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-09-07 09:42:38 +02:00
Prashanth S
05fe627d79 drivers: interrupt-controller: Add VIM Interrupt Controller support
Add TI VIM (Vectored Interrupt Manager) interrupt controller support.
VIM is a TI specific custom interrupt controller for ARM cores.
In J721E soc, VIM aggregates interrupts to Cortex R5 cores.

TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
VIM: section 6.3.3.6

Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
2023-09-04 10:53:09 +02:00
Umar Nisar
31a6594212 drivers: loapic: add device tree support for loapic
As per #26393, Local APIC is using Kconfig based option for
the base address. This patch adds DTS binding support in the driver,
just like its conunter part I/O APIC.

Signed-off-by: Umar Nisar <umar.nisar@intel.com>
2023-09-01 16:36:18 +02:00
Chad Karaginides
47ffe578c8 drivers: gic: Redistributor Power Register
GIC-600 and later interrupt controllers have an additional
GICR_PWRR register that controls the power up sequencing
of the redistributors.  Added logic to gicv3_rdist_enable to
configure GICR_PWRR if required.

Signed-off-by: Chad Karaginides <quic_chadk@quicinc.com>
2023-08-31 10:24:48 +02:00
Gerard Marull-Paretas
2f836ed788 drivers: intc: nxp_pint: s/device.h/init.h
File is just using APIs from init.h (SYS_INIT).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-08-30 11:54:31 +02:00
Gerard Marull-Paretas
41deaeeea8 drivers: intc: gic: add missing init.h
Driver uses SYS_INIT, from init.h.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-08-29 15:56:41 +01:00
Gerard Marull-Paretas
561efe5557 drivers: intc: gicv3: add missing init.h
File was using SYS_INIT, from init.h.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-08-29 12:16:21 +01:00
Gerard Marull-Paretas
9c961571a2 modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-08-24 13:20:21 +02:00
Manuel Argüelles
297b7efb33 intc: nxp_s32: initialize after core intc
Following #60410, the NXP S32 external interrupt controller device
initializes after the core interrupt controller. Bump the NXP S32 intc
init level to initialize after the core intc and before the GPIO
device driver.

Fixes #61218

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-08-16 10:21:33 +02:00
Joshua Lilly
cce530cae4 scripts: build: gen_isr_tables: make bit masks configurable
Some architectures such as RISC-v support more than 255 interrupts
per aggrigator. This diff adds the ability to forgo the aggrigator
pattern and use a configurable number of bits for multilevel
interruts.

Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-08-10 10:55:41 -04:00
Joshua Lilly
67268f5cbd drivers: interrupt_controller: plic: support edge triggered interrupts
This adds a check and option for edge triggered interrupts

Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-07-31 10:08:52 +02:00
Marek Matej
6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Valentin Korenblit
4648917be4 drivers: gicv3: GICR_TYPER_LAST mask width is 1 bit
Fix compiler warning: bitwise comparison always evaluates to false

Signed-off-by: Valentin Korenblit <vkorenblit@sequans.com>
2023-07-18 19:10:11 +00:00
Benjamin Cabé
db53c3fd2c doc: Drop asterisk from Doxygen @param
The name for Doxygen params that are pointers should not include an
asterisk.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2023-07-13 13:25:28 +00:00
Fabio Baltieri
c2d049f56e intc_gicv3_its: anticipate initialization priority
The intc_gicv3_its driver is currently initializing in POST_KERNEL, but
PCIe device nodes depends on it and are initialized earlier. Change the
init level to PRE_KERNEL_1 to sort that out, and also put the driver in
line with other interrupt controller drivers.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-12 09:25:35 +02:00
Manuel Arguelles
671d857a60 drivers: intc: nxp_s32: support multiple interrupt handlers
SIUL2 may require multiple interrupt handlers instead of a single one as
currently supported for S32Z/E. This is needed to enable support on
S32K3.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-07-06 14:19:23 -05:00
Alexander Razinkov
cb491cacad drivers: support 64-bit addresses from devicetree for PLIC, MTIMER, UART
Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:

"warning: integer constant is so large that it is unsigned"

This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms

Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
2023-06-25 03:29:54 -04:00
Piotr Wojnarowski
2f5ac45e53 dts: bindings: interrupt-controller: GIC: Allow specifying version in DT
Currently, only the presence of a GIC is reflected in the device tree,
and its version must be set separately in each SoC's Kconfig.
This patch adds separate bindings for each GIC version whose presence
in the device tree automatically enables the corresponding Kconfig symbol.

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Carlo Caione
edd3437826 riscv: Rename Kconfig symbol to *_PRIVILEGED
Rename SOC_FAMILY_RISCV_PRIVILEGE to SOC_FAMILY_RISCV_PRIVILEGED because
the spec is "privileged".

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-06-09 11:46:29 -04:00
ferar alashkar
7920c6a8f4 drivers: intc: stm32: clarify controlling expression
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_is_pending' function return type, thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially boolean type.

Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.

Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).

Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
2023-06-07 04:40:17 -04:00
ferar alashkar
b6d8989236 drivers: intc: stm32: add break to switch-clause
add an unconditional break to switch-clause's default case, complying
with required [misra-c2012-16.3] rule which states; An unconditional
break statement terminate every switch-clause.

Found as a coding guideline violation (Rule 16.3) by static code
scanning tool.

Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).

Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
2023-06-06 09:41:52 -04:00
ferar alashkar
9d9386307a drivers: intc: stm32: use BIT macro with type cast argument
1. use 'BIT' macro instead of explicit left shift operations, since
'BIT' macro implicitly adds unsigned type suffix, avoiding possible
[shiftTooManyBitsSigned] scenarios, and

2. add an explicit uint32_t cast to 'BIT' macro argument, complying with
required [misra-c2012-10.1] rule which states; operands shall not be of
an inappropriate essential type.

Found as a coding guideline violation (Rule 10.1) by static code
scanning tool.

Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).

Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
2023-06-06 09:41:31 -04:00
Erwan Gouriou
290777b2b5 drivers: interrupt_controller: Use macros to access line_range prop values
Compiling previous code using LLVM reveals that accessing line_range
values in runtime is not clean, as the following error is generated:
"error: initializer element is not a compile-time constant"

Replace runtime method by compile time using UTIL_INC and UTIL_x2
macros.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-06-06 06:52:42 -04:00
ferar alashkar
42d7d114ae drivers: intc: stm32: clarify controlling expression
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_callback_t' (function pointer), thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially Boolean type.

Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.

Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).

Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
2023-06-05 13:55:10 -04:00
ferar alashkar
23cb9c0be8 drivers: intc: stm32: correct for counter type
change for loop iterator/counter type to unsigned int, thus matching
that of struct stm32_exti_range's len member var, complying with
required [misra-c2012-10.4] rule which states; Both operands of an
operator in which the usual arithmetic conversions are performed shall
have the same essential type category.

Found as a coding guideline violation (Rule 10.4) by static code
scanning tool.

Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).

Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
2023-06-05 13:52:43 -04:00
ferar alashkar
e99becd2b7 drivers: intc: stm32: explicitly set operator precedence
add enclosing parentheses enforcing and clarifying precedence of
operators, thus improving code readability and maintainability,
complying with *advisory* [misra-c2012-12.1] rule which states; The
precedence of operators within expressions should be made explicit.

Found as a coding guideline recommendation (Rule 12.1) by static code
scanning tool.

Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).

Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
2023-06-05 10:49:51 -04:00
Patryk Duda
6fc58718bd interrupt_controller: Fix clang compilation issues in intc_exti_stm32.c
Clang reports 'initializer element is not a compile-time constant' when
trying to initialize structure with elements of constant array. The
compiler is wrong in this case because the elements of the array are
known at compile time, so there are no obstacles to initialize structure
using it.

The problem was fixed by removing 'range' array and using
DT_PROP_BY_IDX() to get values directly from DT.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2023-05-31 14:41:25 -04:00
Jaxson Han
894f1b1fd7 drivers: gic: Add irq pending check and clear function
Implement irq pending check and clear function for both gic and gicv3.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-05-25 08:25:11 +00:00
Carlo Caione
6f3a13d974 barriers: Move __ISB() to the new API
Remove the arch-specific ARM-centric __ISB() macro and use the new
barrier API instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-05-24 13:13:57 -04:00
Carlo Caione
cb11b2e84b barriers: Move __DSB() to the new API
Remove the arch-specific ARM-centric __DSB() macro and use the new
barrier API instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-05-24 13:13:57 -04:00
Mulin Chao
9da9c90639 intc: miwu: npcx: improve interrupt latency of miwu input events
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-05-17 09:48:54 +02:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Ruibin Chang
b9a7340ded ITE drivers/interrupt_controller: add intc_ite_it8xxx2_v2 driver
This driver is made for it82xx2 series.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2023-04-19 03:48:38 -04:00
Daniel DeGrasse
6f938f347b drivers: interrupt_controller: introduce PINT driver
Introduce PINT driver, for NXP pin interrupt and pattern match engine.
The driver currently supports only the pin interrupt feature of the
PINT.

Add DTS entires for the PINT on LPC and RT devices that support this
peripheral, and remove the interrupt defintions that are PINT specific
from the GPIO module on these devices.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-04-18 16:14:57 -05:00
Gerard Marull-Paretas
a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Rodrigo Cataldo
04f519a7c3 drivers: interrupt_controller: imply the need for dynamic memory in ITS
The implementation of GIC v3 ITS uses k_aligned_malloc(), which will
only work if dynamic memory is available (system heap). Tell the user
that a dynamic memory pool is required.

The amount of memory will depend on registers probed during runtime.

Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
2023-04-07 13:26:01 +02:00
Anas Nashif
402ac9e409 drivers: remove references to old CAVS platforms
Remove reference to all dropped CAVS platforms in drivers.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-06 18:51:56 +02:00
Kumar Gala
161ca0376f drivers: intc: mchp_ecia_xec: Ensure correct device init order
We need to ensure that the XEC GIRQs are initialized after the
XEC ECIA device.  Right now we depend on the linker ordering
things correctly since everything is at INTC_INIT_PRIORITY
priority

Set the XEC GIRQs to 41 so the init priority is one more than
INTC_INIT_PRIORITY that is used by xec-ecia.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2023-04-06 11:50:13 +02:00