Convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE, this allows the build
system to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Adjust some DT_INST macro as well while at it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Fix an incorrectly declared compatible and adjust some DT macros as
well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit follows the parent commit work.
This commit introduces the following major changes.
1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
to the 'include/zephyr/arch/arm' directory.
2. Change the path string which is influenced by the changement 1.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
Use DEVICE_DT_INST_DEFINE instead of DEVICE_DEFINE to declare the device
structure. This ensures that the device gets an ordinal and is
initialized before any device depending on it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The old acpi implimentation is replaced with acpica interface
and updated x86 arch porting with the new interface.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Add TI VIM (Vectored Interrupt Manager) interrupt controller support.
VIM is a TI specific custom interrupt controller for ARM cores.
In J721E soc, VIM aggregates interrupts to Cortex R5 cores.
TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
VIM: section 6.3.3.6
Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
As per #26393, Local APIC is using Kconfig based option for
the base address. This patch adds DTS binding support in the driver,
just like its conunter part I/O APIC.
Signed-off-by: Umar Nisar <umar.nisar@intel.com>
GIC-600 and later interrupt controllers have an additional
GICR_PWRR register that controls the power up sequencing
of the redistributors. Added logic to gicv3_rdist_enable to
configure GICR_PWRR if required.
Signed-off-by: Chad Karaginides <quic_chadk@quicinc.com>
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).
To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.
All files including CMSIS have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Following #60410, the NXP S32 external interrupt controller device
initializes after the core interrupt controller. Bump the NXP S32 intc
init level to initialize after the core intc and before the GPIO
device driver.
Fixes#61218
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Some architectures such as RISC-v support more than 255 interrupts
per aggrigator. This diff adds the ability to forgo the aggrigator
pattern and use a configurable number of bits for multilevel
interruts.
Signed-off-by: Joshua Lilly <jgl@meta.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
The intc_gicv3_its driver is currently initializing in POST_KERNEL, but
PCIe device nodes depends on it and are initialized earlier. Change the
init level to PRE_KERNEL_1 to sort that out, and also put the driver in
line with other interrupt controller drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
SIUL2 may require multiple interrupt handlers instead of a single one as
currently supported for S32Z/E. This is needed to enable support on
S32K3.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:
"warning: integer constant is so large that it is unsigned"
This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
Currently, only the presence of a GIC is reflected in the device tree,
and its version must be set separately in each SoC's Kconfig.
This patch adds separate bindings for each GIC version whose presence
in the device tree automatically enables the corresponding Kconfig symbol.
Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_is_pending' function return type, thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially boolean type.
Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
add an unconditional break to switch-clause's default case, complying
with required [misra-c2012-16.3] rule which states; An unconditional
break statement terminate every switch-clause.
Found as a coding guideline violation (Rule 16.3) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
1. use 'BIT' macro instead of explicit left shift operations, since
'BIT' macro implicitly adds unsigned type suffix, avoiding possible
[shiftTooManyBitsSigned] scenarios, and
2. add an explicit uint32_t cast to 'BIT' macro argument, complying with
required [misra-c2012-10.1] rule which states; operands shall not be of
an inappropriate essential type.
Found as a coding guideline violation (Rule 10.1) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
Compiling previous code using LLVM reveals that accessing line_range
values in runtime is not clean, as the following error is generated:
"error: initializer element is not a compile-time constant"
Replace runtime method by compile time using UTIL_INC and UTIL_x2
macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_callback_t' (function pointer), thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially Boolean type.
Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
change for loop iterator/counter type to unsigned int, thus matching
that of struct stm32_exti_range's len member var, complying with
required [misra-c2012-10.4] rule which states; Both operands of an
operator in which the usual arithmetic conversions are performed shall
have the same essential type category.
Found as a coding guideline violation (Rule 10.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
add enclosing parentheses enforcing and clarifying precedence of
operators, thus improving code readability and maintainability,
complying with *advisory* [misra-c2012-12.1] rule which states; The
precedence of operators within expressions should be made explicit.
Found as a coding guideline recommendation (Rule 12.1) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
Clang reports 'initializer element is not a compile-time constant' when
trying to initialize structure with elements of constant array. The
compiler is wrong in this case because the elements of the array are
known at compile time, so there are no obstacles to initialize structure
using it.
The problem was fixed by removing 'range' array and using
DT_PROP_BY_IDX() to get values directly from DT.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce PINT driver, for NXP pin interrupt and pattern match engine.
The driver currently supports only the pin interrupt feature of the
PINT.
Add DTS entires for the PINT on LPC and RT devices that support this
peripheral, and remove the interrupt defintions that are PINT specific
from the GPIO module on these devices.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The init infrastructure, found in `init.h`, is currently used by:
- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices
They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:
```c
struct init_entry {
int (*init)(const struct device *dev);
/* only set by DEVICE_*, otherwise NULL */
const struct device *dev;
}
```
As a result, we end up with such weird/ugly pattern:
```c
static int my_init(const struct device *dev)
{
/* always NULL! add ARG_UNUSED to avoid compiler warning */
ARG_UNUSED(dev);
...
}
```
This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:
```c
static int my_init(void)
{
...
}
```
This is achieved using a union:
```c
union init_function {
/* for SYS_INIT, used when init_entry.dev == NULL */
int (*sys)(void);
/* for DEVICE*, used when init_entry.dev != NULL */
int (*dev)(const struct device *dev);
};
struct init_entry {
/* stores init function (either for SYS_INIT or DEVICE*)
union init_function init_fn;
/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
* to know which union entry to call.
*/
const struct device *dev;
}
```
This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.
**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
init: convert SYS_INIT functions to the new signature
Conversion scripted using scripts/utils/migrate_sys_init.py.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
manifest: update projects for SYS_INIT changes
Update modules with updated SYS_INIT calls:
- hal_ti
- lvgl
- sof
- TraceRecorderSource
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: devicetree: devices: adjust test
Adjust test according to the recently introduced SYS_INIT
infrastructure.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: kernel: threads: adjust SYS_INIT call
Adjust to the new signature: int (*init_fn)(void);
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The implementation of GIC v3 ITS uses k_aligned_malloc(), which will
only work if dynamic memory is available (system heap). Tell the user
that a dynamic memory pool is required.
The amount of memory will depend on registers probed during runtime.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
We need to ensure that the XEC GIRQs are initialized after the
XEC ECIA device. Right now we depend on the linker ordering
things correctly since everything is at INTC_INIT_PRIORITY
priority
Set the XEC GIRQs to 41 so the init priority is one more than
INTC_INIT_PRIORITY that is used by xec-ecia.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>