arch: x86: update with new acpica lib interface
The old acpi implimentation is replaced with acpica interface and updated x86 arch porting with the new interface. Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This commit is contained in:
parent
e5ec893c00
commit
a68204d8b8
11 changed files with 141 additions and 234 deletions
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@ -227,22 +227,16 @@ choice
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Reboot via the RST_CNT register, going back to BIOS.
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endchoice
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config X86_ACPI
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bool "ACPI (Advanced Configuration and Power Interface) support"
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depends on X86_PC_COMPATIBLE
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help
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Allow retrieval of platform configuration at runtime.
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config PCIE_MMIO_CFG
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bool "Use MMIO PCI configuration space access"
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select X86_ACPI
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select ACPI
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help
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Selects the use of the memory-mapped PCI Express Extended
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Configuration Space instead of the traditional 0xCF8/0xCFC
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IO Port registers.
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config KERNEL_VM_SIZE
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default 0x40000000 if X86_ACPI
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default 0x40000000 if ACPI
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config X86_PC_COMPATIBLE
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bool
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@ -15,7 +15,7 @@ zephyr_library_sources_ifdef(CONFIG_PCIE pcie.c)
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zephyr_library_sources_ifdef(CONFIG_REBOOT_RST_CNT reboot_rst_cnt.c)
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zephyr_library_sources_ifdef(CONFIG_MULTIBOOT_INFO multiboot.c)
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zephyr_library_sources_ifdef(CONFIG_X86_EFI efi.c)
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zephyr_library_sources_ifdef(CONFIG_X86_ACPI acpi.c)
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zephyr_library_sources_ifdef(CONFIG_ACPI legacy_bios.c)
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zephyr_library_sources_ifdef(CONFIG_X86_MMU x86_mmu.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.c)
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zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c)
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@ -11,7 +11,7 @@
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#include <zephyr/arch/x86/multiboot.h>
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#include <x86_mmu.h>
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#include <zephyr/drivers/interrupt_controller/loapic.h>
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#include <zephyr/arch/x86/acpi.h>
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#include <zephyr/acpi/acpi.h>
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BUILD_ASSERT(CONFIG_MP_MAX_NUM_CPUS <= 4, "Only supports max 4 CPUs");
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@ -142,13 +142,12 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
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uint8_t vector = ((unsigned long) x86_ap_start) >> 12;
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uint8_t apic_id;
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if (IS_ENABLED(CONFIG_X86_ACPI)) {
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struct acpi_cpu *cpu;
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if (IS_ENABLED(CONFIG_ACPI)) {
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struct acpi_madt_local_apic *lapic = acpi_local_apic_get(cpu_num);
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cpu = z_acpi_get_cpu(cpu_num);
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if (cpu != NULL) {
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/* We update the apic_id, x86_ap_start will need it. */
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x86_cpu_loapics[cpu_num] = cpu->apic_id;
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if (lapic != NULL) {
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/* We update the apic_id, __start will need it. */
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x86_cpu_loapics[cpu_num] = lapic->Id;
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}
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}
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53
arch/x86/core/legacy_bios.c
Normal file
53
arch/x86/core/legacy_bios.c
Normal file
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@ -0,0 +1,53 @@
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/*
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* Copyright (c) 2023 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#define DATA_SIZE_K(n) (n * 1024u)
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#define RSDP_SIGNATURE ((uint64_t)0x2052545020445352)
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#define EBDA_ADD (0x040e)
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#define BIOS_RODATA_ADD (0xe0000)
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#define BIOS_EXT_DATA_LOW (0x80000UL)
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#define BIOS_EXT_DATA_HIGH (0x100000UL)
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static uintptr_t bios_search_rsdp_buff(uintptr_t search_phy_add, uint32_t search_length)
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{
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uint64_t *search_buff;
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z_phys_map((uint8_t **)&search_buff, search_phy_add, search_length, 0);
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if (!search_buff) {
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return 0;
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}
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for (int i = 0; i < search_length / 8u; i++) {
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if (search_buff[i] == RSDP_SIGNATURE) {
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z_phys_unmap((uint8_t *)search_buff, search_length);
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return (search_phy_add + (i * 8u));
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}
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}
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z_phys_unmap((uint8_t *)search_buff, search_length);
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return 0;
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}
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void *bios_acpi_rsdp_get(void)
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{
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uint8_t *bios_ext_data, *zero_page_base;
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uintptr_t search_phy_add, rsdp_phy_add;
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z_phys_map(&zero_page_base, 0, DATA_SIZE_K(4u), 0);
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bios_ext_data = EBDA_ADD + zero_page_base;
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search_phy_add = (uintptr_t)((*(uint16_t *)bios_ext_data) << 4u);
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z_phys_unmap(zero_page_base, DATA_SIZE_K(4u));
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if ((search_phy_add >= BIOS_EXT_DATA_LOW) && (search_phy_add < BIOS_EXT_DATA_HIGH)) {
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rsdp_phy_add = bios_search_rsdp_buff(search_phy_add, DATA_SIZE_K(1u));
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if (rsdp_phy_add) {
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return (void *)rsdp_phy_add;
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}
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}
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return (void *)bios_search_rsdp_buff(BIOS_RODATA_ADD, DATA_SIZE_K(128u));
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}
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@ -8,8 +8,8 @@
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#include <zephyr/sys/device_mmio.h>
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#include <zephyr/drivers/pcie/pcie.h>
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#ifdef CONFIG_X86_ACPI
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#include <zephyr/arch/x86/acpi.h>
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#ifdef CONFIG_ACPI
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#include <zephyr/acpi/acpi.h>
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#endif
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#ifdef CONFIG_PCIE_MSI
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@ -35,26 +35,26 @@ static bool do_pcie_mmio_cfg;
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static void pcie_mm_init(void)
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{
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#ifdef CONFIG_X86_ACPI
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struct acpi_mcfg *m = z_acpi_find_table(ACPI_MCFG_SIGNATURE);
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#ifdef CONFIG_ACPI
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struct acpi_mcfg *m = acpi_table_get("MCFG", 0);
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if (m != NULL) {
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int n = (m->sdt.length - sizeof(*m)) / sizeof(m->pci_segs[0]);
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int n = (m->header.Length - sizeof(*m)) / sizeof(m->pci_segs[0]);
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for (int i = 0; i < n && i < MAX_PCI_BUS_SEGMENTS; i++) {
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size_t size;
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uintptr_t phys_addr;
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bus_segs[i].start_bus = m->pci_segs[i].start_bus;
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bus_segs[i].n_buses = 1 + m->pci_segs[i].end_bus
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- m->pci_segs[i].start_bus;
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bus_segs[i].start_bus = m->pci_segs[i].StartBusNumber;
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bus_segs[i].n_buses =
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1 + m->pci_segs[i].EndBusNumber - m->pci_segs[i].StartBusNumber;
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phys_addr = m->pci_segs[i].base_addr;
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phys_addr = m->pci_segs[i].Address;
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/* 32 devices & 8 functions per bus, 4k per device */
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size = bus_segs[i].n_buses * (32 * 8 * 4096);
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device_map((mm_reg_t *)&bus_segs[i].mmio, phys_addr,
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size, K_MEM_CACHE_NONE);
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device_map((mm_reg_t *)&bus_segs[i].mmio, phys_addr, size,
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K_MEM_CACHE_NONE);
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}
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do_pcie_mmio_cfg = true;
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@ -6,7 +6,7 @@
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#include <zephyr/kernel.h>
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#include <kernel_internal.h>
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#include <zephyr/arch/x86/acpi.h>
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#include <zephyr/acpi/acpi.h>
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#include <zephyr/arch/x86/multiboot.h>
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#include <zephyr/arch/x86/efi.h>
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#include <x86_mmu.h>
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@ -120,7 +120,7 @@ static void IoApicRedUpdateLo(unsigned int irq, uint32_t value,
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!defined(CONFIG_INTEL_VTD_ICTL_XAPIC_PASSTHROUGH)
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#include <zephyr/drivers/interrupt_controller/intel_vtd.h>
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#include <zephyr/arch/x86/acpi.h>
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#include <zephyr/acpi/acpi.h>
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static const struct device *const vtd =
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DEVICE_DT_GET_OR_NULL(DT_INST(0, intel_vt_d));
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@ -129,11 +129,19 @@ static uint16_t ioapic_id;
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static bool get_vtd(void)
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{
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union acpi_dmar_id *dmar_id;
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int inst_cnt;
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if (vtd != NULL) {
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return true;
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}
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ioapic_id = z_acpi_get_dev_id_from_dmar(ACPI_DRHD_DEV_SCOPE_IOAPIC);
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/* Assume only one PCH in system (say client platform). */
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if (!acpi_drhd_get(ACPI_DMAR_SCOPE_TYPE_IOAPIC, NULL, &dmar_id, &inst_cnt, 1u)) {
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return false;
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}
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ioapic_id = dmar_id->raw;
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return vtd == NULL ? false : true;
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}
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16
include/zephyr/acpi/acpi_osal.h
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16
include/zephyr/acpi/acpi_osal.h
Normal file
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@ -0,0 +1,16 @@
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/*
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* Copyright (c) 2023 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_ARCH_X86_INCLUDE_ACPI_OSAL_H_
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#define ZEPHYR_ARCH_X86_INCLUDE_ACPI_OSAL_H_
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#if defined(CONFIG_X86 || CONFIG_X86_64)
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#include "zephyr/acpi/x86_acpi_osal.h"
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#else
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#error "Currently only x86 Architecture support ACPI !!"
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#endif
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#endif /* ZEPHYR_ARCH_X86_INCLUDE_ACPI_OSAL_H_ */
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@ -1,204 +0,0 @@
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/*
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* Copyright (c) 2020 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_X86_ACPI_H
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#define ZEPHYR_INCLUDE_ARCH_X86_ACPI_H
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#ifndef _ASMLANGUAGE
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#define ACPI_RSDP_SIGNATURE 0x2052545020445352 /* == "RSD PTR " */
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/* Root System Description Pointer */
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struct acpi_rsdp {
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char signature[8];
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uint8_t chksum;
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char oem_id[6];
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uint8_t revision;
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uint32_t rsdt_ptr;
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uint32_t length;
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uint64_t xsdt_ptr;
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uint8_t ext_chksum;
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uint8_t _reserved[3];
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} __packed;
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/* Standard table header */
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struct acpi_sdt {
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uint32_t signature;
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uint32_t length;
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uint8_t revision;
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uint8_t chksum;
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char oem_id[6];
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char oem_table_id[8];
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uint32_t oem_revision;
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uint32_t creator_id;
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uint32_t creator_revision;
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} __packed;
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/* Root System Description Table */
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struct acpi_rsdt {
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struct acpi_sdt sdt;
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uint32_t table_ptrs[];
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} __packed;
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/* eXtended System Descriptor Table */
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struct acpi_xsdt {
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struct acpi_sdt sdt;
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uint64_t table_ptrs[];
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} __packed;
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/* MCFG table storing MMIO addresses for PCI configuration space */
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#define ACPI_MCFG_SIGNATURE 0x4746434d /* 'MCFG' */
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struct acpi_mcfg {
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struct acpi_sdt sdt;
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uint64_t _reserved;
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struct {
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uint64_t base_addr;
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uint16_t seg_group_num;
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uint8_t start_bus;
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uint8_t end_bus;
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} pci_segs[];
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} __packed;
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/* MADT table storing IO-APIC and multiprocessor configuration */
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#define ACPI_MADT_SIGNATURE 0x43495041 /* 'APIC' */
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struct acpi_madt_entry {
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uint8_t type; /* See ACPI_MADT_ENTRY_* below */
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uint8_t length;
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} __packed;
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#define ACPI_MADT_ENTRY_CPU 0
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struct acpi_madt {
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struct acpi_sdt sdt;
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uint32_t loapic; /* local APIC MMIO address */
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uint32_t flags; /* see ACPI_MADT_FLAGS_* below */
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struct acpi_madt_entry entries[];
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} __packed;
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#define ACPI_MADT_FLAGS_PICS 0x01 /* legacy 8259s installed */
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struct acpi_cpu {
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struct acpi_madt_entry entry;
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uint8_t acpi_id;
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uint8_t apic_id; /* local APIC ID */
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uint8_t flags; /* see ACPI_CPU_FLAGS_* below */
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} __packed;
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#define ACPI_CPU_FLAGS_ENABLED 0x01
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/* Generic DMA Remapping entry structure part */
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struct acpi_dmar_entry {
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uint16_t type; /* See ACPI_DMAR_TYPE_* below */
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uint16_t length;
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} __packed;
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#define ACPI_DMAR_TYPE_DRHD 0 /* DMA Remapping Hardware Unit Definition */
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#define ACPI_DMAR_TYPE_RMRR 1 /* Do not care atm (legacy usage) */
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#define ACPI_DMAR_TYPE_ATSR 2 /* Do not care atm (PCIE ATS support) */
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#define ACPI_DMAR_TYPE_RHSA 3 /* Do not care atm (NUMA specific ) */
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#define ACPI_DMAR_TYPE_ANDD 4 /* Do not care atm (ACPI DSDT related) */
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#define ACPI_DMAR_TYPE_SACT 5 /* Do not care atm */
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/* PCI Device/Function Pair (forming the BDF, with start_bus_num below) */
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struct acpi_dmar_dev_path {
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uint8_t device;
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uint8_t function;
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} __packed;
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#define ACPI_DMAR_DEV_PATH_SIZE 2
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/* DMA Remapping Device Scope */
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struct acpi_dmar_dev_scope {
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uint8_t type; /* See ACPI_DRHD_DEV_SCOPE_* below */
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uint8_t length; /* 6 + X where X is Path attribute size */
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uint16_t _reserved;
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uint8_t enumeration_id;
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uint8_t start_bus_num; /* PCI bus, forming BDF with each Path below */
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struct acpi_dmar_dev_path path[]; /* One is at least always found */
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} __packed;
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#define ACPI_DMAR_DEV_SCOPE_MIN_SIZE 6
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#define ACPI_DRHD_DEV_SCOPE_PCI_EPD 0x01
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#define ACPI_DRHD_DEV_SCOPE_PCI_SUB_H 0x02
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#define ACPI_DRHD_DEV_SCOPE_IOAPIC 0x03
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#define ACPI_DRHD_DEV_SCOPE_MSI_CAP_HPET 0x04
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#define ACPI_DRHD_DEV_SCOPE_NAMESPACE_DEV 0x05
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struct acpi_drhd {
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struct acpi_dmar_entry entry;
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uint8_t flags; /* See ACPI_DRHD_FLAG_* below */
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uint8_t _reserved;
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uint16_t segment_num; /* Associated PCI segment */
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uint64_t base_address; /* Base address of the remapping hw */
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struct acpi_dmar_dev_scope device_scope[];
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} __packed;
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#define ACPI_DRHD_MIN_SIZE 16
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#define ACPI_DRHD_FLAG_INCLUDE_PCI_ALL BIT(0)
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#define ACPI_DMAR_SIGNATURE 0x52414D44 /* 'DMAR' */
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#define ACPI_DMAR_FLAG_INTR_REMAP BIT(0)
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#define ACPI_DMAR_FLAG_X2APIC_OPT_OUT BIT(1)
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#define ACPI_DMAR_FLAG_DMA_CTRL_PLATFORM_OPT_IN BIT(2)
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/* DMA Remapping reporting structure */
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struct acpi_dmar {
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struct acpi_sdt sdt;
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uint8_t host_addr_width;
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uint8_t flags;
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uint8_t _reserved[10];
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struct acpi_dmar_entry remap_entries[];
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} __packed;
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union acpi_dmar_id {
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struct {
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uint16_t function : 3;
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uint16_t device : 5;
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uint16_t bus : 8;
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} bits;
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uint16_t raw;
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};
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#if defined(CONFIG_X86_ACPI)
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void *z_acpi_find_table(uint32_t signature);
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struct acpi_cpu *z_acpi_get_cpu(int n);
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struct acpi_dmar *z_acpi_find_dmar(void);
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struct acpi_drhd *z_acpi_find_drhds(int *n);
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struct acpi_dmar_dev_scope *z_acpi_get_drhd_dev_scopes(struct acpi_drhd *drhd,
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int *n);
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struct acpi_dmar_dev_path *
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z_acpi_get_dev_scope_paths(struct acpi_dmar_dev_scope *dev_scope, int *n);
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uint16_t z_acpi_get_dev_id_from_dmar(uint8_t dev_scope_type);
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#else /* CONFIG_X86_ACPI */
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#define z_acpi_find_table(...) NULL
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#define z_acpi_get_cpu(...) NULL
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#define z_acpi_find_dmar(...) NULL
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#define z_acpi_find_drhds(...) NULL
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#define z_acpi_get_drhd_dev_scopes(...) NULL
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#define z_acpi_get_dev_scope_paths(...) NULL
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||||
#define z_acpi_get_dev_id_from_dmar(...) USHRT_MAX
|
||||
|
||||
#endif /* CONFIG_X86_ACPI */
|
||||
|
||||
#endif /* _ASMLANGUAGE */
|
||||
|
||||
#endif /* ZEPHYR_INCLUDE_ARCH_X86_ACPI_H */
|
12
include/zephyr/arch/x86/legacy_bios.h
Normal file
12
include/zephyr/arch/x86/legacy_bios.h
Normal file
|
@ -0,0 +1,12 @@
|
|||
/*
|
||||
* Copyright (c) 2023 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef ZEPHYR_ARCH_X86_INCLUDE_LEGACY_BIOS_H_
|
||||
#define ZEPHYR_ARCH_X86_INCLUDE_LEGACY_BIOS_H_
|
||||
|
||||
void *bios_acpi_rsdp_get(void);
|
||||
|
||||
#endif /* ZEPHYR_ARCH_X86_INCLUDE_LEGACY_BIOS_H_ */
|
29
include/zephyr/arch/x86/x86_acpi_osal.h
Normal file
29
include/zephyr/arch/x86/x86_acpi_osal.h
Normal file
|
@ -0,0 +1,29 @@
|
|||
/*
|
||||
* Copyright (c) 2023 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#include <zephyr/arch/x86/efi.h>
|
||||
#include <zephyr/arch/x86/legacy_bios.h>
|
||||
|
||||
#ifndef ZEPHYR_ARCH_X86_INCLUDE_X86_ACPI_H_
|
||||
#define ZEPHYR_ARCH_X86_INCLUDE_X86_ACPI_H_
|
||||
|
||||
#if defined(CONFIG_X86_EFI)
|
||||
static inline void *acpi_rsdp_get(void)
|
||||
{
|
||||
void *rsdp = efi_get_acpi_rsdp();
|
||||
|
||||
if (!rsdp) {
|
||||
rsdp = bios_acpi_rsdp_get();
|
||||
}
|
||||
|
||||
return rsdp;
|
||||
}
|
||||
#else
|
||||
static inline void *acpi_rsdp_get(void)
|
||||
{
|
||||
return bios_acpi_rsdp_get();
|
||||
}
|
||||
#endif /* CONFIG_X86_EFI */
|
||||
#endif /* ZEPHYR_ARCH_X86_INCLUDE_X86_ACPI_H_ */
|
Loading…
Add table
Add a link
Reference in a new issue