The `nocache` is not loadable, thus data stored therein cannot be
initialized by the startup code. This might be needed in special
cases. E.g. One might have a buffer which one wants to DMA into,
and which is a member of a struct. Other members of the struct one
may want to have initialized by the startup code.
The buffer thus should be placed in the `nocache` region, but for
the other members of the buffer to be initialized by the startup
code, the `nocache` region needs to be loadable.
Fix it by making the `nocache` region loadable. Adding a KConfig
symbol to do this optionally was considered, but deemed unnecessary
during the PR.
Signed-off-by: Julian Achatzi <mail@achatzi.pro>
The logic of clock initialization for i2c fast mode (FM) and fast
mode plus (FMP) is as follows:
1 compute how many system clock cycles for SCL to be low
2 compute how many system clock cycles for SCL to be high by
subtracting the low duration computed above from the SCL period
3 verify the high duration computed in 2 is larger than a minimum
The bug is that the step 3 for the FMP is compared with the
minimum value for FM, and causes it to fail.
The fix corrects the bug.
Signed-off-by: Hu Dou <hugh.dou@gmail.com>
Two issues:
- is_condition_met() was missing proper code for The
K_POLL_TYPE_PIPE_DATA_AVAILABLE case
- z_handle_obj_poll_events() was misplaced in z_impl_k_pipe_write()
Note: I added support for the deprecated pipe implementation to
is_condition_met() but that is untested.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Intel Audio DSP ACE needs to use arch_spin_relax() to give
the bus more time to propagate the RCW transactions among
CPUs, and to avoid sending too many requests to the bus
after failing to lock spinlocks. However, the number of
NOPs results in a very big arch_spin_relax() that spans
multiple instruction cache lines, and requires evicting
them just for NOPs. With 5 CPUs, it can span 6 cache
lines (if using nop.n instead of nop). That's a waste of
space and cache. So instead, we do a tight loop instead.
Since the SoC supports zero-overhead loops, this should
have minimal performance impact.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For some weird unknown reasons, the simulator really do not
like the cpuhold_* variables to be tightly packed together.
This results in cpuhold_spawned not being updated, and we
will be stuck in the while loop for it to be set.
Workaround this by explicitly aligning these variables on
16 byte boundary. This seems to work for now.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update power state selection. Previously, it was iterating over states
starting from the last one so the most common short sleep periods were
taking the longest time to select. Order is now swapped so that short
sleeps will get power state as quick as possible.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
When all states are locked or latency requirement cannot be met
by any power state it is important to be able to quickly exit
suspend procedure because that usually means that application
requires high performance. Add function for detecting if any
power state is available.
Additionally, add function pm_policy_state_is_available for
checking if given state is available which means that it is not
locked and fulfills current latency requirement.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Update the HW models module to:
d5b95fdd0260e8189e788d40d2863d1e2d4be159
Including the following:
d5b95fd grtc hal replacement: Fix bug in nrf_grtc_int_group_enable/
disable()
5f3641d GRTC: With a CC in the past evaluate immediately
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
- Remove duplicated conf/.overlay configuration for
mimmxrt1170_evk A and B revisions that have the same content.
- No change if .conf/.overlay have different content.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Provide proper adaptions as bootloader ROM offset, flash load
offset and dts definitions for the nRF54H20 iron board to make it
ready for the MCUBoot bootloader.
Signed-off-by: Michal Kozikowski <michal.kozikowski@nordicsemi.no>
In the default configuration, cv32a6 does not have an FPU and does not
implement RISC-V's F and D extensions.
Hence, the FPU flags should not be added.
In the future, a second SoC for cv32a6 systems with FPU can be added.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
The nullpointer address (0x0) is mapped to the debug module in cva6,
making it a valid address.
Thus, in the coredump test, trigger an exception using k_panic()
instead.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
The original commit uses the incorrect value 42 for
CONFIG_MAX_IRQ_PER_AGGREGATOR for the cva6 family of SoCs,
which is the total number of IRQs in the system.
This commit corrects this to 30, the number of IRQs for the PLIC.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
This commit adds the necessary configurations for building and testing
cva6 boards (cv64a6_genesys_2, cv32a6_genesys_2) with twister.
This has been validated against commit
8a9d7a832b7121dd6f9be61a380d1d89ebf2a5f3 of the cva6 hardware project.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
In hardware, cva6 currently only provides global disable/enable
functions for the Dcache and Icache. Disabling and re-enabling them also
has the effect of flushing and invalidating the cache.
Future cva6 SoCs will add support RISC-V's standardized cache management
operations.
This commit provides a default implementation for all methods currently
part of the cache API. These implementations can be overwritten at board
or SoC level, as they use weak linking.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
The device tree entry for cva6 is currently missing a device tree node
for the mtime and mtimecmp registers in the core-local interrupt
controllers.
This causes the RISC-V machine timer driver not to be built, causing
build failures as the system clock is missing.
This commit rectifies this by adding the corresponding device tree
entry.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
`pthread_setspecific` requires a stack in order to allocate the
`struct pthread_key_data` data structure. On 64 bit systems this data
structure is 32 bytes, resulting in 160 bytes usage for the default 5
supported threads.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Don't `imply POSIX_MESSAGE_PASSING` when `POSIX_API=y` as this option
has a non-trivial RAM implication in `HEAP_MEM_POOL_ADD_SIZE_MQUEUE`.
The `mq_*` API is minimally used in-tree, with all users already
enabling the symbol directly.
Signed-off-by: Jordan Yates <jordan@embeint.com>
The required jlink script was not added due to missing entry in the
board check. Also change the check for app vs rad to be on SOC level.
Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
- Sets MAIN_STACK_SIZE in prj.conf to 2048 (default is 1024)
to avoid possible stack overflow
and adding new .conf files per board.
- Deletes existing board .conf files, as they are not needed anymore.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
The flash size is the second part (size) of the first reg value, not the
first part (address) of a nonexistent second reg value.
Based-on-patch-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Extend timeout on k_mem_slab_alloc() for kernel.memory_slabs
memory_slab_1cpu.mslab test suite as a workaround to allow its run
on slow platforms, e.g. simulated intel_ish_5_8_0.
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
For enterprise mode we need to install multiple certs to the TLS
credentials store, so, add a helper script in python to make it work
cross-platforms.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
This commit fixes all includes in testlib according to IWYU rules and
sorts all includes in ascending order by name.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
This commit adds an option to verify weather the host has read the value
after the wire 3-0 bits have been updated.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
When compiling with C++ enabled (CONFIG_CPP), add an unused member to
prevent an empty struct; this makes the struct size the same for both C
and C++.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
As the sample uses VLAN which needs Ethernet support make sure
CONFIG_NET_L2_ETHERNET is set in prj.conf file.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
