Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Replace npcx register base address type, uint32_t, with uintptr_t.
It is easier to know what type of base address and for linear
addresses treated as integral values.
This CL also modified IS_BIT_SET() macro function to fit MISRA code
guidelines.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add pin controller support for Nuvoton NPCX series
Add pin-mux controller support for Nuvoton NPCX series.
This CL includes:
1. Add pin controller device tree declarations and introduce alt-cells
to select pads' functionality.
2. Add npcx7-alts-map.dtsi since the mapping between IO and controller
is irregular and vary in each chip series.
3. Add nuvoton,npcx-pinctrl-def.yaml and its declarations to change all
pads' functionality to GPIO by default.
4. Pinmux controller driver implementation.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This patch adds a pinmux driver allowing to configure the IOCON (I/O
control) registers found on the LPC11U6x MCUs.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Fixed AF for USART 6 on PC6/PC7 PG8/PG9/PG12/PG13/PG14/PG15
All RTS/CTS/RX/TX pins now have correct AF7 instead of wrong AF8.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
All pinmux supporting CAN, SPI and I2C of F7 series are added.
Since the F7 series supports up to two CANs,
the pin names of CANs have been changed.
Several minor pinmux errors have also been fixed.
Sorted by Alternate function.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
The STM32L072CZ MCU has a built-in USB device controller which is
supported by Zephyr's USB STM32 driver. The b_l072z_lrwan1 board has a
micro-USB connector that is wired to the MCU via two solder bridges
(SB15 and SB16) that need to be closed to connect the data lines.
Update the board documentation to describe the solder bridges and
enable the USB controller in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:
- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
for macros which are equivalent to
DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name
Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.
This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.
Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.
To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:
- emit macros for all existing nodes in gen_defines.py, regardless
of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Changes:
- Added all required board files in /boards/arm/96b_aerocore2
- Modified pinmux for stm32f4
Most of the changes in this PR is based on reverse-engineering of the
PCB layout and following commits in the PX4 firmware repository for
the same board. The manufacturer does not provide and or generate
schematics and pinout tables for this board.
This PR includes almost all of the interfaces connected to the STM32
MCU, the only thing not included is the J9 and J8 headers that connect
to a 96Boards baseboard.
These headers are not vital to the functionality of the Aerocore2.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Update dtsi and pinmux macros for stm32f7 family. Add sdmmc1 to dts file
for stm32f746g_disco. Also add board specific configuration file for
fat_fs sample.
Signed-off-by: Helge Juul <helge@fastmail.com>
Update the dtsi for stm32l471 (which the higher SoCs are based on) to
support the stm32-sdmmc disk access device. Enable the device for the
stm32l496g_disco board, and update the pinmuxing.
Note that the stm32l496g_disco board also has a card detect gpio
(MFX_GPIO8), but this is not supported yet. When not specified the
driver will assume a card is present.
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Add support for ADC on H7 series. Note that ADC1 and ADC2 share the same
register set, so it is added as "adc1_2".
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Like stm32 L4 does,
when the STM32WBx SoC goes into STOP mode, the SPI device is disabled.
This cause the pins to not be drived anymore (i.e. they are floating)
except through their pull-up or pull-down.
From the logical point of view, the NSS pin is held high by a pull-up
so it's not a problem if the other pins are floating. However those pins
are floating input for the slaves, which increase their power
consumption.
The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove semicolon between instance invocations of DT_FOREACH_IMPL_ and
thus DT_INST_FOREACH. This provides more flexibility to the user. This
requires we fixup in tree users to add semicolon where needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* Define USB driver for base stm32wb device.
* Enable USB for the nucleo_wb55rg board.
* Properly initialize USB power + clock for the platform.
Signed-off-by: Pete Johanson <peter@peterjohanson.com>
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear. As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix some wrong assignments for SPI2 and add all other alternative
functions for USART, I2C, SPI and CAN according to STM32F091VC
datasheet, which is at the top end of this series.
https://www.st.com/resource/en/datasheet/stm32f091vc.pdf
Signed-off-by: Martin Jäger <martin@libre.solar>
Convert driver to use the new device tree macro's instead of
dts_fixup.h based macros. This moves us closer to removing both
dts_fixup.h and per instance Kconfig symbols.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Convert pinmux driver to use nodelabels to get references to devicetree
nodes using the new devicetree.h macros.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add I2C1 SDA/SCL configuration on pins PA9 and PA10, as they are
currently only available on other pins.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Convert driver to use new DT_INST macros throughout. This allows us to
also remove dts_fixup.h that are no longer used.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When the STM32L4x SoC goes into STOP mode, the SPI device is disabled.
This cause the pins to not be drived anymore (i.e. they are floating)
except through their pull-up or pull-down.
From the logical point of view, the NSS pin is held high by a pull-up
so it's not a problem if the other pins are floating. However those pins
are floating input for the slaves, which increase their power
consumption.
The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Most of the MISO and MOSI SPI pins of STM32L4 SoCs are configured with
a pull-down except PE14 and PE15. Change them for consistency.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.
Updated the openisa,rv32m1_vega-pinmux binding to require the label
property and updated the rv32m1.dtsi to add label properties for the
pinmux nodes.
Also update gpio_basic_api test to use DT_NODELABEL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
