drivers: pinmux: stm32wb: use a pull-down for SPI SCK pin
Like stm32 L4 does, when the STM32WBx SoC goes into STOP mode, the SPI device is disabled. This cause the pins to not be drived anymore (i.e. they are floating) except through their pull-up or pull-down. From the logical point of view, the NSS pin is held high by a pull-up so it's not a problem if the other pins are floating. However those pins are floating input for the slaves, which increase their power consumption. The solution is to hold the state of the pins through a pull-up or a pull-down. This is already done for the NSS and MOSI pins, but not for SCK. Fix that by using pull-down on the SCK pin the same way it is already done for the MOSI pin. Signed-off-by: Francois Ramu <francois.ramu@st.com>
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1 changed files with 8 additions and 8 deletions
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@ -38,11 +38,11 @@
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/* SPI1 */
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#define STM32WBX_PINMUX_FUNC_PA1_SPI1_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PA4_SPI1_NSS \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
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#define STM32WBX_PINMUX_FUNC_PA5_SPI1_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PA6_SPI1_MISO \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PA7_SPI1_MOSI \
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@ -56,7 +56,7 @@
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/* SPI2 */
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#define STM32WBX_PINMUX_FUNC_PA9_SPI2_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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/* Timer 1 */
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#define STM32WBX_PINMUX_FUNC_PA8_TMR1_CH1 \
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@ -118,7 +118,7 @@
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#define STM32WBX_PINMUX_FUNC_PB2_SPI1_NSS \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
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#define STM32WBX_PINMUX_FUNC_PB3_SPI1_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PB4_SPI1_MISO \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PB5_SPI1_MOSI \
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@ -128,11 +128,11 @@
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#define STM32WBX_PINMUX_FUNC_PB9_SPI2_NSS \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
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#define STM32WBX_PINMUX_FUNC_PB10_SPI2_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PB12_SPI2_NSS \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
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#define STM32WBX_PINMUX_FUNC_PB13_SPI2_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PB14_SPI2_MISO \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PB15_SPI2_MOSI \
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@ -185,9 +185,9 @@
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#define STM32WBX_PINMUX_FUNC_PD0_SPI2_NSS \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
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#define STM32WBX_PINMUX_FUNC_PD1_SPI2_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PD3_SPI2_SCK \
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(STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL)
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(STM32_PINMUX_ALT_FUNC_3 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PD3_SPI2_MISO \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32WBX_PINMUX_FUNC_PD4_SPI2_MOSI \
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