When exiting power gated state, call the CPU start function
passed to arch_start_cpu().
Signed-off-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Cavs platforms starts from Apllolake to Raptorlake. Some of them need some
workaround for arch_cpu_idle so create a bespoken one. Each workaround is
configured by kconfig setting.
Signed-off-by: Rander Wang <rander.wang@intel.com>
Save secondary dsp context when it is powered off in idle thread
and restore it when the secondary dsp is powered up. The algorithm
is aligned with ace platform.
Tested on a tgl platform.
Signed-off-by: Rander Wang <rander.wang@intel.com>
Fix a bug on cavs platform that secondary core is not powered off
by SET_DX ipc message sometimes. Secondary core is set into idle
state when switching to SOF_OFF state and then halted by primary
core. The interrupt is enabled before entring idle state, so the
secondary core may be woken up by interrupt and soc_cpus_active
is set to true before it is halted by hardware power gating. This
result to error when SOF check soc_cpus_active after the secondary
is halted.
This patch doesn't enable interrupt before idle entry to avoid above issue.
Signed-off-by: Rander Wang <rander.wang@intel.com>
The assert on L3_MEM_BASE_ADDR is incorrect, we need must convert
to uncached before use.
Fixes: ffd2121c65 ("soc: xtensa: intel_adsp: cavs: fix
power_down_cavs() signature")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The second argument 'uint32_t *hpsram_pg_mask' must be a cached
pointer and this needs to be reflected in function prototype.
Fixes sparse warning:
/zep_workspace/zephyr/soc/xtensa/intel_adsp/cavs/power.c:106:63:
warning: incorrect type in argument 2 (different address spaces)
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Converting between cached and uncached aliases should have correct
sparse annotations. Fix following sparse warning:
/zep_workspace/zephyr/soc/xtensa/intel_adsp/cavs/power.c:97:53: warning:
incorrect type in argument 1 (different address spaces)
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Add an option to control whether or not hpsram banks should
be switched off during the power down. This is particular useful
when running tests because we don't want to lose the contents
of the memory window before we capture it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The PM hooks were guarded with CONFIG_PM_POLICY_CUSTOM, however, they
need to be guarded (if file is always compiled) with CONFIG_PM. In fact,
CONFIG_PM_POLICY_CUSTOM requires to implement a custom policy hook,
something this module did not provide.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Remove unnecessary __weak attribute from power management functions.
These functions are now defined once, globally, and mandatory for
systems that support CONFIG_PM.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add simple mechanism to load the image from IMR memory. Basically we are
only setting a flag in power off for the next boot to jump to existing
image in IMR.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Amount of memory banks should vary depending on platform, otherwise
power down sequence might result in ipc timeout as the memory used by
the ipc itself is shutdown.
Lift the needed defines from sram.c to adsp_memory.h and shorten the
names to avoid collision with sof code. No functional change to sram.c.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Build of Intel cAVS2.5 platforms fails due to undefined reference
sys_cache_data_flush_and_invd_all(). Fix this by adding missing
header include to bring in the inline definition for this function.
Fixes: 6388f5f106 ("xtensa: use sys_cache API instead of custom interfaces")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The power off sequence in cavs is meant to be used only by custom pm
policy handler thus guard it with proper ifdefs.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Start using zephyr power management in cavs platform in a similar way
that is already done in ace. This commit only addresses the power off/on
sequence. Runtime power management is not implemented.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
DMA controller ownership can be done in the driver
initialization, it does not need to be part of the SoC. It simplify
the code and remove duplicated definitions.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Make all series consistent with regard to where code is located and put
the power init code in power.c alongside other power related code.
Reduce soc.c per series to an empty file that can be removed.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Renamed from soc/xtensa/intel_adsp/cavs/soc.c (Browse further)
