soc: intel_adsp: don't enable interrupt before k_cpu_idle
Fix a bug on cavs platform that secondary core is not powered off by SET_DX ipc message sometimes. Secondary core is set into idle state when switching to SOF_OFF state and then halted by primary core. The interrupt is enabled before entring idle state, so the secondary core may be woken up by interrupt and soc_cpus_active is set to true before it is halted by hardware power gating. This result to error when SOF check soc_cpus_active after the secondary is halted. This patch doesn't enable interrupt before idle entry to avoid above issue. Signed-off-by: Rander Wang <rander.wang@intel.com>
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@ -107,7 +107,6 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
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/* do power down - this function won't return */
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power_down_cavs(true, uncache_to_cache(&hpsram_mask[0]));
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} else {
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z_xt_ints_on(core_desc[cpu].intenable);
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k_cpu_idle();
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}
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} else {
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