Commit graph

67 commits

Author SHA1 Message Date
Erwan Gouriou
d66c1d9b54 drivers/adc: stm32: Update setup_channels() for G4 series
G4 series have specific LL ADC API that discriminate ADC1 and ADC5
channels. Take this into account in adc_stm32_setup_channels().

Additionally, fix this function to use LL defines as argument of macro
__LL_ADC_CHANNEL_TO_DECIMAL_NB, as good practice.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-03-21 16:31:27 -07:00
Francois Ramu
29d0660585 drivers: adc: stm32 adc API has a valid internal reference
extend the stm32 adc api to set the ref_internal of 3.3V

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-03-18 10:21:13 +01:00
Benedikt Schmidt
09d2199589 stm32: adc: use ADC properties to configure temp and vref channels
Use the devicetree properties to determine if the dedicated temperature or
voltage reference channels should be configured for the ADC.
Fixes #43750.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2022-03-15 10:50:52 +01:00
Nazar Kazakov
9713f0d47c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-14 20:22:24 -04:00
Pete Dietl
90c3693005 stm32: adc: Improve handling of voltage ref and internal temp
This change includes special handling of the internal voltage
reference and internal die temperature channels for all currently
defined STM32 models

The code now looks for specific ADC + channel ID pairs instead
of just a channel ID to determine if the caller is trying to
configure an internal channel.

Signed-off-by: Pete Dietl <petedietl@gmail.com>
2022-03-11 11:27:55 -08:00
Gerard Marull-Paretas
435213a753 drivers: remove redundant data/config casts
Some drivers explicitely casted data/config from void * to the
corresponding type. However, this is unnecessary and, in many drivers it
has been misused to drop const qualifier (refer to previous commits).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-19 18:16:02 +01:00
Alexander Mihajlovic
cfce5afcd9 drivers: adc: stm32: Clear ADRDY before waiting
Clear ADRDY before enabling ADC to ensure the subsequent
wait for ADRDY does not stop prematurely in case ADRDY
was already set.

The "ADC on-off control" sections of the following reference manuals
were consulted. That gives at least one instance per series affected
by this change, even if not every affected MCU is covered.

- RM0438 (STM32L552xx and STM32L562xx)
- RM0351 (STM32L47xxx, STM32L48xxx, STM32L49xxx and STM32L4Axxx)
- RM0434 (STM32WB55xx and STM32WB35xx)
- RM0454 (STM32G0x0)
- RM0440 (STM32G4 Series)
- RM0399 (STM32H745/755 and STM32H747/757)
- RM0433 (STM32H742, STM32H743/753 and STM32H750)
- RM0453 (STM32WL5x)

Signed-off-by: Alexander Mihajlovic <a@abxy.se>
2022-01-17 11:48:30 -05:00
Alexander Mihajlovic
e521c7d49e drivers: adc: stm32: Add function to enable ADC consistently
Use a wrapper for LL_ADC_Enable that also waits for ADRDY if required
by the SoC to make sure it's properly enabled everywhere this is done.

Signed-off-by: Alexander Mihajlovic <a@abxy.se>
2022-01-17 11:48:30 -05:00
Marius Scholtz
14e15df00f drivers: arm: stm32: adc: Added Shared IRQ
Certain stm32 soc's have a single shared irq for all adc channels
on those soc's only a single channel is supported.

Added a Kconfig that enables a shared irq for stm32f2x, stm32f4x,
stm32f7x soc's. The shared IRQ uses a flag to limit the number of
interrupts defined to only 1. A shared irq handler is added which
determines which ADC instance the interrupt is for, it then calls
into the existing interrupt.

Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
2022-01-11 11:50:43 +01:00
Francois Ramu
e9b9e4c6ad drivers: adc: driver setting the oversampling for stm32wl
RM 0453: the sw is allowed to write the Oversampling
ratio or shift of the ADC Config.Reg.2 only when ADSTART = 0
(no conversion is on-going). So disabling it will be stopped.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-04 09:12:08 -05:00
Francois Ramu
c918c4f1d9 drivers: adc: driver setting the resolution for stm32wl
RM 0453: the sw is allowed to write the Data Resolution bits
of the ADC Config.Reg.1 only when ADEN = 0 (ADC disable).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-04 09:12:08 -05:00
Gerard Marull-Paretas
5dc6ed3ce3 pinctrl: require ; after PINCTRL_DT_(INST_)DEFINE macros
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-01 07:39:08 -05:00
Pete Dietl
bc1b262885 drivers: adc: stm32: Disable ADC before calibration
The STM32 docs state that the ADC may not be calibrated unless
the ADC is disabled (ADEN=0). This commit implements this constraint

Fixes #40936

Signed-off-by: Pete Dietl <petedietl@gmail.com>
2021-12-15 14:39:31 -06:00
Erwan Gouriou
93956b2073 drivers/adc: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Francois Ramu
2185863d3b drivers: adc: add the stm32U5 devices to the adc driver
The STM32U5x device has ADC instance of different versions
similar to the stm32H7 about the oversampling.
ADC1 of 14bit resolution has a ratio from 1..1024 on OSR[9:0]
ADC4 of 12bit resolution has a ratio on OVSR[2:0]

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-11-09 15:59:23 -06:00
Francois Ramu
e26fcc47b9 drivers: adc: stm32 oversampling includes the ADC of the stm32U5 soc
This commit extends the configuration of the oversampling
ratio and shift for the stm32U5xx soc, depending on the
ADC instance: ratio is a value from 1..1024 or a LL_ADC_OVS_RATIO_x
to be used with the stm32Cube LL function.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-11-09 15:59:23 -06:00
Francois Ramu
3ee3a46b6a drivers: adc: stm32h7 adc driver has a range for oversampling ratio
On the stm32H7 family, there are ADC which have Oversampling ratio
of 10 bits OSVR[9:0] in the CFGR2 register. It means that oversampling
512x or 1024x are possible.
Other values are not allowed as the oversampling field of the struct
adc_sequence (adc.h) is 2^oversampling.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-25 19:15:03 -04:00
Francois Ramu
0af4a393ee drivers: adc: stm32h7 adc driver has a different oversampling ratio
The adc_stm32_oversampling function is used to configure
the ratio and shift for each sequence->oversampling
depending on the soc serie and ADC instance in the serie
In the stm32H7 serie, only ADC3 of ADC_VER_V5_V90 version
have a LL_ADC_OVS_RATIO_x contant (other a 9bit value).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-25 19:15:03 -04:00
Francois Ramu
41bfec7c52 drivers: adc: stm32h7 adc driver using LL function
Change the access to the PCSEL register by using the LL function
because on the STM32H7xx soc, some devices have no PCEL register
especially on ADC3 of the stm32H723.
The LL function manages this difference.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-10-25 19:15:03 -04:00
Maureen Helm
b0cdef3c25 drivers: adc: Refactor drivers to use shared init priority
Refactors all of the ADC drivers to use a shared driver class
initialization priority configuration, CONFIG_ADC_INIT_PRIORITY, to
allow configuring ADC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.

The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are lmp90xxx, mcp320x, and mcux_adc16 drivers which have
dependencies on GPIO, SPI, and/or DMA drivers and must therefore
initialize later than the default device priority.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-20 07:33:44 -04:00
Francois Ramu
acad37196d drivers: adc: stm32 adc disable causing endless loop
Setting Oversampling also applies on stm32L5 but disabling
the ADC will cause endless loop except for the stm32L0 serie.
Errata applies only on stm32G0 soc series when
writing ADC_CFGR1 register.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-09-28 06:12:47 -04:00
Francois Ramu
97c031822b drivers: adc: stm32 disable the ADC before setting the Oversampling
On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to set/reset the oversampler (OVSE bit)
and set the Oversampling ratio (OVSR bits) in the ADC_CFGR2 register
only when ADC is disabled or enabled without conversion on going.
Then is the ADC re-enabled.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-09-18 09:02:31 -04:00
Francois Ramu
572ab24241 drivers: adc: stm32 disable the ADC before setting the Resolution
On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to write the Data resolution (RES bits)
in the ADC_CFGR1 register only when ADC is disabled (ADEN=0).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-09-18 09:02:31 -04:00
Francois Ramu
bfeb9b4684 drivers: adc: stm32h7 has a different oversampling config API
The LL_ADC_ConfigOverSamplingRatioShift function for
the stm32H7xx soc serie differs from other for the 'ratio':
"This parameter can be in the range from 1 to 1024"
Note that in the stm32h7xx_ll_adc.c the LL_ADC_OVS_RATIO_xxx value is
defined for ADC of type ADC_VER_V5_V90.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-08-03 10:34:49 -05:00
Aurelien Jarno
58b8c4006e drivers: adc: STM32: add support for oversampling
The STM32 G0, G4, H7, L0, L4, WB and WL series have hardware support for
oversampling. This patch adds support for it, using the oversampling
value provided in the adc sequence. The result is shifted right
accordingly to not change the resolution of the measured value, like it
is done on other ADC drivers.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-07-29 11:48:41 -04:00
Sidhdharth Yadav
bdf425cd5c drivers: adc: Adding CONFIG_SOC_SERIES_STM32L5X in stm32l5 series
Allowing ADC to build in stm32l5 series.

Signed-off-by: Sidhdharth Yadav <sidhdharth.yadav@hcl.com>
2021-07-06 18:03:22 -04:00
Aurelien Jarno
2a96cc0347 drivers: adc: STM32: fix support for internal voltage reference source
Commit c045cbd336 added support for internal voltage reference source,
but in practice only the temp sensor is supported. Fix that.

Also change the code to keep the existing paths so that VREFINT and
TEMPSENSOR can be used at the same time.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-07-06 18:01:57 -04:00
Dario Binacchi
c3a067e841 drivers: adc: stm32: fix f3x series
The patch fixes driver compile errors and ADC management for the f3x
series. It was developed and tested for the stm32f373 variant.

Tested-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-07-06 15:08:04 -05:00
Lasse Sangild
ec174d41b6 drivers: adc: stm32: Perform calibration if set in sequence
The calibration bit previously did nothing.

Move calibration to allow call in start_read.

Signed-off-by: Lasse Sangild <lsangild@gmail.com>
2021-06-16 10:39:18 +02:00
Lasse Sangild
e4463a7d9e drivers: adc: stm32: Add STM32h7xx linearity calibration
The STM32H7 series has a special ADC, which is calibrated
on the factory. The calibration values are stored in flash
and must be retrieved upon powering up the device.

Failure to calibrate the device leads to missing codes in
the ADC readings.

Fixes #35529

Signed-off-by: Lasse Sangild <lsangild@gmail.com>
2021-06-16 10:39:18 +02:00
Erwan Gouriou
fcc3177509 drivers/pinmux: stm32: Move stm32 driver from stm32/
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-11 08:04:39 -05:00
Fabio Baltieri
fbf2f81c43 drivers: stm32_adc: add STM32WL family support
Add ADC support for the STM32WL family, this seems to work following
most of the L0X code path.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-06-07 12:04:15 +02:00
Affrin Pinhero
2c61c06a0e drivers/ADC: STM32: This solves coverity reported in ADC driver.
This commit it to resolve following bugs:
* Operands don't affect result.
* Logical dead code in stm32_adc driver.
Above mentioned bugs were solved by adding parenthesis and
changed the method of comparing. Since comparison of ADC
channel_id with the channel may cause loss of value.
So instead of direct comparison, introduced a mechanism to
convert channel constant to a decimal using
__LL_ADC_CHANNEL_TO_DECIMAL_NB() and strips away
the INTERNAL_CH bit and then compare with channel_id.

fix:
* zephyrproject-rtos/zephyr#35130
* zephyrproject-rtos/zephyr#35136

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-05-27 15:55:19 -05:00
Eug Krashtan
c045cbd336 drivers: adc: STM32 Add common path
Enable common path for internal voltage voltage
reference source.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-08 10:18:09 -05:00
Gerard Marull-Paretas
510aacc45d drivers: adc: remove usage of device_pm_control_nop
device_pm_control_nop is now deprecated in favour of NULL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-28 10:54:22 -04:00
Kumar Gala
b275fec8c4 soc: stm32: convert to use DEVICE_DT_GET for clocks
Convert from device_get_binding to DEVICE_DT_GET.  In doing this we
no longer need the label in the devicetree node so we remove that.

Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 17:01:37 -06:00
Erwan Gouriou
6a012301e6 drivers/adc: stm32: Use bitfield for multiple channels detection
For multiple channels detection, channels variable was compared with
the output of find_lsb_set which actually is a decimal number.
Since channel is a bitfield the comparison was not behaving as
expected (detecting several channels while only one channel was used).

Rework the code to use the already existing bitfield "index" for
the test.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-29 16:57:04 -05:00
Martin Jäger
3c7b2771b1 drivers: adc: stm32: Fix sequence configuration
The STM32 driver currently does not support reading a sequence of
multiple ADC channels. Only the first channel of the sequence was
read and the rest was silently ignored.

Fix: Return an error if reading multiple channels is requested.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-01-23 08:27:46 -05:00
Thomas Stranger
4ed375040e drivers: adc: stm32: add support for stm32g0 series
Adds support for ADC on G0 series.
Simple implementation: sequencer not fully configurable,
and only one common sampling time.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-01-07 15:50:22 -06:00
Kumar Gala
2f9573406d drivers: adc: Convert drivers to new DT device macros
Convert adc drivers to use new DT variants of the DEVICE APIs.
    DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
    DEVICE_GET -> DEVICE_DT_GET
    DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE

etc..

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-10 08:48:17 -06:00
Martin Jäger
7f68c0aa2c drivers: adc: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Erwan Gouriou
0b9c584ec1 drivers/pinmux: stm32: Provide unique API to stm32_dt_pinctrl
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-20 09:09:29 -05:00
Martin Jäger
72d395a897 drivers: adc: stm32: add support for pinmux
Add support for DT based pinmux configurations.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-14 07:15:12 -05:00
Tomasz Bursztyka
4dcfb5531c isr: Normalize usage of device instance through ISR
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs

This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.

Note that only the ISR passed to IRQ_CONNECT are of interest here.

In order to do so, the script fix_isr.py below is necessary:

from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os

cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
(
 const struct device *D = (const struct device *)P;
|
 const struct device *D = P;
)
 ...
}

@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
 const struct device *D;
 ...
(
 D = (const struct device *)P;
|
 D = P;
)
 ...
}

@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
 ...
}

@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);

@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
(
-const struct device *D = (const struct device *)P;
|
-const struct device *D = P;
)
 ...
}

@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
-const struct device *D;
...
(
-D = (const struct device *)P;
|
-D = P;
)
 ...
}
"""

def find_isr(fn):
    db = []
    data = None
    start = 0

    try:
        with open(fn, 'r+') as f:
            data = str(mmap.mmap(f.fileno(), 0).read())
    except Exception as e:
        return db

    while True:
        isr = ""
        irq = data.find('IRQ_CONNECT', start)
        while irq > -1:
            p = 1
            arg = 1
            p_o = data.find('(', irq)
            if p_o < 0:
                irq = -1
                break;

            pos = p_o + 1

            while p > 0:
                if data[pos] == ')':
                    p -= 1
                elif data[pos] == '(':
                    p += 1
                elif data[pos] == ',' and p == 1:
                    arg += 1

                if arg == 3:
                    isr += data[pos]

                pos += 1

            isr = isr.strip(',\\n\\t ')
            if isr not in db and len(isr) > 0:
                db.append(isr)

            start = pos
            break

        if irq < 0:
            break

    return db

def patch_isr(fn, isr_list):
    if len(isr_list) <= 0:
        return

    for isr in isr_list:
        tmplt = cocci_template.replace('<!fn!>', isr)
        with open('/tmp/isr_fix.cocci', 'w') as f:
            f.write(tmplt)

        cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]

        subprocess.run(cmd)

def process_files(path):
    if path.is_file() and path.suffix in ['.h', '.c']:
        p = str(path.parent) + '/' + path.name
        isr_list = find_isr(p)
        patch_isr(p, isr_list)
    elif path.is_dir():
        for p in path.iterdir():
            process_files(p)

if len(sys.argv) < 2:
    print("You need to provide a dir/file path")
    sys.exit(1)

process_files(Path(sys.argv[1]))

And is run: ./fix_isr.py <zephyr root directory>

Finally, some files needed manual fixes such.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
98d9b01322 device: Apply driver_api/data attributes rename everywhere
Via coccinelle:

@r_device_driver_api_and_data_1@
struct device *D;
@@
(
D->
-	driver_api
+	api
|
D->
-	driver_data
+	data
)

@r_device_driver_api_and_data_2@
expression E;
@@
(
net_if_get_device(E)->
-	driver_api
+	api
|
net_if_get_device(E)->
-	driver_data
+	data
)

And grep/sed rules for macros:

git grep -rlz 'dev)->driver_data' |
	xargs -0 sed -i 's/dev)->driver_data/dev)->data/g'

git grep -rlz 'dev->driver_data' |
	xargs -0 sed -i 's/dev->driver_data/dev->data/g'

git grep -rlz 'device->driver_data' |
	xargs -0 sed -i 's/device->driver_data/device->data/g'

Fixes #27397

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-08-11 19:30:53 +02:00
Tomasz Bursztyka
af6140cc0d device: Apply config_info rename everywhere
Via coccinelle:

@r_device_config@
struct device *D;
@@

D->
-	config_info
+	config

And 2 grep/sed rules for macros:

git grep -rlz 'dev)->config_info' |
	xargs -0 sed -i 's/dev)->config_info/dev)->config/g'

git grep -rlz 'dev->config_info' |
	xargs -0 sed -i 's/dev->config_info/dev->config/g'

Fixes #27397

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-08-11 19:30:53 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Peter Bigot
4f16b419e8 device: avoid casting away const from config_info pointer
The driver-specific config_info structure referenced from the device
structure is marked const.  Some drivers fail to preserve that
qualifier when casting the pointer to the driver-specific structure,
violating MISRA 11.8.

Changes produced by scripts/coccinelle/const_config_info.cocci.

Some changes proposed by the script are not included because they
reveal mutation of state through the const pointer, though the
code works as long as the driver-specific object is defined without
the const qualifier.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-13 18:21:52 +02:00
Martí Bolívar
7e0eed9235 devicetree: allow access to all nodes
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.

Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.

To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:

- emit macros for all existing nodes in gen_defines.py, regardless
  of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00