drivers: adc: driver setting the resolution for stm32wl
RM 0453: the sw is allowed to write the Data Resolution bits of the ADC Config.Reg.1 only when ADEN = 0 (ADC disable). Signed-off-by: Francois Ramu <francois.ramu@st.com>
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1 changed files with 3 additions and 2 deletions
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@ -496,9 +496,10 @@ static int start_read(const struct device *dev,
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return err;
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}
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#if defined(CONFIG_SOC_SERIES_STM32G0X)
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#if defined(CONFIG_SOC_SERIES_STM32G0X) || \
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defined(CONFIG_SOC_SERIES_STM32WLX)
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/*
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* Errata: Writing ADC_CFGR1 register while ADEN bit is set
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* Writing ADC_CFGR1 register while ADEN bit is set
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* resets RES[1:0] bitfield. We need to disable and enable adc.
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*/
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if (LL_ADC_IsEnabled(adc) == 1UL) {
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