Currently we setup irq trigger type (pulse or level) in IDU
before we Mask (disable) IRQ line.
The IDU is disabled at this moment, however we still may
accidentally generate interrupt by trigger setup.
To avoid that let's mask (disable) IRQ before trigger type setup.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
llvm based toolchains need the same fix as exists for xcc that was
introduced with commit:
commit 5ef8db8ac9
Author: Daniel Leung <daniel.leung@intel.com>
Date: Wed Feb 3 14:23:51 2021 -0800
xcc: define __INT*_C() and __UINT*_C()
Since llvm based toolchains don't define these macros either.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
This reverts commit 21eb27c5c0.
This change has been a source of much trouble and ends up preventing us
from tracking test results across tree. It uses the repo name as the
namespace, and that is not always the same and does not have to be
called 'zephyr', depending on where you are running and in which
environment.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Bugfix for the Cyclone V SoC DK ethernet driver need to add emac-index
in dts
- We remove the "local-mac-address" property from
dts/arm/intel_socfpga_std.dtsi to
boards/arm/cyclonev_socdk/cyclonev_socdk.dts, since this value is
dependant on the board / implementation and not universal to
the "intel_socfpga" package that it inherets from.
- The above is also true for the "status" property as the board
should enable the device.
Signed-off-by: Benjamin Kyd <benjamin.kyd@intel.com>
bugfix for Cyclone V Ethernet Phy error and timeout overflow.
- p->instance was incorrectly assumed to be a reference to
the emac device, this is ammended
- the volatile uint16_t timeout would often overflow
- code cleanup and added more macros for housekeeping
Signed-off-by: Benjamin Kyd <benjamin.kyd@intel.com>
This changes all Actinius boards to use the helper lib in
`boards/common/actinius` for setting up common init values
such as SIM Select and Charger Enable.
Signed-off-by: Alex Tsamakos <alex@actinius.com>
This adds support for the nRF9160-based Icarus SoM DK
(development kit) from Actinius and a common library for
board init code that is common to multiple boards
from Actinius.
Signed-off-by: Alex Tsamakos <alex@actinius.com>
The HIDs sample is currently setup with a passkey callback and requires
authenticated write and read access.
Add a sample option to disable the passkey callbacks, and automatically
set the GATT attributes as encryption required. This is a useful sample
setup as real world HID devices (mice, keyboards...) usually don't have
a passkey mechanism, and removing the callback to reproduce that setup
while not changing the GATT permission leads to automatic disconnections
for encryption failures that can be fairly hard to troubleshoot.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Set a sample name and description for a bunch of tests where those are
left as "TBD" right now.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
I got a couple of questions about what this command's purpose is and
how to debug 'valid' manifests that aren't working as desired. Add
some information to address this.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Most of the time, z_cstart() is running on an arbitrary region
of memory as stack, where the necessary stack setup has not been
performed. This prevents stack protection to work correctly,
as the stack canary has not been populated. So mark z_cstart()
to have no stack protection at all inside the function to avoid
raising exception during boot.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This provides a macro to disable stack protector for a function,
by specifying a function attribute. This is useful for boot
and early init code where we know for sure stack pointer and/or
stack content are being manipulated manually.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add three xbar nodes and four qdec nodes in the rt10xx devicetree include.
Add xbara to rt1052 in Kconfig.soc
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add a driver for the NXP MCUX Quadrature Decoder. The driver
is simple and only implements the phase a and phase b inputs. The
module has additional features which can be added in future PRs.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
By default, qemu_coxtex_m3 target selected SLIP driver as
a network backend. This requires some unstandard tool (tunslip6),
which are error prone and might not necessary work.
Ethernet backend work equally well as in native_posix so
use the same for both.
Change the default emulation platform from X86 to Cortex-M3
because it supports Ethernet by default.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
We can leverage the FPU dirty state as an indicator for preemptively
reloading the FPU content when a thread that did use the FPU before
being scheduled out is scheduled back in. This avoids the FPU access
trap overhead when switching between multiple threads with heavy FPU
usage.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
With lazy FPU context switching, k_float_disable() is merely triggering
a synchronous FPU context save and k_float_enable() is a no-op.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
FPU context switching is always performed on demand through the FPU
access exception handler. Actual task switching only grants or denies
FPU access depending on the current FPU owner.
Because RISC-V doesn't have a dedicated FPU access exception, we must
catch the Illegal Instruction exception and look for actual FP opcodes.
There is no longer a need to allocate FPU storage on the stack for every
exception making esf smaller and stack overflows less likely.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Instead of saving/restoring FPU content on every exception and task
switch, this replaces FPU sharing support with a "lazy" (on-demand)
context switching algorithm similar to the one used on ARM64.
Every thread starts with FPU access disabled. On the first access the
FPU trap is invoked to:
- flush the FPU content to the previous thread's memory storage;
- restore the current thread's FPU content from memory.
When a thread loads its data in the FPU, it becomes the FPU owner.
FPU content is preserved across task switching, however FPU access is
either allowed if the new thread is the FPU owner, or denied otherwise.
A thread may claim FPU ownership only through the FPU trap. This way,
threads that don't use the FPU won't force an FPU context switch.
If only one running thread uses the FPU, there will be no FPU context
switching to do at all.
It is possible to do FP accesses in ISRs and syscalls. This is not the
norm though, so the same principle is applied here, although exception
contexts may not own the FPU. When they access the FPU, the FPU content
is flushed and the exception context is granted FPU access for the
duration of the exception. Nested IRQs are disallowed in that case to
dispense with the need to save and restore exception's FPU context data.
This is the core implementation only to ease reviewing. It is not yet
hooked into the build.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Right now this is hardcoded to z_sched_ipi(). Make it so that other IPI
services can be added in the future.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This reverts commit 5824ac90ecd8dd06d9ea117d345dbc6b069e5840.
The resulting revert takes into account changes to the predicate that
guards the use of `resp_addr`.
In the resulting revert, the predicate guarding the use of `resp_addr`
is differs from the naive revert because the intention of that predicate
is to know when `conn.c:bt_conn_le_create` decided to use the Host
resolver. And, the logic in `conn.c:bt_conn_le_create` has changed. The
changes to the logic in `conn.c` are in the following commits:
89780d715d5a09325ba9
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Fix filter accept list and privacy feature Kconfig default
based on whether host has them enabled.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Change the http timeout mechanism to use poll instead of shutdown.
This should fix a problem where the shutdown will be called in a
different thread context which can lead to deadlocks on certain
driver implementations like offloaded modem drivers.
Fixes#53967
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When removing a CIG, the instance and associated CIS instances were not
always released. This causes repeated Create_CIG/Remove_CIG operations
to fail assertion with resource error.
Enables CONFIG_BT_CTLR_CENTRAL_ISO in bsim_test_audio.
Fixes issue #53301.
Signed-off-by: Morten Priess <mtpr@oticon.com>
The sample application shows how to configure NXP S32 Network Controller
(NETC) for different use-cases.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce DT nodes for NETC complex and enable its usage for
s32z270dc2_r52 boards. Using PSI0 as default networking interface and
Switch Port0 as it's the only port available on this board.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce Ethernet low-level driver for NXP S32 Network Controller
(NETC). Current driver allows to manage from Zephyr a Physical Station
Interface (SI) and/or a Virtual SI. The NETC has an integrated Ethernet
Switch. Currently the Switch is initialized from this driver with a
default configuration, and all ports are enabled and transparent for
the user. A separate Switch driver should be addressed in future patches.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 NETC External MDIO controller driver. Driver supports
a single instance, as current support is based on NXP S32Z/E SoCs.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Advertise Gigabit Ethernet if the PHY supports it. As with the
other speeds, it is assumed the PHY supports both duplex modes.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 Message Receive Unit (MRU) driver based
of Mbox API. The MRU couples with a processor and allows to
receive messages from senders, which are other modules or
processors.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
